:
Thanks,
Jon
Jon Mason (1):
ARM: print MHz in /proc/cpuinfo
arch/arm/kernel/setup.c | 29 +
1 file changed, 29 insertions(+)
--
1.9.1
are encountered in querying the clock (or the speed is
erroneously zero), nothing will be printed out. Thus any existing
devices that do not have CPU clocks defined in the device tree will
work as before.
Signed-off-by: Jon Mason <jon.ma...@broadcom.com>
---
arch/arm/kernel/setup.
are encountered in querying the clock (or the speed is
erroneously zero), nothing will be printed out. Thus any existing
devices that do not have CPU clocks defined in the device tree will
work as before.
Signed-off-by: Jon Mason
---
arch/arm/kernel/setup.c | 29 +
1
:
Thanks,
Jon
Jon Mason (1):
ARM: print MHz in /proc/cpuinfo
arch/arm/kernel/setup.c | 29 +
1 file changed, 29 insertions(+)
--
1.9.1
On Thu, Jun 02, 2016 at 01:45:43PM -0700, Andrew Morton wrote:
>
> Maybe Muli Ben-Yehuda ?
>
> On Thu, 02 Jun 2016 17:58:47 +0200 Krzysztof Kozlowski
> wrote:
>
> > Muli Ben-Yahuda's email bounces so remove him from Calgary IOMMU. He is
> > already
On Thu, Jun 02, 2016 at 01:45:43PM -0700, Andrew Morton wrote:
>
> Maybe Muli Ben-Yehuda ?
>
> On Thu, 02 Jun 2016 17:58:47 +0200 Krzysztof Kozlowski
> wrote:
>
> > Muli Ben-Yahuda's email bounces so remove him from Calgary IOMMU. He is
> > already present in CREDITS for that.
I setout a
On Fri, Jun 03, 2016 at 02:50:32PM -0600, Logan Gunthorpe wrote:
> I'm working on hardware that currently has a limited number of
> scratchpad registers and ntb_ndev fails with no clue as to why. I
> feel it is better to fail early and provide a reasonable error message
> then to fail later on..
>
On Fri, Jun 03, 2016 at 02:50:32PM -0600, Logan Gunthorpe wrote:
> I'm working on hardware that currently has a limited number of
> scratchpad registers and ntb_ndev fails with no clue as to why. I
> feel it is better to fail early and provide a reasonable error message
> then to fail later on..
>
On Fri, Jun 3, 2016 at 5:20 PM, Allen Hubbe wrote:
> From: Logan Gunthorpe
>> We allocate some memory window buffers when the link comes up, then we
>> provide debugfs files to read/write each side of the link.
>>
>> This is useful for debugging the mapping when writing new
On Fri, Jun 3, 2016 at 5:20 PM, Allen Hubbe wrote:
> From: Logan Gunthorpe
>> We allocate some memory window buffers when the link comes up, then we
>> provide debugfs files to read/write each side of the link.
>>
>> This is useful for debugging the mapping when writing new drivers.
>>
>>
On Fri, Jun 3, 2016 at 5:03 PM, Jiang, Dave wrote:
> On Fri, 2016-06-03 at 14:50 -0600, Logan Gunthorpe wrote:
>> On my system, dma_alloc_coherent won't produce memory anywhere
>> near the size of the BAR. So I needed a way to limit this.
>>
>> It's pretty much copied
On Fri, Jun 3, 2016 at 5:03 PM, Jiang, Dave wrote:
> On Fri, 2016-06-03 at 14:50 -0600, Logan Gunthorpe wrote:
>> On my system, dma_alloc_coherent won't produce memory anywhere
>> near the size of the BAR. So I needed a way to limit this.
>>
>> It's pretty much copied straight from ntb_transport.
On Sat, May 28, 2016 at 9:09 AM, Allen Hubbe wrote:
> On Fri, May 27, 2016 at 4:38 PM, Logan Gunthorpe wrote:
>> If you tried to write two spads in one line, as per the example:
>>
>> root@peer# echo '0 0x01010101 1 0x7f7f7f7f' > $DBG_DIR/peer_spad
>>
>>
On Sat, May 28, 2016 at 9:09 AM, Allen Hubbe wrote:
> On Fri, May 27, 2016 at 4:38 PM, Logan Gunthorpe wrote:
>> If you tried to write two spads in one line, as per the example:
>>
>> root@peer# echo '0 0x01010101 1 0x7f7f7f7f' > $DBG_DIR/peer_spad
>>
>> then the CPU would freeze in an infinite
On Thu, May 19, 2016 at 09:45:33AM +0800, Kefeng Wang wrote:
> +Cc Jon and arm-kernel mailist
>
> Any comments, thanks.
It works for me. Please feel free to add
Tested-by: Jon Mason <jon.ma...@broadcom.com>
Thanks,
Jon
>
> Kefeng
>
> On 2016/5/11 14:06, Kefeng
On Thu, May 19, 2016 at 09:45:33AM +0800, Kefeng Wang wrote:
> +Cc Jon and arm-kernel mailist
>
> Any comments, thanks.
It works for me. Please feel free to add
Tested-by: Jon Mason
Thanks,
Jon
>
> Kefeng
>
> On 2016/5/11 14:06, Kefeng Wang wrote:
> > Some bo
Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 9 +
1 file chan
Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
was trying to say)
Jon Mason (3):
ARM: dts: bcm5301x: Add TWD WD Support to DT
ARM: dts: bcm5301x: Add I2C support to the DT
arm: dts: bcm5301x: Add syscon based reboot in DT
arch/arm/boot/dts/bcm5301x.dtsi | 36 +---
1 file changed, 33 insertions(+), 3 deletions
was trying to say)
Jon Mason (3):
ARM: dts: bcm5301x: Add TWD WD Support to DT
ARM: dts: bcm5301x: Add I2C support to the DT
arm: dts: bcm5301x: Add syscon based reboot in DT
arch/arm/boot/dts/bcm5301x.dtsi | 36 +---
1 file changed, 33 insertions(+), 3 deletions
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason <jo
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/bo
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 15
Add all of the UARTs present on NS2 and enable them in the SVK device
tree file. Also, do some magic to make sure that uart3 is discovered as
ttyS0 (as that is the console UART).
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2-svk.dt
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
b/arch/arm6
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
b/arch/arm64/boot/dts/broadcom/ns2.dtsi
Add all of the UARTs present on NS2 and enable them in the SVK device
tree file. Also, do some magic to make sure that uart3 is discovered as
ttyS0 (as that is the console UART).
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16
arch/arm64/boot/dts
Create a new device tree file for the Broadcom Northstar Plus HR SVK.
This SVK is a smaller form factor, and thus only has 2 PCI slots and 1
UART. Also, it has the ability to reboot via GPIO (instead of the
processor reset).
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/bo
Create a new device tree file for the Broadcom Northstar Plus HR SVK.
This SVK is a smaller form factor, and thus only has 2 PCI slots and 1
UART. Also, it has the ability to reboot via GPIO (instead of the
processor reset).
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/Makefile| 1
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 de
Add MSI support to the PCI driver of the Northstar Plus SoC. This uses
the existing pcie-iproc driver. So, all that is needed is device tree
entries in the DTS.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 36
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm
Add MSI support to the PCI driver of the Northstar Plus SoC. This uses
the existing pcie-iproc driver. So, all that is needed is device tree
entries in the DTS.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 36
1 file changed, 36 insertions
On Mon, Mar 21, 2016 at 8:31 PM, Brian Norris
<computersforpe...@gmail.com> wrote:
> On Mon, Mar 21, 2016 at 07:52:38PM -0400, Jon Mason wrote:
>> On Fri, Mar 18, 2016 at 10:11:20AM -0700, Brian Norris wrote:
>> > drivers/ntb/test/ntb_perf.c: In function ‘perf_copy
On Mon, Mar 21, 2016 at 8:31 PM, Brian Norris
wrote:
> On Mon, Mar 21, 2016 at 07:52:38PM -0400, Jon Mason wrote:
>> On Fri, Mar 18, 2016 at 10:11:20AM -0700, Brian Norris wrote:
>> > drivers/ntb/test/ntb_perf.c: In function ‘perf_copy’:
>> > drivers/ntb/test/ntb_perf.c
Hello Linus,
Here are a few NTB bug fixes for 4.6. Please consider pulling them.
Thanks,
Jon
The following changes since commit b562e44f507e863c6792946e4e1b1449fbbac85d:
Linux 4.5 (2016-03-13 21:28:54 -0700)
are available in the git repository at:
git://github.com/jonmason/ntb
Hello Linus,
Here are a few NTB bug fixes for 4.6. Please consider pulling them.
Thanks,
Jon
The following changes since commit b562e44f507e863c6792946e4e1b1449fbbac85d:
Linux 4.5 (2016-03-13 21:28:54 -0700)
are available in the git repository at:
git://github.com/jonmason/ntb
This was already addressed by a patch from Arnd Bergmann, which is
queued in the ntb git tree.
Thanks,
Jon
>
> Signed-off-by: Brian Norris <computersforpe...@gmail.com>
> Cc: Dave Jiang <dave.ji...@intel.com>
> Cc: Jon Mason <jdma...@kudzu.us>
> Cc: Allen Hubbe &l
This was already addressed by a patch from Arnd Bergmann, which is
queued in the ntb git tree.
Thanks,
Jon
>
> Signed-off-by: Brian Norris
> Cc: Dave Jiang
> Cc: Jon Mason
> Cc: Allen Hubbe
> ---
> drivers/ntb/test/ntb_perf.c | 6 +++---
> 1 file changed, 3 insertions(+)
On Tue, Jan 26, 2016 at 1:20 PM, Jiang, Dave wrote:
> On Tue, 2016-01-26 at 10:31 +0100, Arnd Bergmann wrote:
>> The ntb driver assigns between pointers an __iomem tokens, and
>> also casts them to 64-bit integers, which results in compiler
>> warnings on 32-bit systems:
>>
On Tue, Jan 26, 2016 at 1:20 PM, Jiang, Dave wrote:
> On Tue, 2016-01-26 at 10:31 +0100, Arnd Bergmann wrote:
>> The ntb driver assigns between pointers an __iomem tokens, and
>> also casts them to 64-bit integers, which results in compiler
>> warnings on 32-bit systems:
>>
>>
Add support for the ARM SP804 timer to the Northstar Plus device tree.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index ee03bee..63a0a53
Add support for the ARM SP804 timer to the Northstar Plus device tree.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
Northstar Plus device tree changes. The first 2 are bug fixes that
probably should go in ASAP. The other 3 enable new hardware and can be
pushed into the next merge window.
Thanks,
Jon
Jon Mason (5):
ARM: dts: NSP: Fix PCIE DT issue
ARM: dts: NSP: Fix CPU DT issue
ARM: dts: NSP: Add PMU
Add support for the ARM Performance Monitor Unit to the Northstar Plus
device tree.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index
Add support for the ARM SP804 timer to the Northstar Plus device tree.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 0e8cb6e..06a242e
Add support for the ARM SP805 Watchdog timer to the Northstar Plus
device tree.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 415a0a6..0e8cb6e 100644
There is a double definition of the CPUs present in the device tree.
Remove unnecessary cpu device tree definition.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm
Adding the ranges value is preventing the PCI nodes from working.
Pulling them out outside makes them work again (and makes it similar to
the NS2 device tree).
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 144 -
1 file changed, 72
Northstar Plus device tree changes. The first 2 are bug fixes that
probably should go in ASAP. The other 3 enable new hardware and can be
pushed into the next merge window.
Thanks,
Jon
Jon Mason (5):
ARM: dts: NSP: Fix PCIE DT issue
ARM: dts: NSP: Fix CPU DT issue
ARM: dts: NSP: Add PMU
Add support for the ARM Performance Monitor Unit to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/ar
Add support for the ARM SP804 timer to the Northstar Plus device tree.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
There is a double definition of the CPUs present in the device tree.
Remove unnecessary cpu device tree definition.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-ns
Adding the ranges value is preventing the PCI nodes from working.
Pulling them out outside makes them work again (and makes it similar to
the NS2 device tree).
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 144 --
Add support for the ARM SP805 Watchdog timer to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
On Thu, Jan 21, 2016 at 07:53:10PM +0800, Xiangliang Yu wrote:
> Resend V5 for more convenient pick up.
> Main changes in V5
> Only change Signed-off-by to Reviewed-by.
Included in the NTB git tree.
Thanks,
Jon
>
> Xiangliang Yu (1):
> [Resend patch V5] NTB: Add support for AMD PCI-Express
On Thu, Jan 21, 2016 at 2:24 AM, Yu, Xiangliang wrote:
>> From: Xiangliang Yu
>>
>> > Signed-off-by: Xiangliang Yu
>>
>> Yes.
>>
>> > Reviewed-by: Jon Mason
>>
>> Maybe, but that's for Jon to decide. If he accepts it, he will a
On Thu, Jan 21, 2016 at 2:24 AM, Yu, Xiangliang <xiangliang...@amd.com> wrote:
>> From: Xiangliang Yu <xiangliang...@amd.com>
>>
>> > Signed-off-by: Xiangliang Yu <xiangliang...@amd.com>
>>
>> Yes.
>>
>> > Reviewed-by: Jon Mason &l
On Thu, Jan 21, 2016 at 07:53:10PM +0800, Xiangliang Yu wrote:
> Resend V5 for more convenient pick up.
> Main changes in V5
> Only change Signed-off-by to Reviewed-by.
Included in the NTB git tree.
Thanks,
Jon
>
> Xiangliang Yu (1):
> [Resend patch V5] NTB: Add support for AMD PCI-Express
On Wed, Jan 6, 2016 at 11:52 AM, Hubbe, Allen wrote:
> From: Jon Mason :
>> On Wed, Dec 23, 2015 at 8:42 AM, Xiangliang Yu
>> wrote:
>
>> > +#define ndev_pdev(ndev) ((ndev)->ntb.pdev)
>> > +#define ndev_name(ndev) pci_name(ndev_pdev(ndev))
>>
On Wed, Dec 23, 2015 at 8:42 AM, Xiangliang Yu wrote:
> AMD NTB support following main features:
> (1) Three memory windows;
> (2) Sixteen 32-bit scratch pad;
> (3) Two 16-bit doorbell interrupt;
> (4) Five event interrupts;
> (5) One system can wake up opposite system of NTB;
> (6) Flush
On Wed, Dec 23, 2015 at 8:43 AM, Xiangliang Yu wrote:
> This patch is to enable AMD NTB support in Kconfig and Makefile.
>
> Signed-off-by: Xiangliang Yu
> ---
> drivers/ntb/hw/Kconfig | 1 +
> drivers/ntb/hw/Makefile | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git
On Wed, Dec 23, 2015 at 8:42 AM, Xiangliang Yu wrote:
> AMD NTB support following main features:
> (1) Three memory windows;
> (2) Sixteen 32-bit scratch pad;
> (3) Two 16-bit doorbell interrupt;
> (4) Five event interrupts;
> (5) One system can wake up opposite system of
On Wed, Dec 23, 2015 at 8:43 AM, Xiangliang Yu wrote:
> This patch is to enable AMD NTB support in Kconfig and Makefile.
>
> Signed-off-by: Xiangliang Yu
> ---
> drivers/ntb/hw/Kconfig | 1 +
> drivers/ntb/hw/Makefile | 1 +
> 2 files changed, 2
On Wed, Jan 6, 2016 at 11:52 AM, Hubbe, Allen <allen.hu...@emc.com> wrote:
> From: Jon Mason <jdma...@kudzu.us>:
>> On Wed, Dec 23, 2015 at 8:42 AM, Xiangliang Yu <xiangliang...@amd.com>
>> wrote:
>
>> > +#define ndev_pdev(ndev) ((ndev)->ntb.pdev)
On Fri, Dec 18, 2015 at 10:44:28PM +0100, Arnd Bergmann wrote:
> On Friday 18 December 2015 16:37:56 Jon Mason wrote:
> > + cru: cru@1800c184 {
> > + compatible = "syscon";
> > + reg = <0x1800c184 0xc>;
> > +
On Fri, Dec 18, 2015 at 10:44:28PM +0100, Arnd Bergmann wrote:
> On Friday 18 December 2015 16:37:56 Jon Mason wrote:
> > + cru: cru@1800c184 {
> > + compatible = "syscon";
> > + reg = <0x1800c184 0xc>;
> > +
Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 15
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason <jo
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
ARM TWD timer allocated the register space for the WDT, so this patch
necessitated shrinking that. Also, the GIC masks were added for these.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/bo
Add I2C support to the bcm5301x Device Tree. Since no driver changes
are needed to enable this hardware, only the device tree changes are
required to make this functional.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 9 +
1 file chan
On Thu, Dec 03, 2015 at 04:08:36PM -0500, Jon Mason wrote:
> On Wed, Dec 02, 2015 at 04:03:03PM +0100, Hauke Mehrtens wrote:
> > On 12/01/2015 05:24 PM, Kapil Hali wrote:
> > > From: Jon Mason
> > >
> > > Add SMP support for Broadcom's 4708 SoCs.
&
On Wed, Dec 02, 2015 at 04:03:03PM +0100, Hauke Mehrtens wrote:
> On 12/01/2015 05:24 PM, Kapil Hali wrote:
> > From: Jon Mason
> >
> > Add SMP support for Broadcom's 4708 SoCs.
> >
> > Signed-off-by: Jon Mason
> > Acked-by: Hauke Mehrtens
> &
On Wed, Dec 02, 2015 at 04:03:03PM +0100, Hauke Mehrtens wrote:
> On 12/01/2015 05:24 PM, Kapil Hali wrote:
> > From: Jon Mason <jonma...@broadcom.com>
> >
> > Add SMP support for Broadcom's 4708 SoCs.
> >
> > Signed-off-by: Jon Mason <jonma...@broa
On Thu, Dec 03, 2015 at 04:08:36PM -0500, Jon Mason wrote:
> On Wed, Dec 02, 2015 at 04:03:03PM +0100, Hauke Mehrtens wrote:
> > On 12/01/2015 05:24 PM, Kapil Hali wrote:
> > > From: Jon Mason <jonma...@broadcom.com>
> > >
> > > Add SMP support for Bro
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar Plus SoC
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 81 ++
1 file changed, 66 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/bcm
Add device tree entries for clock support for Broadcom Northstar 2 SoC
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
b/arch/arm64
://lkml.org/lkml/2015/10/13/882) due to
the inability to merge because of the driver dependencies. Those
necessary driver changes were merged into 4.4. All comments have been
addressed and it is ready to be pulled in.
Jon Mason (3):
ARM: dts: enable clock support for BCM5301X
ARM: dts
On Thu, Nov 19, 2015 at 03:40:04PM -0800, Ray Jui wrote:
>
>
> On 11/19/2015 3:05 PM, Jon Mason wrote:
> >Replace current device tree dummy clocks with real clock support for
> >Broadcom Northstar Plus SoC
> >
> >Signed-off-by: Jon Mason
> >---
&
Add device tree entries for clock support for Broadcom Northstar 2 SoC
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/br
://lkml.org/lkml/2015/10/13/882) due to
the inability to merge because of the driver dependencies. Those
necessary driver changes were merged into 4.4. All comments have been
addressed and it is ready to be pulled in.
Jon Mason (3):
ARM: dts: enable clock support for BCM5301X
ARM: dts
On Thu, Nov 19, 2015 at 03:40:04PM -0800, Ray Jui wrote:
>
>
> On 11/19/2015 3:05 PM, Jon Mason wrote:
> >Replace current device tree dummy clocks with real clock support for
> >Broadcom Northstar Plus SoC
> >
> >Signed-off-by: Jon Mason <jonma...@broadcom.co
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar Plus SoC
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 81 ++
1 file changed, 66 insertions(+), 15 deletions(-)
diff
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar Plus SoC
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm-nsp.dtsi | 77 +++---
1 file changed, 64 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/bcm
to merge because of the driver dependencies. Those
necessary driver changes were merged into 4.4. All comments have been
addressed and it is ready to be pulled in.
Jon Mason (3):
ARM: dts: enable clock support for BCM5301X
ARM: dts: enable clock support for Broadcom NSP
ARM64: dts: enable
Add device tree entries for clock support for Broadcom Northstar 2 SoC
Signed-off-by: Jon Mason
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
b/arch/arm64
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts
DT changes per platform and send them out in the same series.
>
> I also have some inline comments below.
>
> On 11/18/2015 3:13 PM, Jon Mason wrote:
> >Replace current device tree dummy clocks with real clock support for
> >Broadcom Northstar Plus SoC
> >
> >Sign
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git
to merge because of the driver dependencies. Those
necessary driver changes were merged into 4.4. All comments have been
addressed and it is ready to be pulled in.
Jon Mason (3):
ARM: dts: enable clock support for BCM5301X
ARM: dts: enable clock support for Broadcom NSP
ARM64: dts: enable
Add device tree entries for clock support for Broadcom Northstar 2 SoC
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/br
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar Plus SoC
Signed-off-by: Jon Mason <jonma...@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 77 +++---
1 file changed, 64 insertions(+), 13 deletions(-)
diff
DT changes per platform and send them out in the same series.
>
> I also have some inline comments below.
>
> On 11/18/2015 3:13 PM, Jon Mason wrote:
> >Replace current device tree dummy clocks with real clock support for
> >Broadcom Northstar Plus SoC
> >
>
Replace current device tree dummy clocks with real clock support for
Broadcom Northstar SoCs.
Signed-off-by: Jon Mason
---
arch/arm/boot/dts/bcm5301x.dtsi | 92 +++--
1 file changed, 71 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts
. All comments have been
addressed and it is ready to be pulled in.
Jon Mason (3):
ARM: dts: enable clock support for BCM5301X
ARM: dts: enable clock support for Broadcom NSP
ARM64: dts: enable clock support for Broadcom NS2
arch/arm/boot/dts/bcm-nsp.dtsi| 99
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