On Wed, 17 Mar 2021 at 10:16, Álvaro Fernández Rojas wrote:
>
> Hi Vladimir,
>
> > El 15 mar 2021, a las 22:28, Vladimir Oltean escribió:
> >
> > On Mon, Mar 15, 2021 at 03:27:35PM +0100, Álvaro Fernández Rojas wrote:
> >> Add support for legacy Broadcom tags, which are similar to
> >>
On Wed, 14 Aug 2019 at 16:37, Thomas Bogendoerfer wrote:
>
> On Wed, 14 Aug 2019 15:20:14 +0200
> Jonas Gorski wrote:
>
> > > + d = devm_kzalloc(>dev, sizeof(*d), GFP_KERNEL);
> >
> > >dev => dev
>
> will change.
>
> >
&
Hi,
On Fri, 9 Aug 2019 at 12:33, Thomas Bogendoerfer wrote:
>
> This patch adds a platform driver for supporting keyboard and mouse
> interface of SGI IOC3 chips.
>
> Signed-off-by: Thomas Bogendoerfer
> ---
> drivers/input/serio/Kconfig | 10 +++
> drivers/input/serio/Makefile | 1 +
>
On Sat, 4 May 2019 at 12:18, Jonas Gorski wrote:
>
> Since the fork and remerge of LEDE and OpenWrt.org, use of @openwrt.org
> addresses has been discouraged, and some addresses aren't even working
> anymore. To avoid patches being overlooked add appropriate mappings
> based o
the addresses in MAINTAINERS.
Signed-off-by: Jonas Gorski
---
.mailmap| 9 +
MAINTAINERS | 4 ++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/.mailmap b/.mailmap
index ae2bcad06f4b..842f69b019d4 100644
--- a/.mailmap
+++ b/.mailmap
@@ -58,14 +58,17 @@ Douglas Gilbert
Ed
ote:
> >
> > Hi!
> >
> > On 07.04.2019 11:04, Masahiro Yamada wrote:
> > > (+CC Jonas Gorski)
> > >
> > >
> > > On Tue, Mar 26, 2019 at 6:58 PM Wiebe, Wladislav (Nokia - DE/Ulm)
> > > wrote:
> > >>
> > >> Commit e
On Thu, 21 Feb 2019 at 21:39, Paul Cercueil wrote:
>
> Add support for booting the kernel from an externally-appended
> devicetree, if no devicetree was built-in.
>
> Signed-off-by: Paul Cercueil
> ---
> arch/mips/Kconfig| 2 +-
> arch/mips/jz4740/setup.c | 14 +++---
> 2 files
e fb1a6b14d74e28b6 ]---
[2.773544] bcm63xx_enetsw bcm63xx_enetsw.0: cannot allocate rx ring 512
Fix this by adding appropriate DMA masks for the platform devices.
Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple
noncoherent platforms")
Signed-off-by: Jonas Gorsk
On Wed, 20 Feb 2019 at 06:18, George Hilliard
wrote:
>
> The driver previously grabbed the SD pins for itself, ignoring the pin
> controller. Replace this direct register access with appropriate calls
> to the pinctrl subsystem.
>
> This also allows this driver to work on related devices that
hwrng: bcm2835 - Enable BCM2835 RNG to work on BCM63xx
platforms")
Signed-off-by: Jonas Gorski
---
drivers/char/hw_random/bcm2835-rng.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/char/hw_random/bcm2835-rng.c
b/drivers/char/hw_random/bcm2835-r
On 19 September 2018 at 16:31, Jim Quinlan wrote:
> The DT bindings description of the Brcmstb PCIe device is described.
> This node can be used by almost all Broadcom settop box chips, using
> ARM, ARM64, or MIPS CPU architectures.
Oh, hey, *one* email made it finally through :P
>
>
On 19 September 2018 at 16:31, Jim Quinlan wrote:
> The DT bindings description of the Brcmstb PCIe device is described.
> This node can be used by almost all Broadcom settop box chips, using
> ARM, ARM64, or MIPS CPU architectures.
Oh, hey, *one* email made it finally through :P
>
>
bcm7038_l1_cpu_offline only when actually
compiling for SMP. It wouldn't have been used anyway, as it requires
CPU_HOTPLUG, which in turn requires SMP.
Fixes: 34c535793bcb ("irqchip/bcm7038-l1: Implement irq_cpu_offline() callback")
Signed-off-by: Jonas Gorski
---
drivers/irqchip/irq-bcm7038-l1.c |
bcm7038_l1_cpu_offline only when actually
compiling for SMP. It wouldn't have been used anyway, as it requires
CPU_HOTPLUG, which in turn requires SMP.
Fixes: 34c535793bcb ("irqchip/bcm7038-l1: Implement irq_cpu_offline() callback")
Signed-off-by: Jonas Gorski
---
drivers/irqchip/irq-bcm7038-l1.c |
On 6 March 2018 at 15:20, Mark Brown <broo...@kernel.org> wrote:
> On Tue, Mar 06, 2018 at 02:42:43PM +0100, Jonas Gorski wrote:
>> On 5 March 2018 at 21:35, Mark Brown <broo...@kernel.org> wrote:
>
>> > It's exposing more capability information but it's in the &qu
On 6 March 2018 at 15:20, Mark Brown wrote:
> On Tue, Mar 06, 2018 at 02:42:43PM +0100, Jonas Gorski wrote:
>> On 5 March 2018 at 21:35, Mark Brown wrote:
>
>> > It's exposing more capability information but it's in the "how did this
>> > ever work wi
On 5 March 2018 at 21:35, Mark Brown wrote:
> On Mon, Mar 05, 2018 at 08:07:46PM +, Sasha Levin wrote:
>> On Mon, Mar 05, 2018 at 10:23:10AM +, Mark Brown wrote:
>> >On Sat, Mar 03, 2018 at 10:27:56PM +, Sasha Levin wrote:
>
>> >> The bcm63xx SPI controller does
On 5 March 2018 at 21:35, Mark Brown wrote:
> On Mon, Mar 05, 2018 at 08:07:46PM +, Sasha Levin wrote:
>> On Mon, Mar 05, 2018 at 10:23:10AM +, Mark Brown wrote:
>> >On Sat, Mar 03, 2018 at 10:27:56PM +, Sasha Levin wrote:
>
>> >> The bcm63xx SPI controller does not allow manual
On 16 January 2018 at 11:12, Alexandre Belloni
wrote:
> Add a device tree include file for the Microsemi Ocelot SoC.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/mips/boot/dts/Makefile | 1 +
>
On 16 January 2018 at 11:12, Alexandre Belloni
wrote:
> Add a device tree include file for the Microsemi Ocelot SoC.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/mips/boot/dts/Makefile | 1 +
> arch/mips/boot/dts/mscc/Makefile| 4 ++
> arch/mips/boot/dts/mscc/ocelot.dtsi |
On 9 February 2018 at 17:04, Marc Zyngier wrote:
> On 09/02/18 15:54, Florian Fainelli wrote:
>> On February 9, 2018 12:51:33 AM PST, Marc Zyngier
>> wrote:
>>> On 09/02/18 02:10, Jaedon Shin wrote:
Since commit ad67b74d2469 ("printk: hash
On 9 February 2018 at 17:04, Marc Zyngier wrote:
> On 09/02/18 15:54, Florian Fainelli wrote:
>> On February 9, 2018 12:51:33 AM PST, Marc Zyngier
>> wrote:
>>> On 09/02/18 02:10, Jaedon Shin wrote:
Since commit ad67b74d2469 ("printk: hash addresses printed with %p")
pointers printed
Hi,
On 24 October 2017 at 20:15, Jim Quinlan wrote:
> The DT bindings description of the Brcmstb PCIe device is described. This
> node can be used by almost all Broadcom settop box chips, using
> ARM, ARM64, or MIPS CPU architectures.
>
> Signed-off-by: Jim Quinlan
Hi,
On 24 October 2017 at 20:15, Jim Quinlan wrote:
> The DT bindings description of the Brcmstb PCIe device is described. This
> node can be used by almost all Broadcom settop box chips, using
> ARM, ARM64, or MIPS CPU architectures.
>
> Signed-off-by: Jim Quinlan
> ---
>
Hi Masahiro,
On 9 October 2017 at 18:25, Masahiro Yamada
<yamada.masah...@socionext.com> wrote:
> 2017-10-02 19:50 GMT+09:00 Jonas Gorski <jonas.gor...@gmail.com>:
>> By passing appropriate values in KBUILD_EXTRA_SYMBOLS it is possible to
>> make modpost be
Hi Masahiro,
On 9 October 2017 at 18:25, Masahiro Yamada
wrote:
> 2017-10-02 19:50 GMT+09:00 Jonas Gorski :
>> By passing appropriate values in KBUILD_EXTRA_SYMBOLS it is possible to
>> make modpost be able to resolve all symbols for external modules, even
>> between to o
missing exports there
as well.
So add a new flag KBUILD_MODPOST_ERROR which can be set to enable this
behaviour. It has no effect on non external module builds.
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
The main target is to allow distributions (like LEDE) that make use of
missing exports there
as well.
So add a new flag KBUILD_MODPOST_ERROR which can be set to enable this
behaviour. It has no effect on non external module builds.
Signed-off-by: Jonas Gorski
---
The main target is to allow distributions (like LEDE) that make use of
kernel backports and other out
Hi Greg,
On 18 July 2017 at 14:03, Greg Ungerer <g...@linux-m68k.org> wrote:
> Hi Jonas,
>
> On 18/07/17 20:17, Jonas Gorski wrote:
>>
>> Make the behaviour of clk_get_rate consistent with common clk's
>> clk_get_rate by accepting NULL clocks as param
Hi Greg,
On 18 July 2017 at 14:03, Greg Ungerer wrote:
> Hi Jonas,
>
> On 18/07/17 20:17, Jonas Gorski wrote:
>>
>> Make the behaviour of clk_get_rate consistent with common clk's
>> clk_get_rate by accepting NULL clocks as parameter. Some device
>> drivers rel
<eric.y.m...@gmail.com>
Cc: Haojian Zhuang <haojian.zhu...@gmail.com>
Cc: Russell King <li...@armlinux.org.uk>
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor
c Miao
Cc: Haojian Zhuang
Cc: Russell King
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/arm/mach-mmp/clock.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mmp/clock.c
Baechle <r...@linux-mips.org>
Cc: Florian Fainelli <f.faine...@gmail.com>
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: James Hogan <james.ho...@imgtec.com>
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Sign
...@lists.sourceforge.net
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-m...@linux-mips.org
Jonas Gorski (9):
ARM: ep93xx: allow NULL clock for clk_get_rate
ARM: mmp: allow NULL clock for clk_get_rate
aechle
Cc: Florian Fainelli
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: James Hogan
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/mips/bcm63xx/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a
...@lists.sourceforge.net
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-m...@linux-mips.org
Jonas Gorski (9):
ARM: ep93xx: allow NULL clock for clk_get_rate
ARM: mmp: allow NULL clock for clk_get_rate
: Paul Gortmaker <paul.gortma...@windriver.com>
Cc: James Hogan <james.ho...@imgtec.com>
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
arch/mips/ar7/clock
ten <hswee...@visionengravers.com>
Cc: Alexander Sverdlin <alexander.sverd...@gmail.com>
Cc: Russell King <li...@armlinux.org.uk>
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jo
Hogan
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/mips/ar7/clock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c
index dda422a0f36c..0137656107a9 100644
weeten
Cc: Alexander Sverdlin
Cc: Russell King
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/arm/mach-ep93xx/clock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-ep93xx/clock.c
Ralf Baechle <r...@linux-mips.org>
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
arch/mips/ralink/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/
gt;
Cc: Masahiro Yamada <yamada.masah...@socionext.com>
Cc: Andrew Morton <a...@linux-foundation.org>
Cc: adi-buildroot-de...@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
-
m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/mips/ralink/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index eb1c61917eb7..1b7df115eb60 100644
--- a/arch/mips/ra
Cc: Andrew Morton
Cc: adi-buildroot-de...@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/blackfin/mach-bf609/clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/blackfin/mach-bf609/clock.c b/arch/bla
on this, and will cause an OOPS otherwise.
Fixes: f8ede0f700f5 ("MIPS: Loongson 2F: Add CPU frequency scaling support")
Cc: Ralf Baechle <r...@linux-mips.org>
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signe
on this, and will cause an OOPS otherwise.
Fixes: f8ede0f700f5 ("MIPS: Loongson 2F: Add CPU frequency scaling support")
Cc: Ralf Baechle
Cc: linux-m...@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/mips/loongson64/lemote-
Xuetao <g...@mprc.pku.edu.cn>
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
arch/unicore32/kernel/clock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/unicore32/kernel/clock.c b/arch/un
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/unicore32/kernel/clock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/unicore32/kernel/clock.c b/arch/unicore32/kernel/clock.c
index b1ca775f6f6e..d867f34fdb74 100644
--- a/arch/unicor
-m68k.org>
Cc: Geert Uytterhoeven <ge...@linux-m68k.org>
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin <d...@kresin.me>
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
arch/m68k/coldfire/clk.c | 3 +++
1 file changed,
tterhoeven
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-kernel@vger.kernel.org
Reported-by: Mathias Kresin
Signed-off-by: Jonas Gorski
---
arch/m68k/coldfire/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/m68k/coldfire/clk.c b/arch/m68k/coldfire/clk.c
index 1e3c7e9193d1..85
Hi,
On 28 June 2017 at 17:47, Aleksandar Markovic
wrote:
> From: Miodrag Dinic
>
> ARCH_MIGHT_HAVE_PC_SERIO is selected by default for MIPS platforms.
> As a consequence SERIO_I8042 would be automatically selected for any
> MIPS board
Hi,
On 28 June 2017 at 17:47, Aleksandar Markovic
wrote:
> From: Miodrag Dinic
>
> ARCH_MIGHT_HAVE_PC_SERIO is selected by default for MIPS platforms.
> As a consequence SERIO_I8042 would be automatically selected for any
> MIPS board which wants to enable input support like keyboard
>
t;>> [0.00] Early memory node ranges
>>> [0.00] node 0: [mem 0x-0x07ff]
>>> [0.00] Initmem setup node 0 [mem
>>> 0x-0x07ff]
>>> [0.00] percpu: Embedded 15 pages
] Early memory node ranges
>>> [0.00] node 0: [mem 0x-0x07ff]
>>> [0.00] Initmem setup node 0 [mem
>>> 0x-0x07ff]
>>> [0.00] percpu: Embedded 15 pages/cpu @8110c000 s30176 r8192
>
Hi Andreas,
On 8 June 2017 at 16:28, Andreas Ziegler wrote:
> Hi Jonas,
>
> I noticed your patch 'regmap: make LZO cache optional' as it recently showed
> up
> in linux-next. In your patch, you modify drivers/base/regmap/regcache.c by
> adding an #if IS_ENABLED()
Hi Andreas,
On 8 June 2017 at 16:28, Andreas Ziegler wrote:
> Hi Jonas,
>
> I noticed your patch 'regmap: make LZO cache optional' as it recently showed
> up
> in linux-next. In your patch, you modify drivers/base/regmap/regcache.c by
> adding an #if IS_ENABLED() statement.
>
> However, this
s own size, it
currently is rather a deoptimization.
Saves ~46 kB on MIPS (size of LZO support + regcache LZO code).
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
V1 -> V2:
* remove code instead of hide code behind Kconfig option
drivers/base/regmap/Kconfig| 2 -
s own size, it
currently is rather a deoptimization.
Saves ~46 kB on MIPS (size of LZO support + regcache LZO code).
Signed-off-by: Jonas Gorski
---
V1 -> V2:
* remove code instead of hide code behind Kconfig option
drivers/base/regmap/Kconfig| 2 -
drivers/base/regmap/Makefil
l that can be selected by
drivers wanting to make use of it.
Saves e.g. ~46 kB on MIPS (size of LZO support + regcache LZO code).
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
I tried using google to find any users (even out-of-tree ones), but at
best I found a single d
l that can be selected by
drivers wanting to make use of it.
Saves e.g. ~46 kB on MIPS (size of LZO support + regcache LZO code).
Signed-off-by: Jonas Gorski
---
I tried using google to find any users (even out-of-tree ones), but at
best I found a single driver submission that was switched
28-hsspiC*
> alias: of:N*T*Cbrcm,bcm6328-hsspi
>
> Signed-off-by: Andres Galacho <andresgala...@gmail.com>
Not that it matters much with a trivial patch like this, but
Acked-by: Jonas Gorski <jonas.gor...@gmail.com>
also thanks for doing it.
Regards
Jonas
T*Cbrcm,bcm6328-hsspi
>
> Signed-off-by: Andres Galacho
Not that it matters much with a trivial patch like this, but
Acked-by: Jonas Gorski
also thanks for doing it.
Regards
Jonas
Hi,
On 13 February 2017 at 09:37, Alban <al...@free.fr> wrote:
> On Thu, 9 Feb 2017 13:22:37 +0100
> Jonas Gorski <jonas.gor...@gmail.com> wrote:
>
>> Hi,
>>
>> On 5 February 2017 at 21:21, Alban <al...@free.fr> wrote:
>> > From: Alban Bede
Hi,
On 13 February 2017 at 09:37, Alban wrote:
> On Thu, 9 Feb 2017 13:22:37 +0100
> Jonas Gorski wrote:
>
>> Hi,
>>
>> On 5 February 2017 at 21:21, Alban wrote:
>> > From: Alban Bedel
>> >
>> > Normally compressed images have to be loaded
Hi,
On 5 February 2017 at 21:21, Alban wrote:
> From: Alban Bedel
>
> Normally compressed images have to be loaded at a different address to
> allow the decompressor to run. This add an option to let vmlinuz copy
> itself to the correct address from the normal
Hi,
On 5 February 2017 at 21:21, Alban wrote:
> From: Alban Bedel
>
> Normally compressed images have to be loaded at a different address to
> allow the decompressor to run. This add an option to let vmlinuz copy
> itself to the correct address from the normal vmlinux address.
>
>
IFF_LOWER_UP, IFF_DORMANT or IFF_ECHO.
Fixes: 4a91cb61bb99 ("uapi glibc compat: fix compile errors when glibc net/if.h
included before linux/if.h")
Signed-off-by: Jonas Gorski <jonas.gor...@gmail.com>
---
Patch applies cleanly to both linus' HEAD and net-next. I wasn't sure
which one
IFF_LOWER_UP, IFF_DORMANT or IFF_ECHO.
Fixes: 4a91cb61bb99 ("uapi glibc compat: fix compile errors when glibc net/if.h
included before linux/if.h")
Signed-off-by: Jonas Gorski
---
Patch applies cleanly to both linus' HEAD and net-next. I wasn't sure
which one's the right one.
include/uapi/linu
Hi,
On 9 August 2016 at 14:35, Paul Burton wrote:
> Introduce support for probing the SEAD3 EHCI driver using device tree.
>
> Signed-off-by: Paul Burton
> ---
>
> drivers/usb/host/ehci-sead3.c | 29 +++--
> 1 file
Hi,
On 9 August 2016 at 14:35, Paul Burton wrote:
> Introduce support for probing the SEAD3 EHCI driver using device tree.
>
> Signed-off-by: Paul Burton
> ---
>
> drivers/usb/host/ehci-sead3.c | 29 +++--
> 1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff
Hi,
On 3 August 2016 at 13:02, Álvaro Fernández Rojas wrote:
> Subject: [PATCH 2/2] gpio: dt-bindings: add brcm,bcm6345-gpio bindings
Minor nitpick: I think the bindings should come first, then the
consumer. We shouldn't add support for it without having okayed the
binding.
Hi,
On 3 August 2016 at 13:02, Álvaro Fernández Rojas wrote:
> Subject: [PATCH 2/2] gpio: dt-bindings: add brcm,bcm6345-gpio bindings
Minor nitpick: I think the bindings should come first, then the
consumer. We shouldn't add support for it without having okayed the
binding.
> This patch adds
Hi,
On 13 June 2016 at 09:38, Álvaro Fernández Rojas wrote:
> This adds a device tree example for SFR NeufBox 6.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/bmips/Kconfig| 4 +
> arch/mips/boot/dts/brcm/Makefile
Hi,
On 13 June 2016 at 09:38, Álvaro Fernández Rojas wrote:
> This adds a device tree example for SFR NeufBox 6.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/bmips/Kconfig| 4 +
> arch/mips/boot/dts/brcm/Makefile | 2 +
>
Hi Álvaro,
On 13 June 2016 at 09:38, Álvaro Fernández Rojas wrote:
> Console definition is needed in order to avoid a warning in earlycon to
> console transition.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/boot/dts/brcm/bcm96358nb4ser.dts
Hi Álvaro,
On 13 June 2016 at 09:38, Álvaro Fernández Rojas wrote:
> Console definition is needed in order to avoid a warning in earlycon to
> console transition.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> arch/mips/boot/dts/brcm/bcm96358nb4ser.dts | 1 +
> 1 file changed, 1
Hi,
On 3 June 2016 at 10:12, Álvaro Fernández Rojas wrote:
> BCM6345 has only one CPU, so SMP support must be disabled.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> Documentation/devicetree/bindings/mips/brcm/soc.txt | 2 +-
> arch/mips/bmips/setup.c
Hi,
On 3 June 2016 at 10:12, Álvaro Fernández Rojas wrote:
> BCM6345 has only one CPU, so SMP support must be disabled.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> Documentation/devicetree/bindings/mips/brcm/soc.txt | 2 +-
> arch/mips/bmips/setup.c | 9
Hi,
On 27 January 2016 at 00:16, Florian Fainelli wrote:
> On 26/01/16 14:46, Mark Brown wrote:
>> On many MIPS systems the endianness of IP blocks is kept the same as
>> that of the CPU by the hardware. This includes the system controllers
>> on these systems which are controlled via syscon
Hi,
On 27 January 2016 at 00:16, Florian Fainelli wrote:
> On 26/01/16 14:46, Mark Brown wrote:
>> On many MIPS systems the endianness of IP blocks is kept the same as
>> that of the CPU by the hardware. This includes the system controllers
>> on these systems which are
On Fri, Dec 11, 2015 at 11:24 PM, Simon Arlott wrote:
> On 11/12/15 22:02, Jonas Gorski wrote:
>> Hi,
>>
>> On Fri, Dec 11, 2015 at 10:54 PM, Simon Arlott wrote:
>>> Broadcom BCM963xx boards have multiple nvram variants across different
>>> SoCs with ad
parser
> + * Copyright 2015 Simon Arlott
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option
Hi,
On Fri, Dec 11, 2015 at 10:54 PM, Simon Arlott wrote:
> Broadcom BCM963xx boards have multiple nvram variants across different
> SoCs with additional checksum fields added whenever the size of the
> nvram was extended.
>
> Add this structure as a header file so that multiple drivers and
Hi,
On Fri, Dec 11, 2015 at 10:54 PM, Simon Arlott wrote:
> Broadcom BCM963xx boards have multiple nvram variants across different
> SoCs with additional checksum fields added whenever the size of the
> nvram was extended.
>
> Add this structure as a header file so that
; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See t
On Fri, Dec 11, 2015 at 11:24 PM, Simon Arlott <si...@fire.lp0.eu> wrote:
> On 11/12/15 22:02, Jonas Gorski wrote:
>> Hi,
>>
>> On Fri, Dec 11, 2015 at 10:54 PM, Simon Arlott <si...@fire.lp0.eu> wrote:
>>> Broadcom BCM963xx boards have multipl
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> The platform description (such as the type of partition formats used on
> a given flash) should be done independently of the flash driver in use.
> However, we can't reasonably have *all* partition parsers run on all
> flash (until they find a
Hi,
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> Hi,
>
> There have been several discussions [1] about adding a device tree binding for
> associating flash devices with the partition parser(s) that are used on the
> flash. There are a few reasons:
>
> (1) drivers shouldn't have to be
Hi,
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> Hi,
>
> There have been several discussions [1] about adding a device tree binding for
> associating flash devices with the partition parser(s) that are used on the
> flash. There are a few reasons:
>
> (1)
On Sat, Dec 5, 2015 at 6:19 AM, Brian Norris
wrote:
> The platform description (such as the type of partition formats used on
> a given flash) should be done independently of the flash driver in use.
> However, we can't reasonably have *all* partition parsers run on
On Thu, Dec 3, 2015 at 12:41 AM, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM6368.
>
> The BCM6368 has a NAND interrupt register with combined status and enable
> registers. It also requires a clock, so add an optional clock to the
> common brcmnand binding.
>
>
On Thu, Dec 3, 2015 at 12:41 AM, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM6368.
>
> The BCM6368 has a NAND interrupt register with combined status and enable
> registers. It also requires a clock, so add an optional clock to the
> common brcmnand
Hi,
On Wed, Dec 2, 2015 at 9:54 PM, Brian Norris
wrote:
> Hi,
>
> On Wed, Dec 02, 2015 at 09:44:04PM +0100, Jonas Gorski wrote:
>> On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott wrote:
>> > On 01/12/15 10:41, Jonas Gorski wrote:
>> >> On Sat, Nov 28,
On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott wrote:
> On 01/12/15 10:41, Jonas Gorski wrote:
>> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott wrote:
>>> +
>>> + /* Go to start of buffer */
>>> + buf -= FC_WORDS;
>>> +
>
On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>>
Hi,
On Wed, Dec 2, 2015 at 5:14 PM, Qais Yousef wrote:
> This reverts commit 52493d446141b07c8ba28dd6a529513f8b2342bd.
>
> Signed-off-by: Qais Yousef
>
> Conflicts:
> include/linux/of_irq.h
> ---
> I have a patch series that is under review that makes use of
> of_irq_find_parent()
>
>
Hi,
On Wed, Dec 2, 2015 at 5:14 PM, Qais Yousef wrote:
> This reverts commit 52493d446141b07c8ba28dd6a529513f8b2342bd.
>
> Signed-off-by: Qais Yousef
>
> Conflicts:
> include/linux/of_irq.h
> ---
> I have a patch series that is under
On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott <si...@fire.lp0.eu> wrote:
> On 01/12/15 10:41, Jonas Gorski wrote:
>> On Sat, Nov 28, 2015 at 8:23 PM, Simon Arlott <si...@fire.lp0.eu> wrote:
>>> +
>>> + /* Go to start of buffer */
>>> + buf
On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status
Hi,
On Wed, Dec 2, 2015 at 9:54 PM, Brian Norris
<computersforpe...@gmail.com> wrote:
> Hi,
>
> On Wed, Dec 02, 2015 at 09:44:04PM +0100, Jonas Gorski wrote:
>> On Wed, Dec 2, 2015 at 9:17 PM, Simon Arlott <si...@fire.lp0.eu> wrote:
>> > On 01/12/15 10:41, Jona
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