_t
to raw_spinlock_t
Cc: sta...@vger.kernel.org
Fixes: 25da4618af24 ("xen/events: don't unmask an event channel
when an eoi is pending")
Signed-off-by: Luca Fancellu
Reviewed-by: Julien Grall
Cheers,
--
Julien Grall
On 3/7/21 11:25 AM, Ard Biesheuvel wrote:
On Wed, 3 Mar 2021 at 18:10, Julien Thierry wrote:
From: Raphael Gault
Add build option to run stack validation at compile time.
When requiring stack validation, jump tables are disabled as it
simplifies objtool analysis (without having to
there are multiple parts in arm64 assembler needing this). I have
not submitted those yet because I didn't want the amount of patches to
become overwhelming and mixing objtool + kernel sources.
[1]
https://github.com/julien-thierry/linux/commit/9005e9f3bb10aac663c42bb87d337b7a1aae5a
ke bellow which is simple
enough to use and update.
Otherwise you could have per arch targets, but since the generic part of
objtool uses arch specific headers, you'll have to rebuild object files
between two arch builds anyway.
Julien
-->
>From 36cf9e05f2ee40bd5239c3b78cd1c5260941cb94
ARM64_CB_PATCH doesn't have static replacement instructions. Skip
trying to validate the alternative section.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/special.c | 12
tools/objtool/check.c | 3 +++
2 files changed, 15 insertions(+)
diff --
Under tools, bug.h only defines BUILD_BUG_ON_ZERO() which is already
defined in build_bug.h. This prevents a file to include both headers at
the same time.
Have bug.h include build_bug.h instead.
Signed-off-by: Julien Thierry
---
tools/include/linux/bug.h | 6 +-
1 file changed, 1
Decode ERET, BRK and NOPs
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
index 983f16b8b2af..3008dcbb5e64 100644
--- a/tools/objtool/arch/arm64
Load literal instructions can generate constants inside code sections.
Record the locations of the constants in order to be able to remove
their corresponding "struct instruction".
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c| 86 +
Decode branch, branch and link (aarch64's call) and return instructions.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
Add aarch64 encoder/decoder implementation under tools/ as well
as the necessary arm64 headers.
Signed-off-by: Julien Thierry
---
tools/arch/arm64/include/asm/insn.h | 565 +++
tools/arch/arm64/lib/insn.c | 1456 +++
2 files changed, 2021 insertions
These will be needed to be able to use arm64 instruction decoder in
userland tools.
Signed-off-by: Julien Thierry
---
tools/include/asm-generic/bitops/__ffs.h | 11 +++
tools/include/linux/kernel.h | 21 +
tools/include/linux/printk.h | 40
size nor system performance.
Signed-off-by: Raphael Gault
Signed-off-by: Julien Thierry
---
arch/arm64/Kconfig | 1 +
arch/arm64/Makefile | 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1f212b47a48a..928323c03318 100644
--- a/arch/arm64
The compiler can introduce some '0' words in code sections to pad the
end of functions.
Similar to load literal functions, record these zero words to remove
the "struct instruction" created for them.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 19 ++
the base pointer after the
load).
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 148 ++
1 file changed, 148 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
index 3008dcbb5e64..4e086d2251f5 100644
Provide some function to group different load/store instructions.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 388aa22eacb1
Decode aarch64 additions and substractions and create stack_ops for
instructions interacting with SP or FP.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 94 +++
1 file changed, 94 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
Provide needed definitions for a new architecture instruction decoder.
No proper decoding is done yet.
Signed-off-by: Julien Thierry
---
tools/objtool/Makefile| 5 +
tools/objtool/arch/arm64/Build| 8 ++
tools/objtool/arch/arm64/decode.c
e changes, there are still some errors when building with objtool. A
number of cleanups/annotations are needed on the arm64, as well as
handling SYM_DATA objects in objtool.
Those changes can be found on top of this branch here:
git clone https://github.com/julien-thierry/linux.git -b objtoolxa
Based on get_alt_insn() in arch/arm64/kernel/alternative.c, arm64
alternative code adapts offsets for static branches and adrp
instructions.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/special.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tools
Add decoding capability for some instructions that objtool will need
to decode.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 185f52ef0228
Create necessary functions to encode/decode aarch64 barrier
instructions.
DSB needs special case handling as it has multiple encodings.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/include
The instruction encoder/decoder depends on alternative headers only
for single macro definitions that could be part of the instruction
decoder.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/alternative-macros.h | 3 ---
arch/arm64/include/asm/insn.h | 3 ++-
2 files
SVE has been public for some time now. Let the decoder acknowledge
its existence.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h | 1 +
arch/arm64/lib/insn.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64
.
Code was only moved, no code should have been added, removed nor
modifier.
Signed-off-by: Julien Thierry
---
arch/arm64/kernel/Makefile| 2 +-
arch/arm64/lib/Makefile | 6 +++---
arch/arm64/{kernel => lib}/insn.c | 0
3 files changed, 4 insertions(+), 4 deletions(-)
rename a
The functions to check condition flags for aarch32 execution is only
used to emulate aarch32 instructions. Move them from the instruction
encoding/decoding code to the trap handling files.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h| 2 -
arch/arm64/include/asm
Files insn.[c|h] containt some functions used for instruction patching.
In order to reuse the instruction encoder/decoder, move the patching
utilities to their own file.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/insn.h | 5 -
arch/arm64/include/asm/patching.h | 13
encoder/decoder capabilities in
several steps as suggested by Mark R.
- Exclude dsb encoding where CRm != 0b0x00
- Support dsb FEAT_XS encoding
- Support previously missing barriers
[1] https://lkml.org/lkml/2021/1/20/791
Thanks,
Julien
-->
Julien Thierry (8):
arm64: Move patching utilit
t data and
call the handler only if this flag isn't set.
Cc: sta...@vger.kernel.org
Reported-by: Julien Grall
Signed-off-by: Juergen Gross
Reviewed-by: Julien Grall
Cheers,
--
Julien Grall
"normal" masking/unmasking from eoi related
masking/unmasking and temporary masking. The event channel should only
be able to generate an interrupt if all flags are cleared.
Cc: sta...@vger.kernel.org
Fixes: 54c9de89895e0a36047 ("xen/events: add a new late EOI evtchn framework")
Repor
t data and
call the handler only if this flag isn't set.
Reported-by: Julien Grall
Signed-off-by: Juergen Gross
---
V2:
- new patch
---
drivers/xen/events/events_base.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/xen/events/events_base.
zeroed out).
Cc: sta...@vger.kernel.org
Reported-by: Julien Grall
Signed-off-by: Juergen Gross
Reviewed-by: Julien Grall
Cheers,
---
V2:
- reset affinity when tearing down the event (Julien Grall)
---
drivers/xen/events/events_2l.c | 15 +++
drivers/xen/events
From: Julien Grall
After Commit 3499ba8198cad ("xen: Fix event channel callback via
INTX/GSI"), xenbus_probe() will be called too early on Arm. This will
recent to a guest hang during boot.
If there hang wasn't there, we would have ended up to call
xenbus_probe() twice (the se
On 08/02/2021 14:20, Julien Grall wrote:
I believe this will be the case before our "lateeoi" handling is
becoming active (more precise: when our IRQ handler is returning to
handle_fasteoi_irq()), resulting in the possibility of the same race we
are experiencing now.
I am a bi
Hi Juergen,
On 08/02/2021 13:58, Jürgen Groß wrote:
On 08.02.21 14:09, Julien Grall wrote:
Hi Juergen,
On 08/02/2021 12:31, Jürgen Groß wrote:
On 08.02.21 13:16, Julien Grall wrote:
On 08/02/2021 12:14, Jürgen Groß wrote:
On 08.02.21 11:40, Julien Grall wrote:
Hi Juergen,
On 08/02/2021
Hi Juergen,
On 08/02/2021 12:31, Jürgen Groß wrote:
On 08.02.21 13:16, Julien Grall wrote:
On 08/02/2021 12:14, Jürgen Groß wrote:
On 08.02.21 11:40, Julien Grall wrote:
Hi Juergen,
On 08/02/2021 10:22, Jürgen Groß wrote:
On 08.02.21 10:54, Julien Grall wrote:
... I don't really se
On 08/02/2021 12:14, Jürgen Groß wrote:
On 08.02.21 11:40, Julien Grall wrote:
Hi Juergen,
On 08/02/2021 10:22, Jürgen Groß wrote:
On 08.02.21 10:54, Julien Grall wrote:
... I don't really see how the difference matter here. The idea is
to re-use what's already existing rather t
Hi Juergen,
On 08/02/2021 11:48, Jürgen Groß wrote:
On 08.02.21 12:40, Julien Grall wrote:
On 06/02/2021 10:49, Juergen Gross wrote:
In evtchn_read() use READ_ONCE() for reading the producer index in
order to avoid the compiler generating multiple accesses.
Signed-off-by: Juergen Gross
or properly
aligned machine-sized stores, WRITE_ONCE() will prevent store tearing."
Cheers,
[1] https://lwn.net/Articles/793253/#Load%20Tearing
Juergen
--
Julien Grall
ons;
- p = u->ring_prod;
+ p = READ_ONCE(u->ring_prod);
For consistency, don't you also need the write side in
evtchn_interrupt() to use WRITE_ONCE()?
if (c != p)
break;
--
Julien Grall
Hi Juergen,
On 08/02/2021 10:22, Jürgen Groß wrote:
On 08.02.21 10:54, Julien Grall wrote:
... I don't really see how the difference matter here. The idea is to
re-use what's already existing rather than trying to re-invent the
wheel with an extra lock (or whatever we can come
On 08/02/2021 09:41, Jürgen Groß wrote:
On 08.02.21 10:11, Julien Grall wrote:
Hi Juergen,
On 07/02/2021 12:58, Jürgen Groß wrote:
On 06.02.21 19:46, Julien Grall wrote:
Hi Juergen,
On 06/02/2021 10:49, Juergen Gross wrote:
The first three patches are fixes for XSA-332. The avoid WARN
Hi Juergen,
On 07/02/2021 12:58, Jürgen Groß wrote:
On 06.02.21 19:46, Julien Grall wrote:
Hi Juergen,
On 06/02/2021 10:49, Juergen Gross wrote:
The first three patches are fixes for XSA-332. The avoid WARN splats
and a performance issue with interdomain events.
Thanks for helping to
we may want to consider to hold evtchn_rwlock with the write
permission. Although, I am not 100% sure this is going to prevent
everything.
Does my write-up make sense to you?
Cheers,
--
Julien Grall
On 06/02/2021 12:09, Jürgen Groß wrote:
On 06.02.21 12:20, Julien Grall wrote:
Hi Juergen,
On 06/02/2021 10:49, Juergen Gross wrote:
When creating a new event channel with 2-level events the affinity
needs to be reset initially in order to avoid using an old affinity
from earlier usage of
old
affinity settings for this vcpu must be reset. As percpu events get
initialized before the percpu event channel hook is called,
resetting of the affinities happens after offlining a vcpu (this is
working, as initial percpu memory is zeroed out).
Cc: sta...@vger.kernel.org
Reported-by: Julien
On 2/3/21 12:12 PM, Mark Rutland wrote:
On Wed, Feb 03, 2021 at 09:26:45AM +0100, Julien Thierry wrote:
On 2/2/21 11:17 AM, Mark Rutland wrote:
On Wed, Jan 20, 2021 at 06:17:41PM +0100, Julien Thierry wrote:
Aarch64 instruction set encoding and decoding logic can prove useful
for some
On 2/2/21 12:15 PM, Mark Rutland wrote:
On Wed, Jan 20, 2021 at 06:17:43PM +0100, Julien Thierry wrote:
Create necessary functions to encode/decode aarch64 data/instruction
barriers.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 9 +
1 file changed, 9
Hi Mark,
On 2/2/21 11:17 AM, Mark Rutland wrote:
Hi Julien,
On Wed, Jan 20, 2021 at 06:17:41PM +0100, Julien Thierry wrote:
Aarch64 instruction set encoding and decoding logic can prove useful
for some features/tools both part of the kernel and outside the kernel.
Isolate the function
On 2/3/21 12:01 AM, Nick Desaulniers wrote:
On Tue, Feb 2, 2021 at 12:57 AM Julien Thierry wrote:
On 2/2/21 12:17 AM, Nick Desaulniers wrote:
On Mon, Feb 1, 2021 at 1:44 PM Josh Poimboeuf wrote:
On Fri, Jan 29, 2021 at 10:10:01AM -0800, Nick Desaulniers wrote:
On Wed, Jan 27, 2021
ge section name to store switch table information,
Make plugin Kconfig be selected rather than opt-in by user,
Add a relocation in the switch_table_info that points to
the jump operation itself]
Signed-off-by: Julien Thierry
Rather than tightly couple this feature to a
On 1/21/21 12:08 PM, Ard Biesheuvel wrote:
On Thu, 21 Jan 2021 at 11:26, Julien Thierry wrote:
Hi Ard,
On 1/21/21 10:03 AM, Ard Biesheuvel wrote:
Hello Julien,
On Wed, 20 Jan 2021 at 18:38, Julien Thierry wrote:
Hi,
This series enables objtool to start doing stack validation on
Hi Ard,
On 1/21/21 10:03 AM, Ard Biesheuvel wrote:
Hello Julien,
On Wed, 20 Jan 2021 at 18:38, Julien Thierry wrote:
Hi,
This series enables objtool to start doing stack validation on arm64
kernel builds.
Could we elaborate on this point, please? 'Stack validation' means
Based on get_alt_insn() in arch/arm64/kernel/alternative.c, arm64
alternative code adapts offsets for static branches and adrp
instructions.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/special.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tools
Load literal instructions can generate constants inside code sections.
Record the locations of the constants in order to be able to remove
their corresponding "struct instruction".
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c| 86 +
hanges can be found on top of this branch here:
git clone https://github.com/julien-thierry/linux.git -b objtoolxarm64-latest
But it would be nice to have some feedback on this before I start submitting
everyting.
[1] https://lkml.org/lkml/2021/1/20/791
Thanks,
Julien
-->
Julien Thierry
These will be needed to be able to use arm64 instruction decoder in
userland tools.
Signed-off-by: Julien Thierry
---
tools/include/asm-generic/bitops/__ffs.h | 11 +++
tools/include/linux/kernel.h | 21 +
tools/include/linux/printk.h | 40
Decode ERET, BRK and NOPs
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
index 924121b4b466..a4a587c400a1 100644
--- a/tools/objtool/arch/arm64
Decode aarch64 additions and substractions and create stack_ops for
instructions interacting with SP or FP.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 84 +++
1 file changed, 84 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
Under tools, bug.h only defines BUILD_BUG_ON_ZERO() which is already
defined in build_bug.h. This prevents a file to include both headers at
the same time.
Have bug.h include build_bug.h instead.
Signed-off-by: Julien Thierry
---
tools/include/linux/bug.h | 6 +-
1 file changed, 1
Decode branch, branch and link (aarch64's call) and return instructions.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
Add aarch64 encoder/decoder implementation under tools/ as well
as the necessary arm64 headers.
Signed-off-by: Julien Thierry
---
tools/arch/arm64/include/asm/aarch64-insn.h | 551 +++
tools/arch/arm64/lib/aarch64-insn.c | 1425 +++
2 files changed, 1976 insertions
the base pointer after the
load).
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 127 ++
1 file changed, 127 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c
b/tools/objtool/arch/arm64/decode.c
index a4a587c400a1..1087ede67bcd 100644
Provide needed definitions for a new architecture instruction decoder.
No proper decoding is done yet.
Signed-off-by: Julien Thierry
---
tools/objtool/Makefile| 5 +
tools/objtool/arch/arm64/Build| 8 ++
tools/objtool/arch/arm64/decode.c
The compiler can introduce some '0' words in code sections to pad the
end of functions.
Similar to load literal functions, record these zero words to remove
the "struct instruction" created for them.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/decode.c | 19 ++
ge section name to store switch table information,
Make plugin Kconfig be selected rather than opt-in by user,
Add a relocation in the switch_table_info that points to
the jump operation itself]
Signed-off-by: Julien Thierry
---
arch/arm64/Kconfig
.
Signed-off-by: Raphael Gault
[J.T.: Update arch implementation to new prototypes,
Update switch table information section name,
Do some clean up,
Use the offset sign information,
Use the newly added rela to find the corresponding jump instruction]
Signed-off-by: Julien
ARM64_CB_PATCH doesn't have static replacement instructions. Skip
trying to validate the alternative section.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/special.c | 12
tools/objtool/check.c | 3 +++
2 files changed, 15 insertions(+)
diff --
Section ".discard.switch_table_info", created by the gcc plugin will
be looked up for every dynamic jump in the object file while the section
might not even exist.
Cache the result of the first lookup.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/arm64/spec
From: Raphael Gault
Add build option to run stack validation at compile time.
Signed-off-by: Raphael Gault
Signed-off-by: Julien Thierry
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 93a320cc8e03..3f297d61b56b 100644
EFI stub cannot have absolute relocations in sections affecting the
execution flow. However, for sections that get discarded at link time,
it doesn't really matter if they have absolute relocations.
Ignore the relocation associated with such sections.
Signed-off-by: Julien Thierry
---
dr
/linux-arm-kernel/20210120173800.1660730-1-jthie...@redhat.com/T/#t
There are still some things missing, so if you want to investigate a
more complete state I have a branch:
$ git clone https://github.com/julien-thierry/linux.git -b
objtoolxarm64-latest
Let me know if there are any questions rel
Add decoding capability for some instructions that objtool will need
to decode.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/aarch64-insn.h
b/arch/arm64/include/asm/aarch64-insn.h
Provide some function to group different load/store instructions.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 28 +++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/include/asm/aarch64-insn.h
b/arch/arm64/include/asm/aarch64
ortly.
Thanks,
Julien
-->
Julien Thierry (5):
arm64: Move instruction encoder/decoder under lib/
arm64: aarch64-insn: Add SVE instruction class
arm64: aarch64-insn: Add barrier encodings
arm64: aarch64-insn: Add some opcodes to instruction decoder
arm64: Add load/store decoding helper
.
Code was only moved, no code should have been added, removed nor
modifier.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 505 +++
arch/arm64/include/asm/alternative-macros.h |3 -
arch/arm64/include/asm/alternative.h|1 +
arch/arm64/include
SVE has been public for some time now. Let the decoder acknowledge
its existence.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 1 +
arch/arm64/lib/aarch64-insn.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm
Create necessary functions to encode/decode aarch64 data/instruction
barriers.
Signed-off-by: Julien Thierry
---
arch/arm64/include/asm/aarch64-insn.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/aarch64-insn.h
b/arch/arm64/include/asm/aarch64-insn.h
Hi Madhavan,
On 1/17/21 6:25 PM, Madhavan T. Venkataraman wrote:
On 1/15/21 6:33 AM, Mark Rutland wrote:
It looks like the most recent work in this area has been from the
following folks:
Mark Brown and Mark Rutland:
Kernel changes to providing reliable stack traces.
Julien
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: 201ef5a974e24112953b74cc9f33dcfc4cbcc1cb
Gitweb:
https://git.kernel.org/tip/201ef5a974e24112953b74cc9f33dcfc4cbcc1cb
Author:Julien Thierry
AuthorDate:Wed, 14 Oct 2020 08:38:02 +01:00
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: fb084fde0c8106bc86df243411751c3421c07c08
Gitweb:
https://git.kernel.org/tip/fb084fde0c8106bc86df243411751c3421c07c08
Author:Julien Thierry
AuthorDate:Wed, 14 Oct 2020 08:38:00 +01:00
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: 468af56a7bbaa626da5a4578bedc930d731fba13
Gitweb:
https://git.kernel.org/tip/468af56a7bbaa626da5a4578bedc930d731fba13
Author:Julien Thierry
AuthorDate:Wed, 14 Oct 2020 08:38:01 +01:00
Hi Juergen,
On 15/12/2020 10:20, Jürgen Groß wrote:
On 15.12.20 08:27, Jürgen Groß wrote:
On 14.12.20 22:25, Julien Grall wrote:
Hi Juergen,
When testing Linux 5.10 dom0, I could reliably hit the following
warning with using event 2L ABI:
[ 589.591737] Interrupt for port 34, but
Hi Juergen,
On 15/12/2020 10:20, Jürgen Groß wrote:
On 15.12.20 08:27, Jürgen Groß wrote:
On 14.12.20 22:25, Julien Grall wrote:
Hi Juergen,
When testing Linux 5.10 dom0, I could reliably hit the following
warning with using event 2L ABI:
[ 589.591737] Interrupt for port 34, but
enough because I haven't found anything
yet preventing a race between evtchn_2l_handle_events9) and
evtchn_2l_bind_vcpu().
So maybe we want to introduce a refcounting (if there is nothing
provided by the IRQ framework) and only unmask when the counter drop to 0.
Any opinions?
Cheers,
BP and return address
[1] https://lkml.org/lkml/2020/9/28/354
Thanks,
Julien
Julien Thierry (3):
objtool: check: Fully validate the stack frame
objtool: check: Support addition to set CFA base
objtool: check: Make SP memory operation match PUSH/POP semantics
tools/objtool/check.c | 46
verify a function properly sets up all the
elements of the stack frame.
Signed-off-by: Julien Thierry
---
tools/objtool/check.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index f50ffa243c72..87f10e726a75 100644
Architectures without PUSH/POP instructions will always access the stack
though memory operations (SRC/DEST_INDIRECT). Make those operations have
the same effect on the CFA as PUSH/POP, with no stack pointer
modification.
Signed-off-by: Julien Thierry
---
tools/objtool/check.c | 20
instruction.
Signed-off-by: Julien Thierry
---
tools/objtool/check.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 87f10e726a75..815aeb770930 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -1898,6 +1898,17 @@ static
On 10/12/20 4:35 PM, Josh Poimboeuf wrote:
On Mon, Oct 12, 2020 at 11:21:49AM +0100, Julien Thierry wrote:
On 9/29/20 8:18 PM, Josh Poimboeuf wrote:
"Stack frame" has more than one meaning now, I suppose. i.e. it could
also include the callee-saved registers and any other s
On 9/29/20 8:18 PM, Josh Poimboeuf wrote:
On Mon, Sep 28, 2020 at 10:36:29AM +0100, Julien Thierry wrote:
+++ b/tools/objtool/arch/x86/include/cfi_regs.h
@@ -22,4 +22,7 @@
#define CFI_RA16
#define CFI_NUM_REGS 17
A few more naming nitpicks:
+#define
define gfn_to_virt(m)(__va(gfn_to_pfn(m) << XEN_PAGE_SHIFT))
+#define percpu_to_gfn(v) \
+ (pfn_to_gfn(per_cpu_ptr_to_phys(v) >> XEN_PAGE_SHIFT))
+
/* Only used in PV code. But ARM guests are always HVM. */
static inline xmaddr_t arbitrary_virt_to_machine(void *vaddr)
{
Cheers,
--
Julien Grall
Architectures without PUSH/POP instructions will always access the stack
though memory operations (SRC/DEST_INDIRECT). Make those operations have
the same effect on the CFA as PUSH/POP, with no stack pointer
modification.
Signed-off-by: Julien Thierry
---
tools/objtool/check.c | 20
verify a function properly sets up all the
elements of the stack frame.
Signed-off-by: Julien Thierry
---
tools/objtool/arch/x86/include/cfi_regs.h | 3 +++
tools/objtool/cfi.h | 2 ++
tools/objtool/check.c | 21 +
3 files changed, 22
instruction.
Signed-off-by: Julien Thierry
---
tools/objtool/check.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index 50b3a4504db1..9f7a14a24a65 100644
--- a/tools/objtool/check.c
+++ b/tools/objtool/check.c
@@ -1901,6 +1901,19
discussion with Josh
[1] https://www.spinics.net/lists/kernel/msg3662146.html
Thanks,
Julien
-->
Julien Thierry (3):
objtool: check: Fully validate the stack frame
objtool: check: Support addition to set CFA base
objtool: check: Make SP memory operation match PUSH/POP semantics
to
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: fb136219f0e2b417d84e67b2a3adc1f933997d04
Gitweb:
https://git.kernel.org/tip/fb136219f0e2b417d84e67b2a3adc1f933997d04
Author:Julien Thierry
AuthorDate:Tue, 15 Sep 2020 08:53:17 +01:00
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: f4f803984c3685f416a74e9e2fa7d39bdafbe02b
Gitweb:
https://git.kernel.org/tip/f4f803984c3685f416a74e9e2fa7d39bdafbe02b
Author:Julien Thierry
AuthorDate:Tue, 15 Sep 2020 08:53:16 +01:00
The following commit has been merged into the objtool/core branch of tip:
Commit-ID: 2b232a22d8225df419a92ca69ddeeb4e5fe902f7
Gitweb:
https://git.kernel.org/tip/2b232a22d8225df419a92ca69ddeeb4e5fe902f7
Author:Julien Thierry
AuthorDate:Tue, 15 Sep 2020 08:53:18 +01:00
On 9/18/20 9:56 PM, Josh Poimboeuf wrote:
On Tue, Sep 15, 2020 at 09:12:02AM +0100, Julien Thierry wrote:
A valid stack frame should contain both the return address and the
previous frame pointer value.
On x86, the return value is placed on the stack by the calling
instructions. On other
On 9/18/20 10:43 PM, Josh Poimboeuf wrote:
On Tue, Sep 15, 2020 at 09:12:04AM +0100, Julien Thierry wrote:
Architectures without PUSH/POP instructions will always access the stack
though memory operations (SRC/DEST_INDIRECT). Make those operations have
the same effect on the CFA as PUSH/POP
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