* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8660-surf.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
arch/arm/boot
of the
binding spec
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
arch/arm/boot/dts/qcom-msm8960-cdp.dts | 6 ++
arch/arm/boot/dts/qcom-msm8960.dtsi| 165 +
2 files changed, 93 insertions(+), 78 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-msm8960
property from l2-cache node as its not part of the
binding spec
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 28 ++-
arch/arm/boot/dts/qcom-msm8974.dtsi| 31 --
2 files changed, 36 insertions
property from l2-cache node as its not part of the
binding spec
* Move timer node out of SoC container
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
v2:
* Move timer node out of SoC container
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 28 ++-
arch/arm/boot/dts/qcom-msm8974.dtsi
On May 27, 2014, at 1:05 PM, Olof Johansson wrote:
> On Thu, Feb 27, 2014 at 06:22:37PM -0600, Kumar Gala wrote:
>>
>> On Feb 27, 2014, at 4:14 PM, David Brown wrote:
>>
>>> On Wed, Feb 26, 2014 at 06:16:34PM -0800, Stephen Boyd wrote:
>>>> Now tha
On May 27, 2014, at 1:05 PM, Olof Johansson o...@lixom.net wrote:
On Thu, Feb 27, 2014 at 06:22:37PM -0600, Kumar Gala wrote:
On Feb 27, 2014, at 4:14 PM, David Brown dav...@codeaurora.org wrote:
On Wed, Feb 26, 2014 at 06:16:34PM -0800, Stephen Boyd wrote:
Now that DT based platforms
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-drivers-for-3.16
for you to fetch changes up to
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-soc-for-3.16
for you to fetch changes up to
(updated subject line)
On May 23, 2014, at 1:37 PM, Kumar Gala wrote:
> The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
>
> Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-defconfig-for-3.16
for you to fetch changes up to
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-dt-for-3.16
for you to fetch changes up to
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-dt-for-3.16
for you to fetch changes up to
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-defconfig-for-3.16
for you to fetch changes up to
(updated subject line)
On May 23, 2014, at 1:37 PM, Kumar Gala ga...@codeaurora.org wrote:
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-soc-for-3.16
for you to fetch changes up to
The following changes since commit c9eaa447e77efe77b7fa4c953bd62de8297fd6c5:
Linux 3.15-rc1 (2014-04-13 14:18:35 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git
tags/qcom-drivers-for-3.16
for you to fetch changes up to
On May 22, 2014, at 11:24 AM, Georgi Djakov wrote:
> This patch adds support for the global clock controller found on
> the APQ8084 based devices.
>
> The APQ8084 and MSM8974 share a lot of clock data, so instead of
> duplicating all the data, we add support to the MSM8974 code.
>
>
On May 22, 2014, at 11:24 AM, Georgi Djakov wrote:
> Add the necessary DT node to probe the serial driver on
> APQ8084 platforms.
>
> Signed-off-by: Georgi Djakov
> ---
> arch/arm/boot/dts/qcom-apq8084.dtsi |7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git
On May 22, 2014, at 11:24 AM, Georgi Djakov gdja...@mm-sol.com wrote:
Add the necessary DT node to probe the serial driver on
APQ8084 platforms.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
arch/arm/boot/dts/qcom-apq8084.dtsi |7 +++
1 file changed, 7 insertions(+)
diff
On May 22, 2014, at 11:24 AM, Georgi Djakov gdja...@mm-sol.com wrote:
This patch adds support for the global clock controller found on
the APQ8084 based devices.
The APQ8084 and MSM8974 share a lot of clock data, so instead of
duplicating all the data, we add support to the MSM8974 code.
On May 21, 2014, at 10:28 AM, Ivan T. Ivanov wrote:
> Hi,
>
> On Wed, 2014-05-21 at 17:18 +0200, Arnd Bergmann wrote:
>> On Wednesday 21 May 2014 17:57:05 Georgi Djakov wrote:
>
>>>
>>> +#ifdef CONFIG_DEBUG_APQ8084_UART
>>> +#define MSM_DEBUG_UART_BASE0xFA75E000
>>> +#define
On Nov 21, 2013, at 7:38 AM, Tanmay Inamdar wrote:
> This patch adds the PCI(e) arch support in arm64. The files are
> based on PCI(e) support in 32bit arm.
>
>
> Signed-off-by: Tanmay Inamdar
> ---
> arch/arm64/Kconfig | 19 ++
> arch/arm64/include/asm/dma.h | 18 +
>
On May 21, 2014, at 9:57 AM, Georgi Djakov wrote:
> Add board compatibility string to the board machine descriptors.
>
> Signed-off-by: Georgi Djakov
> ---
> arch/arm/mach-qcom/board.c |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-qcom/board.c
On May 21, 2014, at 9:57 AM, Georgi Djakov gdja...@mm-sol.com wrote:
Add board compatibility string to the board machine descriptors.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
arch/arm/mach-qcom/board.c |1 +
1 file changed, 1 insertion(+)
diff --git
On Nov 21, 2013, at 7:38 AM, Tanmay Inamdar tinam...@apm.com wrote:
This patch adds the PCI(e) arch support in arm64. The files are
based on PCI(e) support in 32bit arm.
Signed-off-by: Tanmay Inamdar tinam...@apm.com
---
arch/arm64/Kconfig | 19 ++
On May 21, 2014, at 10:28 AM, Ivan T. Ivanov iiva...@mm-sol.com wrote:
Hi,
On Wed, 2014-05-21 at 17:18 +0200, Arnd Bergmann wrote:
On Wednesday 21 May 2014 17:57:05 Georgi Djakov wrote:
+#ifdef CONFIG_DEBUG_APQ8084_UART
+#define MSM_DEBUG_UART_BASE0xFA75E000
+#define
On May 15, 2014, at 11:01 AM, Murali Karicheri wrote:
> keystone pcie hardware is based on designware hw version 3.65.
> There is no support for ATU port and has registers in
> application space to configure inbound/outbound access. Also
> doesn't support PCI PVM option. The MSI IRQ registers
On May 15, 2014, at 11:01 AM, Murali Karicheri m-kariche...@ti.com wrote:
keystone pcie hardware is based on designware hw version 3.65.
There is no support for ATU port and has registers in
application space to configure inbound/outbound access. Also
doesn't support PCI PVM option. The MSI
On May 15, 2014, at 5:08 AM, Srinivas Kandagatla
wrote:
> As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs.
> For example SDCC controller is PrimeCell MCI pl180. Adding this option will
> give flexibility to reuse the existing drivers as it is without major
> modifications.
>
On May 15, 2014, at 5:08 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs.
For example SDCC controller is PrimeCell MCI pl180. Adding this option will
give flexibility to reuse the existing drivers as it is
= _src.clkr,
> + [SDC2_CLK] = _clk.clkr,
> + [SDC3_SRC] = _src.clkr,
> + [SDC3_CLK] = _clk.clkr,
> + [SDC4_SRC] = _src.clkr,
> + [SDC4_CLK] = _clk.clkr,
> };
>
Reviewed-by: Kumar Gala
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innov
On May 9, 2014, at 11:48 AM, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> This patch adds clocks necessary for SD card controller on apq8064 SOC.
> Without this patch the clocks are visible to the sdcc driver.
>
> Signed-off-by: Srinivas Kandagatla
> ---
>
Drop underscore in spdif_groups to match all other groups.
Signed-off-by: Kumar Gala
---
drivers/pinctrl/pinctrl-ipq8064.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-ipq8064.c
b/drivers/pinctrl/pinctrl-ipq8064.c
index 54aba9f..acafea4 100644
Drop underscore in spdif_groups to match all other groups.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
drivers/pinctrl/pinctrl-ipq8064.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-ipq8064.c
b/drivers/pinctrl/pinctrl-ipq8064.c
index 54aba9f
On May 9, 2014, at 11:48 AM, srinivas.kandaga...@linaro.org wrote:
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
This patch adds clocks necessary for SD card controller on apq8064 SOC.
Without this patch the clocks are visible to the sdcc driver.
Signed-off-by: Srinivas
] = sdc2_src.clkr,
+ [SDC2_CLK] = sdc2_clk.clkr,
+ [SDC3_SRC] = sdc3_src.clkr,
+ [SDC3_CLK] = sdc3_clk.clkr,
+ [SDC4_SRC] = sdc4_src.clkr,
+ [SDC4_CLK] = sdc4_clk.clkr,
};
Reviewed-by: Kumar Gala ga...@codeaurora.org
- k
--
Employee of Qualcomm Innovation Center, Inc
On Apr 24, 2014, at 9:36 AM, Santosh Shilimkar wrote:
> On Thursday 24 April 2014 12:31 PM, Andy Gross wrote:
>> Add placeholder Kconfig and linkage for driver/soc.
>>
>> The first patch set that implemented this was authored by Santosh Shilimkar:
>> https://lkml.org/lkml/2014/2/28/567
>>
>>
On Apr 24, 2014, at 9:36 AM, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Thursday 24 April 2014 12:31 PM, Andy Gross wrote:
Add placeholder Kconfig and linkage for driver/soc.
The first patch set that implemented this was authored by Santosh Shilimkar:
On Apr 30, 2014, at 1:52 AM, Xiubo Li wrote:
> Signed-off-by: Xiubo Li
> ---
> .../devicetree/bindings/endianness/endianness.txt | 47 ++
> 1 file changed, 47 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/endianness/endianness.txt
>
> diff --git
On Apr 30, 2014, at 1:52 AM, Xiubo Li li.xi...@freescale.com wrote:
Signed-off-by: Xiubo Li li.xi...@freescale.com
---
.../devicetree/bindings/endianness/endianness.txt | 47 ++
1 file changed, 47 insertions(+)
create mode 100644
Looks like commit cff558c79f572530bdbbb9b847134094008afcef accidentally
added in a merge reject file, so remove it.
Signed-off-by: Kumar Gala
---
Documentation/devicetree/bindings/clock/qcom,gcc.txt.rej | 10 --
1 file changed, 10 deletions(-)
delete mode 100644 Documentation
Looks like commit cff558c79f572530bdbbb9b847134094008afcef accidentally
added in a merge reject file, so remove it.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
Documentation/devicetree/bindings/clock/qcom,gcc.txt.rej | 10 --
1 file changed, 10 deletions(-)
delete mode 100644
On Apr 23, 2014, at 9:03 AM, Linus Walleij wrote:
> On Tue, Apr 15, 2014 at 5:10 AM, Andy Gross wrote:
>
>> Add missing PINCTRL selection. This enables selection of pinctrollers for
>> Qualcomm processors.
>>
>> Signed-off-by: Andy Gross
>
> Acked-by: Linus Walleij
>
> David are you
On Apr 23, 2014, at 9:03 AM, Linus Walleij linus.wall...@linaro.org wrote:
On Tue, Apr 15, 2014 at 5:10 AM, Andy Gross agr...@codeaurora.org wrote:
Add missing PINCTRL selection. This enables selection of pinctrollers for
Qualcomm processors.
Signed-off-by: Andy Gross
On Apr 21, 2014, at 12:30 AM, Andy Gross wrote:
> Add device tree binding support for the QCOM GSBI driver.
>
> Signed-off-by: Andy Gross
> ---
> .../devicetree/bindings/soc/qcom/qcom,gsbi.txt | 78
> 1 file changed, 78 insertions(+)
> create mode 100644
On Apr 21, 2014, at 12:30 AM, Andy Gross agr...@codeaurora.org wrote:
Add device tree binding support for the QCOM GSBI driver.
Signed-off-by: Andy Gross agr...@codeaurora.org
---
.../devicetree/bindings/soc/qcom/qcom,gsbi.txt | 78
1 file changed, 78
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board.
Signed-off-by: Kumar Gala
---
v2:
* created a v2.0 apq8064.dtsi to handle differences in Si rev in future
* changed /include/ to #include
* added PMU node
* dropped interrupts from cpus node
Add basic IPQ8064 SoC include device tree and support for basic booting on
the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in
sorted order.
Signed-off-by: Kumar Gala
---
v2:
* created a v1.0 ipq8064.dtsi to handle differences in Si rev in future
* changed /include
Add basic IPQ8064 SoC include device tree and support for basic booting on
the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in
sorted order.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
v2:
* created a v1.0 ipq8064.dtsi to handle differences in Si rev in future
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
v2:
* created a v2.0 apq8064.dtsi to handle differences in Si rev in future
* changed /include/ to #include
* added PMU node
* dropped interrupts from
On Apr 7, 2014, at 10:01 AM, Ivan T. Ivanov wrote:
> Hi Kumar,
>
> On Fri, 2014-04-04 at 15:19 -0500, Kumar Gala wrote:
>> Add a driver for the global clock controller found on IPQ8064 based
>> platforms. This should allow most non-multimedia device drivers to probe
>&g
On Apr 7, 2014, at 10:01 AM, Ivan T. Ivanov iiva...@mm-sol.com wrote:
Hi Kumar,
On Fri, 2014-04-04 at 15:19 -0500, Kumar Gala wrote:
Add a driver for the global clock controller found on IPQ8064 based
platforms. This should allow most non-multimedia device drivers to probe
and control
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board.
Signed-off-by: Kumar Gala
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 12 +++
arch/arm/boot/dts/qcom-apq8064.dtsi| 151
A_SRC_CLK -> SATA_CLK_SRC
Signed-off-by: Kumar Gala
---
drivers/clk/qcom/gcc-msm8960.c | 4 ++--
include/dt-bindings/clock/qcom,gcc-msm8960.h | 7 +++
include/dt-bindings/reset/qcom,gcc-msm8960.h | 2 +-
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/qcom/gcc
.
Signed-off-by: Kumar Gala
---
This patch is based on Stephen's qcom common clk init conslidation patch
.../devicetree/bindings/clock/qcom,gcc.txt | 1 +
drivers/clk/qcom/Kconfig | 4 +--
drivers/clk/qcom/gcc-msm8960.c | 30
Add basic IPQ8064 SoC include device tree and support for basic booting on
the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in
sorted order.
Signed-off-by: Kumar Gala
---
arch/arm/boot/dts/Makefile | 8 +-
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 12
Add basic IPQ8064 SoC include device tree and support for basic booting on
the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in
sorted order.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
arch/arm/boot/dts/Makefile | 8 +-
arch/arm/boot/dts/qcom-ipq8064
.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
This patch is based on Stephen's qcom common clk init conslidation patch
.../devicetree/bindings/clock/qcom,gcc.txt | 1 +
drivers/clk/qcom/Kconfig | 4 +--
drivers/clk/qcom/gcc-msm8960.c | 30
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
drivers/clk/qcom/gcc-msm8960.c | 4 ++--
include/dt-bindings/clock/qcom,gcc-msm8960.h | 7 +++
include/dt-bindings/reset/qcom,gcc-msm8960.h | 2 +-
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/qcom/gcc
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board.
Signed-off-by: Kumar Gala ga...@codeaurora.org
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 12 +++
arch/arm/boot/dts/qcom-apq8064.dtsi
On Apr 3, 2014, at 11:33 AM, Stanimir Varbanov wrote:
> Hi,
>
> On 04/03/2014 07:24 PM, Kumar Gala wrote:
>>
>> On Apr 3, 2014, at 11:17 AM, Stanimir Varbanov wrote:
>>
>>> Here are all register addresses and bit/masks used by the driver.
>&
On Apr 3, 2014, at 11:17 AM, Stanimir Varbanov wrote:
> Here are all register addresses and bit/masks used by the driver.
>
> Signed-off-by: Stanimir Varbanov
> ---
> drivers/crypto/qce/regs-v5.h | 327 +++
> 1 file changed, 327 insertions(+)
> create
On Apr 3, 2014, at 11:17 AM, Stanimir Varbanov svarba...@mm-sol.com wrote:
Here are all register addresses and bit/masks used by the driver.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/regs-v5.h | 327 +++
1 file
On Apr 3, 2014, at 11:33 AM, Stanimir Varbanov svarba...@mm-sol.com wrote:
Hi,
On 04/03/2014 07:24 PM, Kumar Gala wrote:
On Apr 3, 2014, at 11:17 AM, Stanimir Varbanov svarba...@mm-sol.com wrote:
Here are all register addresses and bit/masks used by the driver.
Signed-off
On Mar 17, 2014, at 12:31 PM, Christopher Covington wrote:
> Hi Stephen,
>
> On 03/11/2014 05:24 PM, Stephen Boyd wrote:
>> The architected timer is not a register addressable piece of
>> hardware. Instead it's accessed through cp15 accessors. Move it
>> to the root of the devicetree to
On Mar 17, 2014, at 12:31 PM, Christopher Covington c...@codeaurora.org wrote:
Hi Stephen,
On 03/11/2014 05:24 PM, Stephen Boyd wrote:
The architected timer is not a register addressable piece of
hardware. Instead it's accessed through cp15 accessors. Move it
to the root of the devicetree
On Mar 10, 2014, at 4:19 PM, Santosh Shilimkar wrote:
>>> + -- reg-names : Names for the above register regions. The name to
>>> be
>>> + used is as follows:
>>> + - "config" : Queue configuration region.
>>> + -
On Mar 10, 2014, at 4:19 PM, Santosh Shilimkar santosh.shilim...@ti.com wrote:
+ -- reg-names : Names for the above register regions. The name to
be
+ used is as follows:
+ - config : Queue configuration region.
+
On Mar 7, 2014, at 6:38 AM, Florian Vaussard wrote:
> Looking at the current vendor strings used in the kernel's .dts/.dtsi
> files, some vendors are used a high number of times without
> being documented. Document the ones that are used more than 10 times.
>
> Note: a few inconsistencies were
On Mar 7, 2014, at 6:38 AM, Florian Vaussard florian.vauss...@epfl.ch wrote:
Looking at the current vendor strings used in the kernel's .dts/.dtsi
files, some vendors are used a high number of times without
being documented. Document the ones that are used more than 10 times.
Note: a few
On Mar 4, 2014, at 8:47 PM, Santosh Shilimkar wrote:
> On Wednesday 05 March 2014 01:59 AM, Kumar Gala wrote:
>>
>> On Feb 28, 2014, at 5:18 PM, Santosh Shilimkar
>> wrote:
>>
>>> From: Sandeep Nair
>>>
>>> The QMSS (Queue Manager Sub
On Mar 4, 2014, at 8:47 PM, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Wednesday 05 March 2014 01:59 AM, Kumar Gala wrote:
On Feb 28, 2014, at 5:18 PM, Santosh Shilimkar santosh.shilim...@ti.com
wrote:
From: Sandeep Nair sandee...@ti.com
The QMSS (Queue Manager Sub System
ory.
>
> The QMSS driver manages the PDSP setups, linking RAM regions,
> queue pool management (allocation, push, pop and notify) and descriptor
> pool management. The specifics on the device tree bindings for
> QMSS can be found in:
>Documentation/devicetree/bindings/so
-Hartman gre...@linuxfoundation.org
Cc: Kumar Gala ga...@codeaurora.org
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring robh...@kernel.org
Cc: Mark Rutland mark.rutl...@arm.com
Signed-off-by: Sandeep Nair sandee...@ti.com
On Mar 3, 2014, at 10:49 AM, Josh Cartwright wrote:
> With the split of Qualcomm MSM support into legacy and multiplatform,
> the SPMI PMIC arb driver is only relevant on the multiplatform supported
> SoCs. Switch the Kconfig depends to ARCH_QCOM.
>
> Cc: Kumar Gala
> S
ory.
>
> The QMSS driver manages the PDSP setups, linking RAM regions,
> queue pool management (allocation, push, pop and notify) and descriptor
> pool management. The specifics on the device tree bindings for
> QMSS can be found in:
>Documentation/devicetree/bindings/so
e discussion forward with this patch.
>
> Cc: Greg Kroah-Hartman
> Cc: Kumar Gala
> Cc: Paul Walmsley
> Cc: Olof Johansson
> Cc: Arnd Bergmann
> Signed-off-by: Sandeep Nair
> Signed-off-by: Santosh Shilimkar
> ---
> drivers/Kconfig |2 ++
> drivers/Makefile|
On Mar 2, 2014, at 2:48 PM, Olof Johansson wrote:
> On Sun, Mar 02, 2014 at 05:12:06PM +, One Thousand Gnomes wrote:
>> On Fri, 28 Feb 2014 18:18:38 -0500
>> Santosh Shilimkar wrote:
>>
>>> Based on earlier thread "https://lkml.org/lkml/2013/10/7/662; and
>>> further discussion at Kernel
On Mar 3, 2014, at 5:59 AM, Kishon Vijay Abraham I wrote:
>
>
> On Monday 03 March 2014 10:52 AM, Yuvaraj Kumar C D wrote:
>> This patch adds dt entry for ahci sata controller and its
>> corresponding phy controller.phy node has been added w.r.t
>> new generic phy framework.
>>
>>
On Mar 3, 2014, at 5:59 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
On Monday 03 March 2014 10:52 AM, Yuvaraj Kumar C D wrote:
This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.
On Mar 2, 2014, at 2:48 PM, Olof Johansson o...@lixom.net wrote:
On Sun, Mar 02, 2014 at 05:12:06PM +, One Thousand Gnomes wrote:
On Fri, 28 Feb 2014 18:18:38 -0500
Santosh Shilimkar santosh.shilim...@ti.com wrote:
Based on earlier thread https://lkml.org/lkml/2013/10/7/662; and
forward with this patch.
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Kumar Gala ga...@codeaurora.org
Cc: Paul Walmsley p...@pwsan.com
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Signed-off-by: Sandeep Nair sandee...@ti.com
Signed-off-by: Santosh Shilimkar
-Hartman gre...@linuxfoundation.org
Cc: Kumar Gala ga...@codeaurora.org
Cc: Olof Johansson o...@lixom.net
Cc: Arnd Bergmann a...@arndb.de
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring robh...@kernel.org
Cc: Mark Rutland mark.rutl...@arm.com
Signed-off-by: Sandeep Nair sandee...@ti.com
On Mar 3, 2014, at 10:49 AM, Josh Cartwright jo...@codeaurora.org wrote:
With the split of Qualcomm MSM support into legacy and multiplatform,
the SPMI PMIC arb driver is only relevant on the multiplatform supported
SoCs. Switch the Kconfig depends to ARCH_QCOM.
Cc: Kumar Gala ga
On Feb 28, 2014, at 5:24 AM, Georgi Djakov wrote:
> This patch adds implementation for platform specific tuning in order to
> support
> HS200 bus speed mode on Qualcomm SDHCI controller.
>
> Signed-off-by: Asutosh Das
> Signed-off-by: Venkat Gopalakrishnan
> Signed-off-by: Georgi Djakov
>
On Feb 28, 2014, at 5:24 AM, Georgi Djakov gdja...@mm-sol.com wrote:
This patch adds implementation for platform specific tuning in order to
support
HS200 bus speed mode on Qualcomm SDHCI controller.
Signed-off-by: Asutosh Das asuto...@codeaurora.org
Signed-off-by: Venkat Gopalakrishnan
On Feb 27, 2014, at 4:14 PM, David Brown wrote:
> On Wed, Feb 26, 2014 at 06:16:34PM -0800, Stephen Boyd wrote:
>> Now that DT based platforms are split out of mach-msm into
>> mach-qcom, put back a non-DT based SoC into the msm_defconfig and
>> stop selecting unsupported drivers.
>>
>>
On Feb 26, 2014, at 5:43 PM, Kevin Hilman wrote:
> Kumar Gala writes:
>
>> Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
>> serial console as part of the standard multi_v7_defconfig.
>>
>> Signed-off-by: Kumar Gala
>> ---
>
On Feb 26, 2014, at 5:43 PM, Kevin Hilman khil...@linaro.org wrote:
Kumar Gala ga...@codeaurora.org writes:
Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
serial console as part of the standard multi_v7_defconfig.
Signed-off-by: Kumar Gala ga...@codeaurora.org
On Feb 27, 2014, at 4:14 PM, David Brown dav...@codeaurora.org wrote:
On Wed, Feb 26, 2014 at 06:16:34PM -0800, Stephen Boyd wrote:
Now that DT based platforms are split out of mach-msm into
mach-qcom, put back a non-DT based SoC into the msm_defconfig and
stop selecting unsupported drivers.
On Feb 25, 2014, at 10:01 PM, Stephen Rothwell wrote:
> Hi Herbert,
>
> Today's linux-next merge of the crypto tree got a conflict in
> drivers/char/hw_random/Kconfig between commit 2257ffbca73c ("hwrng: msm:
> switch Kconfig to ARCH_QCOM depends") from the arm-soc tree and commit
>
On Feb 26, 2014, at 8:22 AM, Kevin Hilman wrote:
> Kumar Gala writes:
>
>> Introduce a new mach-qcom that will support SoCs that intend to be
>> multiplatform compatiable while keeping mach-msm to legacy SoC/board
>> support that will not transition over to multi
On Feb 26, 2014, at 8:22 AM, Kevin Hilman khil...@linaro.org wrote:
Kumar Gala ga...@codeaurora.org writes:
Introduce a new mach-qcom that will support SoCs that intend to be
multiplatform compatiable while keeping mach-msm to legacy SoC/board
support that will not transition over
On Feb 25, 2014, at 10:01 PM, Stephen Rothwell s...@canb.auug.org.au wrote:
Hi Herbert,
Today's linux-next merge of the crypto tree got a conflict in
drivers/char/hw_random/Kconfig between commit 2257ffbca73c (hwrng: msm:
switch Kconfig to ARCH_QCOM depends) from the arm-soc tree and
On Feb 25, 2014, at 5:16 AM, Lorenzo Pieralisi
wrote:
> Hi Stephen,
>
> On Wed, Feb 19, 2014 at 12:20:43AM +, Stephen Boyd wrote:
>> (Sorry, this discussion stalled due to merge window + life events)
>
> Sorry for the delay in replying on my side too.
>
>> On 01/17, Lorenzo Pieralisi
Enable support for the MSM8x60, MSM8960, and MSM8974 SoCs, clocks and
serial console as part of the standard multi_v7_defconfig.
Signed-off-by: Kumar Gala
---
I leave this to the arm-soc guys to apply because of possible conflicts
with other updates to multi_v7_defconfig.
- k
arch/arm
On Feb 25, 2014, at 11:14 AM, Arnd Bergmann wrote:
> On Tuesday 25 February 2014, Kumar Gala wrote:
>> The following changes since commit cf1e8f0cd665e2a9966d2bee4e11ecc0938ff166:
>>
>> ARM: qcom: Rename various msm prefixed functions to qcom (2014-02-
On Feb 24, 2014, at 3:57 AM, Linus Walleij wrote:
> On Thu, Feb 6, 2014 at 4:28 PM, Ivan T. Ivanov wrote:
>
>> From: "Ivan T. Ivanov"
>>
>> Add the pin control node and pin definitions of SPI8.
>>
>> Signed-off-by: Ivan T. Ivanov
>
> Acked-by: Linus Walleij
>
> Kumar, please take this
-for-3.15
for you to fetch changes up to add798a40aec3a768165055477ba8bfee21e06fc:
gpio: msm: switch Kconfig to ARCH_QCOM depends (2014-02-25 09:22:10 -0600)
Kumar Gala (5):
tty: serial: msm: Enable building msm_serial
-for-3.15
for you to fetch changes up to add798a40aec3a768165055477ba8bfee21e06fc:
gpio: msm: switch Kconfig to ARCH_QCOM depends (2014-02-25 09:22:10 -0600)
Kumar Gala (5):
tty: serial: msm: Enable building msm_serial
501 - 600 of 1752 matches
Mail list logo
