for the MAX77620.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
Reviewed-by: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
---
Changes from V1:
- Use proper comment for the
- Added dt binding preprocessor file as maxim,max77620.h for max77620
.
- Collected Testedby/reviewed by.
Changes from V2:
- Nit fixes and colleced all RB/TB
Laxman Dewangan (4):
clk: max77686: Combine Maxim max77686 and max77802 driver
clk: Combine DT binding doc for max77686 and max77802
clk: max77686: Add DT binding details for PMIC MAX77620
clk: max77686: Add
for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsung.com>
CC: Javier Martinez Canillas <jav...@dowhile0.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlow...@
for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Javier Martinez Canillas
---
Changes from V1:
- Rewrite description to remvoe ref
.
- Collected Testedby/reviewed by.
Changes from V2:
- Nit fixes and colleced all RB/TB
Laxman Dewangan (4):
clk: max77686: Combine Maxim max77686 and max77802 driver
clk: Combine DT binding doc for max77686 and max77802
clk: max77686: Add DT binding details for PMIC MAX77620
clk: max77686: Add
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- MFD and regulator is already enabled, enabling remaining driver.
Resending to linux
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- MFD and regulator is already enabled, enabling remaining driver.
Resending to linux-tegra group also.
arch/arm64
On Friday 17 June 2016 11:33 AM, Krzysztof Kozlowski wrote:
On 06/16/2016 03:23 PM, Laxman Dewangan wrote:
config COMMON_CLK_MAX77686
- tristate "Clock driver for Maxim 77686/77802 MFD"
- depends on MFD_MAX77686
+ tristate "Clock driver for Maxim 77686/778
On Friday 17 June 2016 11:33 AM, Krzysztof Kozlowski wrote:
On 06/16/2016 03:23 PM, Laxman Dewangan wrote:
config COMMON_CLK_MAX77686
- tristate "Clock driver for Maxim 77686/77802 MFD"
- depends on MFD_MAX77686
+ tristate "Clock driver for Maxim 77686/778
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsun
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
Signed-off-by: Laxman
of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsung.com>
CC: Javier Martinez Canillas <jav...@dowhile0.org>
R
of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
Reviewed-by: Javier Martinez Canillas
Tested-by: Javier Martinez Canillas
Tested
.
- Collected Testedby/reviewed by.
Laxman Dewangan (4):
clk: max77686: Combine Maxim max77686 and max77802 driver
clk: Combine DT binding doc for max77686 and max77802
clk: max77686: Add DT binding details for PMIC MAX77620
clk: max77686: Add support for MAX77620 clocks
.../devicetree/bindings
for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsung.com>
CC: Javier Martinez Canillas <jav...@dowhile0.org>
---
Changes from V1:
- Rewrite description to re
.
- Collected Testedby/reviewed by.
Laxman Dewangan (4):
clk: max77686: Combine Maxim max77686 and max77802 driver
clk: Combine DT binding doc for max77686 and max77802
clk: max77686: Add DT binding details for PMIC MAX77620
clk: max77686: Add support for MAX77620 clocks
.../devicetree/bindings
for maxim,max77802 and move all information to
maxim,max77686 DT binding document.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
---
Changes from V1:
- Rewrite description to remvoe ref to driver.
- Taken care of comment from Krzysztof on the supported clocks
for the MAX77620.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsung.com>
CC: Javier Martinez Canillas <jav...@dowhile0.org>
---
Changes from V1:
- Use proper comment for the
- Added dt binding preprocessor file as maxim,max77620.h for
for the MAX77620.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
---
Changes from V1:
- Use proper comment for the
- Added dt binding preprocessor file as maxim,max77620.h for max77620
inline with the other chip.
- Refer the dt binding header for the supported
Hi Thierry,
On Tuesday 24 May 2016 04:18 PM, Jon Hunter wrote:
On 23/05/16 10:03, Jon Hunter wrote:
On 20/05/16 15:45, Laxman Dewangan wrote:
The IO pins of Tegra SoCs are grouped for common control of IO
interface like setting voltage signal levels and power state of
the interface. The group
Hi Thierry,
On Tuesday 24 May 2016 04:18 PM, Jon Hunter wrote:
On 23/05/16 10:03, Jon Hunter wrote:
On 20/05/16 15:45, Laxman Dewangan wrote:
The IO pins of Tegra SoCs are grouped for common control of IO
interface like setting voltage signal levels and power state of
the interface. The group
Hi Thierry,
On Friday 10 June 2016 10:49 PM, Laxman Dewangan wrote:
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Are you picking this change?
Hi Thierry,
On Friday 10 June 2016 10:49 PM, Laxman Dewangan wrote:
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan
---
Are you picking this change?
On Thursday 16 June 2016 06:36 PM, Javier Martinez Canillas wrote:
Hello Krzysztof,
On 06/16/2016 08:25 AM, Krzysztof Kozlowski wrote:
On 06/15/2016 05:39 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On 06/15/2016 10:13 AM, Laxman Dewangan wrote:
The clock driver used by Maxim PMIC
On Thursday 16 June 2016 06:36 PM, Javier Martinez Canillas wrote:
Hello Krzysztof,
On 06/16/2016 08:25 AM, Krzysztof Kozlowski wrote:
On 06/15/2016 05:39 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On 06/15/2016 10:13 AM, Laxman Dewangan wrote:
The clock driver used by Maxim PMIC
Hi Krzysztof/Javier,
Thanks for review of the series.
I will post the V2 after taking care of all comment.
One query about the comment.
Thanks,
Laxman
On Thursday 16 June 2016 03:24 PM, Krzysztof Kozlowski wrote:
On 06/15/2016 04:13 PM, Laxman Dewangan wrote:
enum chip_name
Hi Krzysztof/Javier,
Thanks for review of the series.
I will post the V2 after taking care of all comment.
One query about the comment.
Thanks,
Laxman
On Thursday 16 June 2016 03:24 PM, Krzysztof Kozlowski wrote:
On 06/15/2016 04:13 PM, Laxman Dewangan wrote:
enum chip_name
The clock driver for Maxim PMICs max77686 and max77802 are
combined into single file to extend the support for same clock
IP for different PMICs.
Remove the separate DT binding document file for maxim,max77802 and
move all information to maxim,max77686 DT binding document.
Signed-off-by: Laxman
The clock driver for Maxim PMICs max77686 and max77802 are
combined into single file to extend the support for same clock
IP for different PMICs.
Remove the separate DT binding document file for maxim,max77802 and
move all information to maxim,max77686 DT binding document.
Signed-off-by: Laxman
Maxim has used the same clock IP on multiple PMICs like
MAX77686, MAX77802, MAX77620. Only differences are the
number of clocks from these PMICs.
Add clock binding details and example for the max77620 in
maxim,max77686.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krz
Maxim has used the same clock IP on multiple PMICs like
MAX77686, MAX77802, MAX77620. Only differences are the
number of clocks from these PMICs.
Add clock binding details and example for the max77620 in
maxim,max77686.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsun
of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsung.com>
CC: Javier Martinez Canillas <jav...@dowhile0.org>
---
d
The clock driver used by Maxim PMIC MAX77802 is clk-max77686
which can be enabled with config CONFIG_COMMON_CLK_MAX77686.
Hence the config CONFIG_COMMON_CLK_MAX77802 is not required.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Krzysztof Kozlowski <k.kozlow...@samsun
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.
Add clock driver support for MAX77620 on the MAX77686 driver.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
---
drivers/clk
of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
---
drivers/clk/Kconfig| 15 +--
drivers/clk/Makefile | 2 -
drivers/clk
The clock driver used by Maxim PMIC MAX77802 is clk-max77686
which can be enabled with config CONFIG_COMMON_CLK_MAX77686.
Hence the config CONFIG_COMMON_CLK_MAX77802 is not required.
Signed-off-by: Laxman Dewangan
CC: Krzysztof Kozlowski
CC: Javier Martinez Canillas
---
arch/arm/configs
comining the driver and DT files, extend the support to MAX77620.
This series is based on discussion from the series
clk: max77620: Add clock driver for MAX77620/MAX20024
On this series, it is proposed to combine all files together.
Laxman Dewangan (5):
clk: max77686: Combine Maxim
comining the driver and DT files, extend the support to MAX77620.
This series is based on discussion from the series
clk: max77620: Add clock driver for MAX77620/MAX20024
On this series, it is proposed to combine all files together.
Laxman Dewangan (5):
clk: max77686: Combine Maxim
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- MFD and regulator is already enabled, enabling remaining driver.
arch/arm64/configs/def
NVIDIA's Tegra210 Jetson platform (P2180) uses the MAX77620 as PMIC.
Enable GPIO, Pincontrol and RTC driver for this device.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- MFD and regulator is already enabled, enabling remaining driver.
arch/arm64/configs/defconfig | 3 +++
1 file
+ Krzysztof,
On Friday 10 June 2016 07:02 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On Fri, Jun 10, 2016 at 9:13 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
So until I change it too generic, it will not be possible.
Also if it is require then what about all max77686/ma
+ Krzysztof,
On Friday 10 June 2016 07:02 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On Fri, Jun 10, 2016 at 9:13 AM, Laxman Dewangan wrote:
So until I change it too generic, it will not be possible.
Also if it is require then what about all max77686/max77802 and max77620 in
single
On Friday 10 June 2016 06:50 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On Fri, Jun 10, 2016 at 6:12 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO(
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc
On Friday 10 June 2016 06:50 PM, Javier Martinez Canillas wrote:
Hello Laxman,
On Fri, Jun 10, 2016 at 6:12 AM, Laxman Dewangan wrote:
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO(
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc.
Add support for controlling
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc.
Add support for controlling the 32KHz clock source via clock
framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/clk/Kconfig
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc.
Add DT binding doc for the details of the properties for MAX76620
clocks.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
.../devicetree/bindings/clo
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc.
Add DT binding doc for the details of the properties for MAX76620
clocks.
Signed-off-by: Laxman Dewangan
---
.../devicetree/bindings/clock/clk-max77620.txt | 31
MAXIM MAX77620 is the power management IC with multiple DCDC/LDO
regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc.
Add support for controlling the 32KHz clock source via clock
framework.
Signed-off-by: Laxman Dewangan
---
drivers/clk/Kconfig| 9 +++
drivers/clk/Makefile
On Thursday 09 June 2016 11:08 PM, Rhyland Klein wrote:
Add regulators to the Tegra210 Smaug DTS file including
support for the max77620 PMIC.
Signed-off-by: Rhyland Klein
+
+ fps1 {
+
On Thursday 09 June 2016 11:08 PM, Rhyland Klein wrote:
Add regulators to the Tegra210 Smaug DTS file including
support for the max77620 PMIC.
Signed-off-by: Rhyland Klein
+
+ fps1 {
+ maxim,shutdown-fps-time-period-us =
) is implemented in regmap irq as generic routine. For
step (1) and (3), add callbacks from regmap irq to client driver
to handle chip specific configurations.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- None, just keeping the top of series.
drivers/base/regmap/
the hardware interrupt line by clearing
GLBLM.
Add the pre and post interrupt service handler for mask and unmask the
global interrupt mask bit (for step 1 and 3) as callback from regmap-irq.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Rename pre/post h
the hardware interrupt line by clearing
GLBLM.
Add the pre and post interrupt service handler for mask and unmask the
global interrupt mask bit (for step 1 and 3) as callback from regmap-irq.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Rename pre/post handler to max77620_irq_{mask/unmask
) is implemented in regmap irq as generic routine. For
step (1) and (3), add callbacks from regmap irq to client driver
to handle chip specific configurations.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- None, just keeping the top of series.
drivers/base/regmap/regmap-irq.c | 15
framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
Reviewed-by: Guenter Roeck <li...@roeck-us.net>
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the requ
framework.
Signed-off-by: Laxman Dewangan
Reviewed-by: Guenter Roeck
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the required
param accordingly.
- Resequence the param sets for wdt
Hi Lee,
On Wednesday 08 June 2016 08:11 PM, Lee Jones wrote:
On Fri, 20 May 2016, Laxman Dewangan wrote:
+ * MAX77620 and MAX20024 has the following steps of the interrupt handling
+ * for TOP interrupts:
+ * 1. When interrupt occurs from PMIC, mask the PMIC interrupt by setting
GLBLM.
+ * 2
Hi Lee,
On Wednesday 08 June 2016 08:11 PM, Lee Jones wrote:
On Fri, 20 May 2016, Laxman Dewangan wrote:
+ * MAX77620 and MAX20024 has the following steps of the interrupt handling
+ * for TOP interrupts:
+ * 1. When interrupt occurs from PMIC, mask the PMIC interrupt by setting
GLBLM.
+ * 2
On Wednesday 08 June 2016 08:34 PM, Andrew F. Davis wrote:
On 06/07/2016 05:30 PM, Guenter Roeck wrote:
On Fri, Jun 03, 2016 at 10:17:55AM -0500, Andrew F. Davis wrote:
On 06/03/2016 09:14 AM, Laxman Dewangan wrote:
On Friday 03 June 2016 06:59 PM, Guenter Roeck wrote:
On 06/03/2016 03:06
On Wednesday 08 June 2016 08:34 PM, Andrew F. Davis wrote:
On 06/07/2016 05:30 PM, Guenter Roeck wrote:
On Fri, Jun 03, 2016 at 10:17:55AM -0500, Andrew F. Davis wrote:
On 06/03/2016 09:14 AM, Laxman Dewangan wrote:
On Friday 03 June 2016 06:59 PM, Guenter Roeck wrote:
On 06/03/2016 03:06
framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the required
param accordingly.
- Resequence the param sets for wdt
framework.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the required
param accordingly.
- Resequence the param sets for wdt device to avoid race
On Wednesday 08 June 2016 06:45 PM, Guenter Roeck wrote:
On 06/08/2016 01:58 AM, Laxman Dewangan wrote:
Hi Guenter,
Thanks for quick review. I will take care of most of comment.
I have one query fr following comment.
Thanks,
Laxman
On Tuesday 07 June 2016 11:26 PM, Guenter Roeck wrote:
Hi
On Wednesday 08 June 2016 06:45 PM, Guenter Roeck wrote:
On 06/08/2016 01:58 AM, Laxman Dewangan wrote:
Hi Guenter,
Thanks for quick review. I will take care of most of comment.
I have one query fr following comment.
Thanks,
Laxman
On Tuesday 07 June 2016 11:26 PM, Guenter Roeck wrote:
Hi
framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the required
param accordingly.
- Resequence the param sets for wdt
framework.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Remove the error prints from start/stop/ping to simplify the function.
- Instead of stopping running WDT, inform HW RUNNING and update the required
param accordingly.
- Resequence the param sets for wdt device to avoid race
Hi Guenter,
Thanks for quick review. I will take care of most of comment.
I have one query fr following comment.
Thanks,
Laxman
On Tuesday 07 June 2016 11:26 PM, Guenter Roeck wrote:
Hi,
On Mon, Jun 06, 2016 at 05:22:44PM +0530, Laxman Dewangan wrote:
+ /* Stop watchodog */
+ ret
Hi Guenter,
Thanks for quick review. I will take care of most of comment.
I have one query fr following comment.
Thanks,
Laxman
On Tuesday 07 June 2016 11:26 PM, Guenter Roeck wrote:
Hi,
On Mon, Jun 06, 2016 at 05:22:44PM +0530, Laxman Dewangan wrote:
+ /* Stop watchodog */
+ ret
NVIDIA's Tegra210 Jetson platform (P2180) uses the following
components:
MAX77620 as system PMIC.
PCA9539 as I2C GPIO bus expander
Enable the configs for PCA9539 GPIOs and Interrupt support and
MAX77620 MFD/GPIO/Pincontrol/Regulators.
Signed-off-by: Laxman Dewangan <lde
NVIDIA's Tegra210 Jetson platform (P2180) uses the following
components:
MAX77620 as system PMIC.
PCA9539 as I2C GPIO bus expander
Enable the configs for PCA9539 GPIOs and Interrupt support and
MAX77620 MFD/GPIO/Pincontrol/Regulators.
Signed-off-by: Laxman Dewangan
---
Changes
expander on base board P2597.
- Populate all fixed voltage regulators controlled by GPIOs from Tegra,
PMIC and bus expanders.
For the different details, jetson-CV device tree files are referred from
downstream.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
-
expander on base board P2597.
- Populate all fixed voltage regulators controlled by GPIOs from Tegra,
PMIC and bus expanders.
For the different details, jetson-CV device tree files are referred from
downstream.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Rebase change and populated
On Tuesday 07 June 2016 03:22 AM, Rhyland Klein wrote:
On 6/6/2016 2:39 AM, Laxman Dewangan wrote:
On Saturday 04 June 2016 01:52 AM, Rhyland Klein wrote:
+ regulator-disable-ramp-delay = <4080>;
+ regulato
On Tuesday 07 June 2016 03:22 AM, Rhyland Klein wrote:
On 6/6/2016 2:39 AM, Laxman Dewangan wrote:
On Saturday 04 June 2016 01:52 AM, Rhyland Klein wrote:
+ regulator-disable-ramp-delay = <4080>;
+ regulato
the client.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
The patch was sent earlier but dependent mfd header file was not available on
tree and hence it was not applied.
The mfd patches are in rc-4.7 and hence resending again this patch.
Changes from V3:
- Added comment on the fu
the client.
Signed-off-by: Laxman Dewangan
---
The patch was sent earlier but dependent mfd header file was not available on
tree and hence it was not applied.
The mfd patches are in rc-4.7 and hence resending again this patch.
Changes from V3:
- Added comment on the function get_temp
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document to details out the DT property related
to MAX77620 thermal functionality.
Signed-off-by: Laxman Dewangan <lde
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document to details out the DT property related
to MAX77620 thermal functionality.
Signed-off-by: Laxman Dewangan
---
Changes
On Tuesday 07 June 2016 09:25 AM, Keerthy wrote:
On Monday 06 June 2016 05:14 PM, Laxman Dewangan wrote:
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document
On Tuesday 07 June 2016 09:25 AM, Keerthy wrote:
On Monday 06 June 2016 05:14 PM, Laxman Dewangan wrote:
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document
E tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Laxman Dewangan <ldewan...@nvidia.com>
Cc: Linus Walleij <linus.wall...@linaro.org>
Cc: linux-g...@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortma...@windriver.com>
I wil
LE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Laxman Dewangan <ldewan...@nvidia.com>
Cc: Linus Walleij <linus.wall...@linaro.org>
Cc: linux-g...@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortma...@windriver.com&
LE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Laxman Dewangan
Cc: Linus Walleij
Cc: linux-g...@vger.kernel.org
Signed-off-by: Paul Gortmaker
Let's make the driver as tristate.
tristate "Pinctrl driver for the PALMAS Series MFD devices"
E tag etc. since all that information
is already contained at the top of the file in the comments.
Cc: Laxman Dewangan
Cc: Linus Walleij
Cc: linux-g...@vger.kernel.org
Signed-off-by: Paul Gortmaker
I will say lets make the driver as tristate.
tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
On Tuesday 07 June 2016 09:18 AM, Keerthy wrote:
Hi Laxman,
On Monday 06 June 2016 05:14 PM, Laxman Dewangan wrote:
Maxim Semiconductor Max77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add thermal driver
On Tuesday 07 June 2016 09:18 AM, Keerthy wrote:
Hi Laxman,
On Monday 06 June 2016 05:14 PM, Laxman Dewangan wrote:
Maxim Semiconductor Max77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add thermal driver
framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/watchdog/Kconfig| 9 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/max77620_wdt.c | 220
3 files changed, 230 insertions(+)
create mode 100644 d
framework.
Signed-off-by: Laxman Dewangan
---
drivers/watchdog/Kconfig| 9 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/max77620_wdt.c | 220
3 files changed, 230 insertions(+)
create mode 100644 drivers/watchdog/max77620_wdt.c
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document to details out the DT property related
to MAX77620 thermal functionality.
Signed-off-by: Laxman Dewangan <lde
Maxim Semiconductor MAX77620 supports alarm interrupts when
its die temperature crosses 120C and 140C. These threshold
temperatures are not configurable.
Add DT binding document to details out the DT property related
to MAX77620 thermal functionality.
Signed-off-by: Laxman Dewangan
the client.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
The patch was sent earlier but dependent mfd header file was not available on
tree and hence it was not applied.
The mfd patches are in rc-4.7 and hence resending again this patch.
drivers/thermal/Kconfig
the client.
Signed-off-by: Laxman Dewangan
---
The patch was sent earlier but dependent mfd header file was not available on
tree and hence it was not applied.
The mfd patches are in rc-4.7 and hence resending again this patch.
drivers/thermal/Kconfig| 10 +++
drivers/thermal/Makefile
On Saturday 04 June 2016 01:52 AM, Rhyland Klein wrote:
+
+ max77620_default: pinmux@0 {
+ pin_gpio {
+ pins = "gpio0", "gpio1", "gpio2",
"gpio5",
+ "gpio6",
On Saturday 04 June 2016 01:52 AM, Rhyland Klein wrote:
+
+ max77620_default: pinmux@0 {
+ pin_gpio {
+ pins = "gpio0", "gpio1", "gpio2",
"gpio5",
+ "gpio6",
f * period first before any scaling/division.
Function pwm_set_relative_duty_cycle() does the same, and hence it is fine.
state->duty_cycle = DIV_ROUND_CLOSEST_ULL((u64)val * state->period,
+ scale);
Acked-by: Laxman Dewangan <ldewan...@nvidia.com>
Thanks,
Laxman
ny scaling/division.
Function pwm_set_relative_duty_cycle() does the same, and hence it is fine.
state->duty_cycle = DIV_ROUND_CLOSEST_ULL((u64)val * state->period,
+ scale);
Acked-by: Laxman Dewangan
Thanks,
Laxman
On Friday 03 June 2016 06:59 PM, Guenter Roeck wrote:
On 06/03/2016 03:06 AM, Jonathan Cameron wrote:
On 01/06/16 13:34, Laxman Dewangan wrote:
The INA3221 is a three-channel, high-side current and bus voltage
monitor
with an I2C interface from Texas Instruments. The INA3221 monitors both
On Friday 03 June 2016 06:59 PM, Guenter Roeck wrote:
On 06/03/2016 03:06 AM, Jonathan Cameron wrote:
On 01/06/16 13:34, Laxman Dewangan wrote:
The INA3221 is a three-channel, high-side current and bus voltage
monitor
with an I2C interface from Texas Instruments. The INA3221 monitors both
On Friday 03 June 2016 05:41 PM, Jonathan Cameron wrote:
On 03/06/16 12:48, Laxman Dewangan wrote:
On Friday 03 June 2016 03:49 PM, Jonathan Cameron wrote:
+
+enable-power-monitor:Boolean, Enable power monitoring of the device.
Is this the power good stuff? description should
301 - 400 of 3619 matches
Mail list logo