On Monday 18 April 2016 09:59 PM, Stephen Warren wrote:
On 04/18/2016 02:46 AM, Laxman Dewangan wrote:
Remove the file static device handle variable as this is just
required for prints. The required handle can be stored in
tegra_gpio_chip and hence it become redundancy.
This seems fine
On Sunday 17 April 2016 04:24 PM, Jonathan Cameron wrote:
On 14/04/16 15:41, Laxman Dewangan wrote:
+static int gadc_thermal_read_channel(struct gadc_thermal_info *gti, int *val)
+{
+ int ret;
+
+ ret = iio_read_channel_processed(gti->channel, val);
+ if (ret
On Sunday 17 April 2016 04:24 PM, Jonathan Cameron wrote:
On 14/04/16 15:41, Laxman Dewangan wrote:
+static int gadc_thermal_read_channel(struct gadc_thermal_info *gti, int *val)
+{
+ int ret;
+
+ ret = iio_read_channel_processed(gti->channel, val);
+ if (ret
Use of_device_get_match_data() for getting matched data
instead of implementing this locally.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/gpio/gpio-tegra.c | 50 +++
1 file changed, 24 insertions(+), 26 deletions(-)
diff
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/gpio/gpio-tegra.
Remove the file static device handle variable as this is just
required for prints. The required handle can be stored in
tegra_gpio_chip and hence it become redundancy.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/gpio/gpio-tegra.c | 8
1 file changed, 4 inse
Use of_device_get_match_data() for getting matched data
instead of implementing this locally.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 50 +++
1 file changed, 24 insertions(+), 26 deletions(-)
diff --git a/drivers/gpio/gpio
NVIDIA's Tegra210 support the HW debounce in the GPIO
controller for all its GPIO pins.
Add support for setting debounce timing by implementing the
set_debounce callback of gpiochip.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 48
Remove the file static device handle variable as this is just
required for prints. The required handle can be stored in
tegra_gpio_chip and hence it become redundancy.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c | 8
1 file changed, 4 insertions(+), 4 deletions
On Sunday 17 April 2016 05:30 PM, Jonathan Cameron wrote:
On 06/04/16 11:31, Laxman Dewangan wrote:
Some of kernel driver uses the IIO framework to get the sensor
value via ADC or IIO HW driver. The client driver get iio channel
by iio_channel_get() and release it by calling
On Sunday 17 April 2016 05:30 PM, Jonathan Cameron wrote:
On 06/04/16 11:31, Laxman Dewangan wrote:
Some of kernel driver uses the IIO framework to get the sensor
value via ADC or IIO HW driver. The client driver get iio channel
by iio_channel_get() and release it by calling
On Saturday 16 April 2016 06:55 PM, Jonathan Cameron wrote:
On 10/04/16 18:35, Laxman Dewangan wrote:
Yaah, possibly race for very small time possible.
The limitation of devm_ api usage is that, we can keep using this
till we have devm_ api continuous and if some resource
On Saturday 16 April 2016 06:55 PM, Jonathan Cameron wrote:
On 10/04/16 18:35, Laxman Dewangan wrote:
Yaah, possibly race for very small time possible.
The limitation of devm_ api usage is that, we can keep using this
till we have devm_ api continuous and if some resource
On Saturday 16 April 2016 12:00 AM, Jon Hunter wrote:
On 15/04/16 18:49, Laxman Dewangan wrote:
On Friday 15 April 2016 11:14 PM, Jon Hunter wrote:
On 15/04/16 17:41, Laxman Dewangan wrote:
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used
On Saturday 16 April 2016 12:00 AM, Jon Hunter wrote:
On 15/04/16 18:49, Laxman Dewangan wrote:
On Friday 15 April 2016 11:14 PM, Jon Hunter wrote:
On 15/04/16 17:41, Laxman Dewangan wrote:
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used
On Friday 15 April 2016 11:14 PM, Jon Hunter wrote:
On 15/04/16 17:41, Laxman Dewangan wrote:
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used pins as this is the property from pincon generic so that I can
use the generic implementation
On Friday 15 April 2016 11:14 PM, Jon Hunter wrote:
On 15/04/16 17:41, Laxman Dewangan wrote:
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used pins as this is the property from pincon generic so that I can
use the generic implementation
Hi Lee,
On Wednesday 30 March 2016 07:59 PM, Laxman Dewangan wrote:
Add SW support for MAXIM Semiconductor's Power Management
IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs,
RTC, watchdog, clocks etc.
This series add respective driver for each of sub-modules.
Can you
Hi Lee,
On Wednesday 30 March 2016 07:59 PM, Laxman Dewangan wrote:
Add SW support for MAXIM Semiconductor's Power Management
IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs,
RTC, watchdog, clocks etc.
This series add respective driver for each of sub-modules.
Can you
On Friday 15 April 2016 10:05 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure
On Friday 15 April 2016 10:05 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used pins as this is the property from pincon generic so that I can
use the generic implementation.
Here, I will not go to the pin level control as HW does not support pin
level control.
I
On Friday 15 April 2016 09:15 PM, Jon Hunter wrote:
On 15/04/16 16:14, Laxman Dewangan wrote:
I used pins as this is the property from pincon generic so that I can
use the generic implementation.
Here, I will not go to the pin level control as HW does not support pin
level control.
I
On Friday 15 April 2016 10:11 PM, Stephen Warren wrote:
On 04/15/2016 10:21 AM, Laxman Dewangan wrote:
On Friday 15 April 2016 09:54 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I
On Friday 15 April 2016 10:11 PM, Stephen Warren wrote:
On 04/15/2016 10:21 AM, Laxman Dewangan wrote:
On Friday 15 April 2016 09:54 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I
On Friday 15 April 2016 09:54 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
Tegra PMC register to set different voltage level of IO
On Friday 15 April 2016 09:54 PM, Stephen Warren wrote:
On 04/12/2016 08:56 AM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
Tegra PMC register to set different voltage level of IO
On Friday 15 April 2016 08:44 PM, Jon Hunter wrote:
On 15/04/16 15:12, Laxman Dewangan wrote:
All CSI pads are lined to single IO rail.
I agree with this and from the data-sheet I see the rail that powers the
CSI (and DSI) interfaces is called AVDD_DSI_CSI. But again, in the DT
document you
On Friday 15 April 2016 08:44 PM, Jon Hunter wrote:
On 15/04/16 15:12, Laxman Dewangan wrote:
All CSI pads are lined to single IO rail.
I agree with this and from the data-sheet I see the rail that powers the
CSI (and DSI) interfaces is called AVDD_DSI_CSI. But again, in the DT
document you
On Friday 15 April 2016 07:46 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure the
voltage
On Friday 15 April 2016 07:46 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure the
voltage
On Friday 15 April 2016 07:33 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 1:47 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
On Friday 15 April 2016 04:45 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan <ldewan...@nvidia.com>
wrote:
But to be s
On Friday 15 April 2016 07:33 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 1:47 PM, Laxman Dewangan wrote:
On Friday 15 April 2016 04:45 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan
wrote:
But to be sure we would like to know what is actually happening
On Friday 15 April 2016 04:45 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
On Friday 15 April 2016 02:55 PM, Linus Walleij wrote:
If the pin could actually set a voltage level it would have a regulator.
I don't believe that. I
On Friday 15 April 2016 04:45 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 11:55 AM, Laxman Dewangan wrote:
On Friday 15 April 2016 02:55 PM, Linus Walleij wrote:
If the pin could actually set a voltage level it would have a regulator.
I don't believe that. I think it is selecting one
On Friday 15 April 2016 02:55 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 10:39 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
On Friday 15 April 2016 01:38 PM, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan <ldewan...@nvidia.com>
wrote:
+static
On Friday 15 April 2016 02:55 PM, Linus Walleij wrote:
On Fri, Apr 15, 2016 at 10:39 AM, Laxman Dewangan wrote:
On Friday 15 April 2016 01:38 PM, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan
wrote:
+static const struct pinconf_generic_params
On Friday 15 April 2016 01:38 PM, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also the IO pads can be configured
for power down
On Friday 15 April 2016 01:38 PM, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also the IO pads can be configured
for power down state if it is not used. SW needs
On Friday 15 April 2016 01:30 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Fri, Apr 15, 2016 at 09:54:34AM +0200, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
NVIDIA Tegra210 supports some of the IO interface which can o
On Friday 15 April 2016 01:30 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Fri, Apr 15, 2016 at 09:54:34AM +0200, Linus Walleij wrote:
On Tue, Apr 12, 2016 at 4:56 PM, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O
support for thermal sensor driver which read the voltage across
sensor resistance from ADC through IIO framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Use the two dimensional lookup table for temperature vs ADC value.
- Use non devm_ for thermal zone
support for thermal sensor driver which read the voltage across
sensor resistance from ADC through IIO framework.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Use the two dimensional lookup table for temperature vs ADC value.
- Use non devm_ for thermal zone sensor registration
the DT property and provide the example for how to use it.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Make the lookup table to two dimensional instead of single array of linear
step of temperature.
- Remove detailing of IIO frameowrk and drivers.
- Added
the DT property and provide the example for how to use it.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Make the lookup table to two dimensional instead of single array of linear
step of temperature.
- Remove detailing of IIO frameowrk and drivers.
- Added proper braces, indenting
will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From d2d5437bdfdde20a75bdf59db1c1a77721613b22 Mon Sep 17 00:00:00 2001
From: Laxman Dewangan <ldewan...@nvidia.com>
Date: Wed, 13 Apr 2016 15:29:45 +0530
Subject: [PATCH] reg
will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From d2d5437bdfdde20a75bdf59db1c1a77721613b22 Mon Sep 17 00:00:00 2001
From: Laxman Dewangan
Date: Wed, 13 Apr 2016 15:29:45 +0530
Subject: [PATCH] regulator: max8973: add support
On Wednesday 13 April 2016 06:13 PM, Linus Walleij wrote:
On Fri, Mar 11, 2016 at 2:43 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
If GPIO hog configuration failed while adding OF based
gpiochip() then return the error instead of ignoring it.
This helps of properly handling th
On Wednesday 13 April 2016 06:13 PM, Linus Walleij wrote:
On Fri, Mar 11, 2016 at 2:43 PM, Laxman Dewangan wrote:
If GPIO hog configuration failed while adding OF based
gpiochip() then return the error instead of ignoring it.
This helps of properly handling the gpio driver dependency.
When
from DT.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Documentation/devicetree/bindings/regulator/max8973-regulator.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/max8973-regulator.txt
b/Documentation/devicetree/bi
the junction temp via thermal framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
Split this in 2 patches, one from driver and other for binding doc.
Taken care of Rob's review comment for property change.
Changes from V2:
This patch was submitted e
from DT.
Signed-off-by: Laxman Dewangan
---
Documentation/devicetree/bindings/regulator/max8973-regulator.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/max8973-regulator.txt
b/Documentation/devicetree/bindings/regulator/max8973
the junction temp via thermal framework.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
Split this in 2 patches, one from driver and other for binding doc.
Taken care of Rob's review comment for property change.
Changes from V2:
This patch was submitted earlier and reverted due to compilation
On Wednesday 13 April 2016 02:55 PM, Jon Hunter wrote:
On 13/04/16 10:00, Laxman Dewangan wrote:
On Wednesday 13 April 2016 02:17 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail
On Wednesday 13 April 2016 02:55 PM, Jon Hunter wrote:
On 13/04/16 10:00, Laxman Dewangan wrote:
On Wednesday 13 April 2016 02:17 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail
On Wednesday 13 April 2016 02:34 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure
On Wednesday 13 April 2016 02:34 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports the IO pads which can operate at 1.8V
or 3.3V I/O voltage levels. Also IO pads can be configured for
power down state if it is not in used. SW needs to configure
On Wednesday 13 April 2016 02:17 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
Tegra PMC register to set different voltage level of IO interface
On Wednesday 13 April 2016 02:17 PM, Jon Hunter wrote:
On 12/04/16 15:56, Laxman Dewangan wrote:
NVIDIA Tegra210 supports some of the IO interface which can operate
at 1.8V or 3.3V I/O rail voltage levels. SW needs to configure
Tegra PMC register to set different voltage level of IO interface
On Tuesday 12 April 2016 11:33 PM, Jon Hunter wrote:
On 12/04/16 17:59, Laxman Dewangan wrote:
On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote:
+#define TEGRA_IO_RAIL_EMMC35
On Tuesday 12 April 2016 11:33 PM, Jon Hunter wrote:
On 12/04/16 17:59, Laxman Dewangan wrote:
On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote:
+#define TEGRA_IO_RAIL_EMMC35
On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote:
NVIDIA Tegra210 has extended the IO rails for new IO pads
and added some new IO rails on top of its previous SoC.
Add all supported IO
On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote:
NVIDIA Tegra210 has extended the IO rails for new IO pads
and added some new IO rails on top of its previous SoC.
Add all supported IO
On Tuesday 12 April 2016 08:56 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:41PM +0530, Laxman Dewangan wrote:
Use BIT macro for register field definition and make constant as
unsigned when using in shift operator like instead of (3 << 30)
On Tuesday 12 April 2016 08:56 PM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, Apr 12, 2016 at 08:26:41PM +0530, Laxman Dewangan wrote:
Use BIT macro for register field definition and make constant as
unsigned when using in shift operator like instead of (3 << 30)
voltage from the client driver.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/soc/tegra/pmc.c | 95 +
include/soc/tegra/pmc.h | 32 +
2 files changed, 127 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/d
voltage from the client driver.
Signed-off-by: Laxman Dewangan
---
drivers/soc/tegra/pmc.c | 95 +
include/soc/tegra/pmc.h | 32 +
2 files changed, 127 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index
configurations via pincontrol DT support and pincontrol dynamic
configruations.
Laxman Dewangan (7):
soc/tegra: pmc: Use BIT macro for register field definition
soc/tegra: pmc: Add new Tegra210 IO rails
soc/tegra: pmc: Add interface to get IO rail power status
soc/tegra: pmc: Add interface to set
configurations via pincontrol DT support and pincontrol dynamic
configruations.
Laxman Dewangan (7):
soc/tegra: pmc: Use BIT macro for register field definition
soc/tegra: pmc: Add new Tegra210 IO rails
soc/tegra: pmc: Add interface to get IO rail power status
soc/tegra: pmc: Add interface to set
.
The voltage and power state configurations of pads are provided
through pin control frameworks. Add pin control driver for Tegra's
IO pads' voltage and power state configurations.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/pinctrl/tegra/Kconfig | 11 +
d
.
The voltage and power state configurations of pads are provided
through pin control frameworks. Add pin control driver for Tegra's
IO pads' voltage and power state configurations.
Signed-off-by: Laxman Dewangan
---
drivers/pinctrl/tegra/Kconfig | 11 +
drivers/pinctrl/tegra/Makefile
Use BIT macro for register field definition and make constant as
unsigned when using in shift operator like instead of (3 << 30),
make it to (3U << 30).
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/soc/tegra/pmc.c | 42 +---
Add API to get the IO rail power status of the Tegra IO pads.
This will help client driver to get the current power status
of IO pads for handling IO pad power.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/soc/tegra/pmc.c | 16
include/soc/tegra/pmc.
NVIDIA Tegra210 has extended the IO rails for new IO pads
and added some new IO rails on top of its previous SoC.
Add all supported IO rails from Tegra210 to the Tegra PMC header.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
include/soc/tegra/pmc.h | 14 ++
Use BIT macro for register field definition and make constant as
unsigned when using in shift operator like instead of (3 << 30),
make it to (3U << 30).
Signed-off-by: Laxman Dewangan
---
drivers/soc/tegra/pmc.c | 42 +-
1 file changed, 2
Add API to get the IO rail power status of the Tegra IO pads.
This will help client driver to get the current power status
of IO pads for handling IO pad power.
Signed-off-by: Laxman Dewangan
---
drivers/soc/tegra/pmc.c | 16
include/soc/tegra/pmc.h | 6 ++
2 files changed
NVIDIA Tegra210 has extended the IO rails for new IO pads
and added some new IO rails on top of its previous SoC.
Add all supported IO rails from Tegra210 to the Tegra PMC header.
Signed-off-by: Laxman Dewangan
---
include/soc/tegra/pmc.h | 14 ++
1 file changed, 14 insertions
vidia,tegra210-io-pad";
::
};
};
In this pmc-pad-control is the sub device of PMC and the device
compatibility is nvidia,tegra210-io-pad.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
drivers/soc/tegra/pmc.c | 6 ++
1 file chang
vidia,tegra210-io-pad";
::
};
};
In this pmc-pad-control is the sub device of PMC and the device
compatibility is nvidia,tegra210-io-pad.
Signed-off-by: Laxman Dewangan
---
drivers/soc/tegra/pmc.c | 6 ++
1 file changed, 6 insertions(+)
binding document for detailing the DT properties for
configuring IO pads voltage levels and its power state.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
.../bindings/pinctrl/nvidia,tegra210-io-pad.txt| 102 +
.../dt-bindings/pinctrl/pinctrl-tegra210-io
binding document for detailing the DT properties for
configuring IO pads voltage levels and its power state.
Signed-off-by: Laxman Dewangan
---
.../bindings/pinctrl/nvidia,tegra210-io-pad.txt| 102 +
.../dt-bindings/pinctrl/pinctrl-tegra210-io-pad.h | 24 +
2 files
On Tuesday 12 April 2016 06:32 AM, Mark Brown wrote:
* PGP Signed by an unknown key
On Tue, Apr 05, 2016 at 01:31:41PM +0530, Laxman Dewangan wrote:
On Friday 01 April 2016 09:41 PM, Mark Brown wrote:
Now there is not really equation that how it control dV/dt with required
current vs
On Tuesday 12 April 2016 06:32 AM, Mark Brown wrote:
* PGP Signed by an unknown key
On Tue, Apr 05, 2016 at 01:31:41PM +0530, Laxman Dewangan wrote:
On Friday 01 April 2016 09:41 PM, Mark Brown wrote:
Now there is not really equation that how it control dV/dt with required
current vs
Hi Wolfram,
On Monday 29 February 2016 07:07 PM, Laxman Dewangan wrote:
Add resource managed version of i2c_new_dummy() and
i2c_unregister_device().
This helps in reducing the code size in error path and device
remove callbacks and making proper sequence for deallocations.
Signed-off
Hi Wolfram,
On Monday 29 February 2016 07:07 PM, Laxman Dewangan wrote:
Add resource managed version of i2c_new_dummy() and
i2c_unregister_device().
This helps in reducing the code size in error path and device
remove callbacks and making proper sequence for deallocations.
Signed-off
the DT property and provide the example for how to use it.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Make the lookup table to two dimensional instead of single array of linear
step of temperature.
- Remove detailing of IIO frameowrk and drivers.
- Added
the DT property and provide the example for how to use it.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Make the lookup table to two dimensional instead of single array of linear
step of temperature.
- Remove detailing of IIO frameowrk and drivers.
- Added proper braces, indenting
for thermal sensor driver which read the sensor
data through IIO framework which has ADC driver as HW driver.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Use the two dimensional lookup table for temperature vs ADC value.
- Use non devm_ for thermal zone
for thermal sensor driver which read the sensor
data through IIO framework which has ADC driver as HW driver.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Use the two dimensional lookup table for temperature vs ADC value.
- Use non devm_ for thermal zone sensor registration as there may
On Sunday 10 April 2016 07:35 PM, Jonathan Cameron wrote:
On 06/04/16 15:58, Laxman Dewangan wrote:
Hi Daniel,
On Wednesday 06 April 2016 07:19 PM, Daniel Baluta wrote:
On Wed, Apr 6, 2016 at 1:31 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote:
Some of kernel driver uses t
On Sunday 10 April 2016 07:35 PM, Jonathan Cameron wrote:
On 06/04/16 15:58, Laxman Dewangan wrote:
Hi Daniel,
On Wednesday 06 April 2016 07:19 PM, Daniel Baluta wrote:
On Wed, Apr 6, 2016 at 1:31 PM, Laxman Dewangan wrote:
Some of kernel driver uses the IIO framework to get the sensor
Add devm wrappers for the mfd_add_devices() in the list of managed
interfaces.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
---
Changes from V1:
- Reformat the commit message.
- Remove devm_ for mfd_remove_devices() as this is not used.
Documentation/driver-model/devres.txt | 3
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Boris Brezillon <boris.brezil...@free-electrons.com>
Acked-by: Bor
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Wenyou Yang <wenyou.y...@atmel.com>
CC: Krzysztof Kozlows
Add devm wrappers for the mfd_add_devices() in the list of managed
interfaces.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Reformat the commit message.
- Remove devm_ for mfd_remove_devices() as this is not used.
Documentation/driver-model/devres.txt | 3 +++
1 file changed, 3
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan
CC: Boris Brezillon
Acked-by: Boris Brezillon
---
Changes from V1:
- Convert mfd to MFD.
- Run
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan
CC: Wenyou Yang
CC: Krzysztof Kozlowski
---
Changes from V1:
- Convert mfd to MFD.
- Run checkpatch
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Guennadi Liakhovetski <g.liakhovet...@gmx.de>
---
Changes from V
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan
CC: Guennadi Liakhovetski
---
Changes from V1:
- Convert mfd to MFD.
- Run checkpatch with --strict
Use devm_mfd_add_devices() for MFD devices registration and get
rid of .remove callback to remove MFD child-devices. This is done
by managed device framework.
Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com>
CC: Milo Kim <milo@ti.com>
Acked-by: Milo Kim <milo@ti.co
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