On Tue, 2016-04-12 at 23:13 +0200, Wolfram Sang wrote:
> Hi,
>
> thanks for the submission!
>
> On Tue, Mar 08, 2016 at 02:23:51AM +0800, Liguo Zhang wrote:
> > Signal complete() in the i2c irq handler after one transfer done,
> > and then wait_for_compl
On Tue, 2016-04-12 at 23:13 +0200, Wolfram Sang wrote:
> Hi,
>
> thanks for the submission!
>
> On Tue, Mar 08, 2016 at 02:23:51AM +0800, Liguo Zhang wrote:
> > Signal complete() in the i2c irq handler after one transfer done,
> > and then wait_for_compl
Signal complete() in the i2c irq handler after one transfer done,
and then wait_for_completion_timeout() will return, this procedure
may cost much time, so only signal complete() when the entire
transaction has been completed, it will reduce the entire transaction
time.
Signed-off-by: Liguo Zhang
Signal complete() in the i2c irq handler after one transfer done,
and then wait_for_completion_timeout() will return, this procedure
may cost much time, so only signal complete() when the entire
transaction has been completed, it will reduce the entire transaction
time.
Signed-off-by: Liguo Zhang
On Mon, 2016-01-04 at 10:55 +0100, Wolfram Sang wrote:
> On Mon, Jan 04, 2016 at 02:15:37PM +0800, Liguo Zhang wrote:
> > Add a dt binding for the MT2701 soc.
> >
> > Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
>
> This should probably go
On Mon, 2016-01-04 at 10:55 +0100, Wolfram Sang wrote:
> On Mon, Jan 04, 2016 at 02:15:37PM +0800, Liguo Zhang wrote:
> > Add a dt binding for the MT2701 soc.
> >
> > Signed-off-by: Liguo Zhang
>
> This should probably go with the other patch via arm-soc, or?
T
Send the next transfer in the i2c irq handler, and only signal
complete() when the entire transaction has been completed.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v2:
Remove the unused variable left_num in mtk_i2c_transfer().
---
drivers/i2c/busses/i2c-mt65xx.c
Send the next transfer in the i2c irq handler, and only signal
complete() when the entire transaction has been completed.
Signed-off-by: Liguo Zhang
---
change in v2:
Remove the unused variable left_num in mtk_i2c_transfer().
---
drivers/i2c/busses/i2c-mt65xx.c | 221
Send the next transfer in the i2c irq handler, and only signal
complete() when the entire transaction has been completed.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 220 ++--
1 file changed, 123 inse
Send the next transfer in the i2c irq handler, and only signal
complete() when the entire transaction has been completed.
Signed-off-by: Liguo Zhang
---
drivers/i2c/busses/i2c-mt65xx.c | 220 ++--
1 file changed, 123 insertions(+), 97 deletions(-)
diff --git
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
change in v6:
Remove unnecessary init for reg_4g_mode.
change in v5:
Use BIT_ULL() to fix kernel building warning.
change in v4:
Use BIT_ULL() to fix
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
change in v5:
Use BIT_ULL() to fix kernel building warning.
change in v4:
Use BIT_ULL() to fix kernel building warning.
change in v3:
Only inline
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
change in v4:
Use BIT_ULL() to fix kernel building warning.
change in v3:
Only inline the computation of reg_4g_mode in mtk_i2c_set_4g_mode().
change
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v6:
Remove unnecessary init for reg_4g_mode.
change in v5:
Use BIT_ULL() to fix kernel building warning.
change
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v5:
Use BIT_ULL() to fix kernel building warning.
change in v4:
Use BIT_ULL() to fix kernel building warning.
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v4:
Use BIT_ULL() to fix kernel building warning.
change in v3:
Only inline the computation of reg_4
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
change in v3:
Only inline the computation of reg_4g_mode in mtk_i2c_set_4g_mode().
change in v2:
Define a static inline funtion mtk_i2c_set_4g_mode
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v3:
Only inline the computation of reg_4g_mode in mtk_i2c_set_4g_mode().
change in v2:
Define a static inline f
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
change in v2:
Define a static inline funtion mtk_i2c_set_4g_mode() for support 4g mode.
---
drivers/i2c/busses/i2c-mt65xx.c | 51
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
change in v2:
Define a static inline funtion mtk_i2c_set_4g_mode() for support 4g mode.
---
drivers/i2c/busses/i2c-mt
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang
---
drivers/i2c/busses/i2c-mt65xx.c | 41 +++
1 file changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c
If 4GB mode is enable, we should add 4gb mode support in i2c driver.
Set 4GB mode register to support 4GB mode.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 41 +++
1 file changed, 41 insertions(+)
diff
Add i2c dtsi node for MT2701.
Signed-off-by: Liguo Zhang
---
arch/arm/boot/dts/mt2701.dtsi | 42 ++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bd88ae9..bb34770 100644
--- a/arch/arm
Add a dt binding for the MT2701 soc.
Signed-off-by: Liguo Zhang
---
Documentation/devicetree/bindings/i2c/i2c-mt6577.txt | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt
b/Documentation/devicetree/bindings/i2c
Add a dt binding for the MT2701 soc.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
Documentation/devicetree/bindings/i2c/i2c-mt6577.txt | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt6577.
Add i2c dtsi node for MT2701.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
arch/arm/boot/dts/mt2701.dtsi | 42 ++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index b
For mt8173 platform with auto restart support, when doing i2c multi
transfer in high speed, we should ignore the first restart irq after
the master code, otherwise the first transfer will be discarded.
Signed-off-by: Liguo Zhang
Reviewed-by: Eddie Huang
---
Change in v3:
ignore the first
For mt8173 platform with auto restart support, when doing i2c multi
transfer in high speed, we should ignore the first restart irq after
the master code, otherwise the first transfer will be discarded.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
Reviewed-by: Eddie Huang <
On Sat, 2015-11-14 at 22:38 +0800, Daniel Kurtz wrote:
> On Mon, Nov 9, 2015 at 1:43 PM, Liguo Zhang wrote:
> > For platform with auto restart support, when doing i2c multi transfer
> > in high speed, for example, doing write-then-read transfer, the master
> > code will occu
On Sat, 2015-11-14 at 22:38 +0800, Daniel Kurtz wrote:
> On Mon, Nov 9, 2015 at 1:43 PM, Liguo Zhang <liguo.zh...@mediatek.com> wrote:
> > For platform with auto restart support, when doing i2c multi transfer
> > in high speed, for example, doing write-then-read transfer
. If hardware support auto restart, need
driver
to send master code first.
Change in v2:
fix i2c checkpatch error.
Liguo Zhang (2):
i2c: mediatek: add i2c first write then read optimization
i2c: mediatek: fix i2c multi transfer issue in high speed mode
drivers/i2c/busses/i2c-mt65xx.c | 78
the master code, and then start i2c multi transfer.
Signed-off-by: Liguo Zhang
Reviewed-by: Eddie Huang
---
drivers/i2c/busses/i2c-mt65xx.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
latency.
Signed-off-by: Liguo Zhang
Reviewed-by: Eddie Huang
---
drivers/i2c/busses/i2c-mt65xx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 9b86716..dc4aac6 100644
latency.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
Reviewed-by: Eddie Huang <eddie.hu...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx
. If hardware support auto restart, need
driver
to send master code first.
Change in v2:
fix i2c checkpatch error.
Liguo Zhang (2):
i2c: mediatek: add i2c first write then read optimization
i2c: mediatek: fix i2c multi transfer issue in high speed mode
drivers/i2c/busses/i2c-mt65xx.c | 78
the master code, and then start i2c multi transfer.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
Reviewed-by: Eddie Huang <eddie.hu...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 45 +
1 file changed, 45 insertions(+)
diff --git a
latency.
Signed-off-by: Liguo Zhang
---
drivers/i2c/busses/i2c-mt65xx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 9b86716..dc4aac6 100644
--- a/drivers/i2c/busses
the master code, and then start i2c multi transfer.
Signed-off-by: Liguo Zhang
---
drivers/i2c/busses/i2c-mt65xx.c | 44 +
1 file changed, 44 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index dc4aac6..0b9e9f5
. If hardware support auto restart, need
driver
to send master code first.
Liguo Zhang (2):
i2c: mediatek: add i2c first write then read optimization
i2c: mediatek: fix i2c multi transfer issue in high speed mode
drivers/i2c/busses/i2c-mt65xx.c | 77 +
1 file
latency.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 33 +++--
1 file changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 9b86716..dc4aac6
the master code, and then start i2c multi transfer.
Signed-off-by: Liguo Zhang <liguo.zh...@mediatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 44 +
1 file changed, 44 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt
. If hardware support auto restart, need
driver
to send master code first.
Liguo Zhang (2):
i2c: mediatek: add i2c first write then read optimization
i2c: mediatek: fix i2c multi transfer issue in high speed mode
drivers/i2c/busses/i2c-mt65xx.c | 77 +
1 file
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