Re: [PATCH v3] tools/perf: Fix the mask in regs_dump__printf and print_sample_iregs

On Tuesday 21 June 2016 09:05 PM, Yury Norov wrote: > On Tue, Jun 21, 2016 at 08:26:40PM +0530, Madhavan Srinivasan wrote: >> When decoding the perf_regs mask in regs_dump__printf(), >> we loop through the mask using find_first_bit and find_next_bit functions. >> &

[PATCH v3] tools/perf: Fix the mask in regs_dump__printf and print_sample_iregs

..@linux.intel.com> Cc: Jiri Olsa <jo...@kernel.org> Cc: Adrian Hunter <adrian.hun...@intel.com> Cc: Kan Liang <kan.li...@intel.com> Cc: Wang Nan <wangn...@huawei.com> Cc: Michael Ellerman <m...@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.

[PATCH v3] tools/perf: Fix the mask in regs_dump__printf and print_sample_iregs

Suggested-by: Yury Norov Cc: Yury Norov Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Adrian Hunter Cc: Kan Liang Cc: Wang Nan Cc: Michael Ellerman Signed-off-by: Madhavan Srinivasan --- Changelog v2: 1)Moved the swap code to

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

On Monday 20 June 2016 03:10 PM, Jiri Olsa wrote: > On Mon, Jun 20, 2016 at 05:27:25PM +0800, Wangnan (F) wrote: >> >> On 2016/6/20 17:18, Jiri Olsa wrote: >>> On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: >>>> When decoding the

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

On Monday 20 June 2016 03:10 PM, Jiri Olsa wrote: > On Mon, Jun 20, 2016 at 05:27:25PM +0800, Wangnan (F) wrote: >> >> On 2016/6/20 17:18, Jiri Olsa wrote: >>> On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: >>>> When decoding the

[PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

kernel.org> Cc: Adrian Hunter <adrian.hun...@intel.com> Cc: Kan Liang <kan.li...@intel.com> Cc: Wang Nan <wangn...@huawei.com> Cc: Michael Ellerman <m...@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- Changelog v1: 1)updated commit me

[PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Adrian Hunter Cc: Kan Liang Cc: Wang Nan Cc: Michael Ellerman Signed-off-by: Madhavan Srinivasan --- Changelog v1: 1)updated commit message and patch subject 2)Add the fix to print_samp

Re: [PATCH] tools/perf: Fix the mask in regs_dump__printf

On Friday 17 June 2016 12:07 PM, Jiri Olsa wrote: > On Fri, Jun 17, 2016 at 10:52:38AM +0530, Madhavan Srinivasan wrote: >> When decoding the perf_regs mask in regs_dump__printf(), >> we loop through the mask using find_first_bit and find_next_bit functions. >> And

Re: [PATCH] tools/perf: Fix the mask in regs_dump__printf

On Friday 17 June 2016 12:07 PM, Jiri Olsa wrote: > On Fri, Jun 17, 2016 at 10:52:38AM +0530, Madhavan Srinivasan wrote: >> When decoding the perf_regs mask in regs_dump__printf(), >> we loop through the mask using find_first_bit and find_next_bit functions. >> And

[PATCH] tools/perf: Fix the mask in regs_dump__printf

<kan.li...@intel.com> Cc: Wang Nan <wangn...@huawei.com> Cc: Michael Ellerman <m...@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- tools/perf/util/session.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tools/pe

[PATCH] tools/perf: Fix the mask in regs_dump__printf

er Shishkin Cc: Jiri Olsa Cc: Adrian Hunter Cc: Kan Liang Cc: Wang Nan Cc: Michael Ellerman Signed-off-by: Madhavan Srinivasan --- tools/perf/util/session.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c in

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Thursday 16 June 2016 02:41 AM, Yury Norov wrote: > On Wed, Jun 15, 2016 at 10:51:27PM +0300, Yury Norov wrote: >> Hi Madhavan, >> >> On Wed, Jun 15, 2016 at 05:12:53PM +0530, Madhavan Srinivasan wrote: >>> When decoding the perf_regs mask in regs_dump__printf()

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Thursday 16 June 2016 02:41 AM, Yury Norov wrote: > On Wed, Jun 15, 2016 at 10:51:27PM +0300, Yury Norov wrote: >> Hi Madhavan, >> >> On Wed, Jun 15, 2016 at 05:12:53PM +0530, Madhavan Srinivasan wrote: >>> When decoding the perf_regs mask in regs_dump__printf()

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Wednesday 15 June 2016 06:14 PM, George Spelvin wrote: > Madhavan Srinivasan wrote: >> +#if (__BYTE_ORDER == __BIG_ENDIAN) && (BITS_PER_LONG != 64) >> +tmp = addr[(((nbits - 1)/BITS_PER_LONG) -

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Wednesday 15 June 2016 06:14 PM, George Spelvin wrote: > Madhavan Srinivasan wrote: >> +#if (__BYTE_ORDER == __BIG_ENDIAN) && (BITS_PER_LONG != 64) >> +tmp = addr[(((nbits - 1)/BITS_PER_LONG) -

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Thursday 16 June 2016 01:21 AM, Yury Norov wrote: > Hi Madhavan, > > On Wed, Jun 15, 2016 at 05:12:53PM +0530, Madhavan Srinivasan wrote: >> When decoding the perf_regs mask in regs_dump__printf(), >> we loop through the mask using find_first_bit and find_next_bit f

Re: [PATCH] tools/perf: fix the word selected in find_*_bit

On Thursday 16 June 2016 01:21 AM, Yury Norov wrote: > Hi Madhavan, > > On Wed, Jun 15, 2016 at 05:12:53PM +0530, Madhavan Srinivasan wrote: >> When decoding the perf_regs mask in regs_dump__printf(), >> we loop through the mask using find_first_bit and find_next_bit f

[PATCH] tools/perf: fix the word selected in find_*_bit

s Villemoes <li...@rasmusvillemoes.dk> Cc: Wang Nan <wangn...@huawei.com> Cc: Yury Norov <yury.no...@gmail.com> Cc: Michael Ellerman <m...@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- tools/lib/find_bit.c | 17

[PATCH] tools/perf: fix the word selected in find_*_bit

de Melo Cc: Adrian Hunter Cc: Borislav Petkov Cc: David Ahern Cc: George Spelvin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Rasmus Villemoes Cc: Wang Nan Cc: Yury Norov Cc: Michael Ellerman Signed-off-by: Madhavan Srinivasan --- tools/lib/find_bit.c | 17 + 1 file changed,

Re: [PATCH v3 7/9] powerpc/powernv: Add platform support for stop instruction

On Monday 23 May 2016 08:48 PM, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per thread SPR named PSSCR is added

Re: [PATCH v3 7/9] powerpc/powernv: Add platform support for stop instruction

On Monday 23 May 2016 08:48 PM, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per thread SPR named PSSCR is added

Re: [RFC PATCH v2 1/3] arch/powerpc : Add detour buffer support for optprobes

On Thursday 19 May 2016 08:40 PM, Anju T wrote: > Detour buffer contains instructions to create an in memory pt_regs. > After the execution of prehandler a call is made for instruction emulation. > The NIP is decided after the probed instruction is executed. Hence a branch > instruction is

Re: [RFC PATCH v2 1/3] arch/powerpc : Add detour buffer support for optprobes

On Thursday 19 May 2016 08:40 PM, Anju T wrote: > Detour buffer contains instructions to create an in memory pt_regs. > After the execution of prehandler a call is made for instruction emulation. > The NIP is decided after the probed instruction is executed. Hence a branch > instruction is

[PATCH v2] powerpc/perf: Replace raw event hex values with #def

Minor cleanup patch to replace the raw event hex values in power8-pmu.c with #def. Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/perf/power8-events-list.h | 40 + arch/powerpc/perf/power8-pmu.c

[PATCH v2] powerpc/perf: Replace raw event hex values with #def

Minor cleanup patch to replace the raw event hex values in power8-pmu.c with #def. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/power8-events-list.h | 40 + arch/powerpc/perf/power8-pmu.c | 41 +- 2 files

Re: [PATCH]powerpc/perf: Replace raw event hex values with #def

On Thursday 21 April 2016 12:08 PM, Michael Ellerman wrote: > On Thu, 2016-04-21 at 09:30 +0530, Madhavan Srinivasan wrote: >> @@ -488,17 +489,17 @@ static int power8_compute_mmcr(u64 event[], int n_ev, >> >> /* Table of alternatives, sorted by column 0 */ >>

Re: [PATCH]powerpc/perf: Replace raw event hex values with #def

On Thursday 21 April 2016 12:08 PM, Michael Ellerman wrote: > On Thu, 2016-04-21 at 09:30 +0530, Madhavan Srinivasan wrote: >> @@ -488,17 +489,17 @@ static int power8_compute_mmcr(u64 event[], int n_ev, >> >> /* Table of alternatives, sorted by column 0 */ >>

[PATCH]powerpc/perf: Replace raw event hex values with #def

Minor cleanup patch to replace the raw event hex values in power8-pmu.c with #def. Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/perf/power8-events-list.h | 42 ++ arch/powerpc/perf/power8-pmu.c

[PATCH]powerpc/perf: Replace raw event hex values with #def

Minor cleanup patch to replace the raw event hex values in power8-pmu.c with #def. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/power8-events-list.h | 42 ++ arch/powerpc/perf/power8-pmu.c | 41 + 2 files

[PATCH v8 2/7] powerpc/powernv: Add OPAL support for Nest PMU

gt; Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- OPAL side patches are posted in the skiboot mailing. arch/powerpc/include

[PATCH v8 3/7] powerpc/powernv: autoload nest unit driver module

aul Mackerras <pau...@samba.org> Cc: Anton Blanchard <an...@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> -

[PATCH v8 2/7] powerpc/powernv: Add OPAL support for Nest PMU

Nest Counters can be configured via PORE Engine and OPAL provides an interface to start/stop it. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Daniel Axtens Cc: Stephane Eranian Cc: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan

[PATCH v8 3/7] powerpc/powernv: autoload nest unit driver module

Stephane Eranian Cc: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan --- arch/powerpc/platforms/powernv/Makefile| 2 +- arch/powerpc/platforms/powernv/opal-nest.c | 97 ++ arch/powerpc/platforms/powernv/opal.c | 12 3 files changed, 110 insert

[PATCH v8 5/7] powerpc/perf: Add event attribute and group to nest pmu

man.id.au> Cc: Benjamin Herrenschmidt <b...@kernel.crashing.org> Cc: Paul Mackerras <pau...@samba.org> Cc: Anton Blanchard <an...@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vne

[PATCH v8 5/7] powerpc/perf: Add event attribute and group to nest pmu

renschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Daniel Axtens Cc: Stephane Eranian Cc: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/Makefile | 2 +- arch/powerpc/perf/nest-pmu.c | 69 ++ ar

[PATCH v8 1/7] powerpc/powernv: Data structure and macros definition

..@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/include/asm/nest-pmu.h | 55 ++

[PATCH v8 0/7] powerpc/powernv: Nest Instrumentation support

n Blanchard <an...@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> Madhavan Srinivasan (7): powerpc/powernv: Data

[PATCH v8 1/7] powerpc/powernv: Data structure and macros definition

0644 index ..13c21817e3cc --- /dev/null +++ b/arch/powerpc/include/asm/nest-pmu.h @@ -0,0 +1,55 @@ +/* + * Nest Performance Monitor counter support. + * + * Copyright (C) 2016 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it

[PATCH v8 0/7] powerpc/powernv: Nest Instrumentation support

Sukadev Bhattiprolu, Preeti Murthy, Daniel Axtens, Suzuki Poulose and Michael Ellerman Kindly let me know you comments and feedback. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Daniel Axtens Cc: Stephane Eranian Cc: Sukadev Bhattiprolu Signed-off

[PATCH v8 4/7] powerpc/powernv: detect supported nest units and its events

shing.org> Cc: Paul Mackerras <pau...@samba.org> Cc: Anton Blanchard <an...@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@li

[PATCH v8 4/7] powerpc/powernv: detect supported nest units and its events

: Daniel Axtens Cc: Stephane Eranian Cc: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan --- arch/powerpc/platforms/powernv/opal-nest.c | 190 - 1 file changed, 189 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/powernv/opal-nest.c b/arch

[PATCH v8 6/7] powerpc/perf: generic nest pmu event functions

c: Anton Blanchard <an...@samba.org> Cc: Daniel Axtens <d...@axtens.net> Cc: Stephane Eranian <eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/perf/nest-pmu.c | 11

[PATCH v8 7/7] powerpc/perf: nest pmu cpumask and cpu hotplug support

t;eran...@google.com> Cc: Sukadev Bhattiprolu <suka...@linux.vnet.ibm.com> Cc: Preeti U Murthy <preet...@andrew.cmu.edu> Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/perf/nest-pmu.c | 171 +++ 1 file chan

[PATCH v8 6/7] powerpc/perf: generic nest pmu event functions

Bhattiprolu Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.c | 114 +++ 1 file changed, 114 insertions(+) diff --git a/arch/powerpc/perf/nest-pmu.c b/arch/powerpc/perf/nest-pmu.c index b9b44147c9b8..772e4d2d7a04 100644 --- a/arch/powerpc/perf/nest

[PATCH v8 7/7] powerpc/perf: nest pmu cpumask and cpu hotplug support

is designated as new cpu to read counters. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Daniel Axtens Cc: Stephane Eranian Cc: Sukadev Bhattiprolu Cc: Preeti U Murthy Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.c | 171

Re: [PATCH 2/2] powerpc/perf/hv-24x7: Display change in counter values

On Saturday 30 January 2016 08:37 AM, Sukadev Bhattiprolu wrote: > From a1aa992fb25fb8e98a5c5724376ae8cc91463de3 Mon Sep 17 00:00:00 2001 > From: Sukadev Bhattiprolu > Date: Mon, 25 Jan 2016 23:05:36 -0500 > Subject: [PATCH 2/2] powerpc/perf/hv-24x7: Display change in counter values > > For

Re: [PATCH 2/2] powerpc/perf/hv-24x7: Display change in counter values

On Saturday 30 January 2016 08:37 AM, Sukadev Bhattiprolu wrote: > From a1aa992fb25fb8e98a5c5724376ae8cc91463de3 Mon Sep 17 00:00:00 2001 > From: Sukadev Bhattiprolu > Date: Mon, 25 Jan 2016 23:05:36 -0500 > Subject: [PATCH 2/2] powerpc/perf/hv-24x7: Display change

[PATCH] powerpc/perf: Remove PPMU_HAS_SSLOT flag for Power8

the same from Power8 flags. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/power8-pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c index 7d5e295255b7..9958ba8bf0d2 100644 --- a/arch/powerpc/perf

[PATCH] powerpc/perf: Remove PPMU_HAS_SSLOT flag for Power8

the same from Power8 flags. Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> --- arch/powerpc/perf/power8-pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c index 7d5e295255b7..9958ba8bf0d2

Re: [PATCH V10 2/4] perf/powerpc: add support for sampling intr machine state

On Wednesday 20 January 2016 04:10 PM, Michael Ellerman wrote: > On Mon, 2016-01-11 at 15:58 +0530, Anju T wrote: >> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig >> index 9a7057e..c4ce60d 100644 >> --- a/arch/powerpc/Kconfig >> +++ b/arch/powerpc/Kconfig >> @@ -119,6 +119,7 @@ config

Re: [PATCH V10 2/4] perf/powerpc: add support for sampling intr machine state

On Wednesday 20 January 2016 04:10 PM, Michael Ellerman wrote: > On Mon, 2016-01-11 at 15:58 +0530, Anju T wrote: >> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig >> index 9a7057e..c4ce60d 100644 >> --- a/arch/powerpc/Kconfig >> +++ b/arch/powerpc/Kconfig >> @@ -119,6 +119,7 @@ config

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 03:55 PM, Peter Zijlstra wrote: > On Fri, Nov 06, 2015 at 09:04:00PM +1100, Michael Ellerman wrote: >> It's a perrenial request from our hardware PMU folks to be able to see the >> raw >> values of the PMU registers. >> >> I think partly it's so that they can verify

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 03:34 PM, Michael Ellerman wrote: > On Fri, 2015-11-06 at 10:24 +0100, Peter Zijlstra wrote: >> On Fri, Nov 06, 2015 at 12:57:17PM +0530, Madhavan Srinivasan wrote: >>> On Thursday 05 November 2015 06:37 PM, Peter Zijlstra wrote: >>>> On T

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 03:34 PM, Michael Ellerman wrote: > On Fri, 2015-11-06 at 10:24 +0100, Peter Zijlstra wrote: >> On Fri, Nov 06, 2015 at 12:57:17PM +0530, Madhavan Srinivasan wrote: >>> On Thursday 05 November 2015 06:37 PM, Peter Zijlstra wrote: >>>> On T

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 03:55 PM, Peter Zijlstra wrote: > On Fri, Nov 06, 2015 at 09:04:00PM +1100, Michael Ellerman wrote: >> It's a perrenial request from our hardware PMU folks to be able to see the >> raw >> values of the PMU registers. >> >> I think partly it's so that they can verify

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 08:28 AM, Sukadev Bhattiprolu wrote: > Peter Zijlstra [pet...@infradead.org] wrote: > | On Thu, Nov 05, 2015 at 02:16:15AM +0530, Madhavan Srinivasan wrote: > | > Second patch updates struct arch_misc_reg for arch/powerpc with pmu > registers > | &

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Thursday 05 November 2015 08:12 PM, Stephane Eranian wrote: > Hi, > > On Wed, Nov 4, 2015 at 9:46 PM, Madhavan Srinivasan > wrote: >> This patchset extend the perf sample regs infrastructure >> to include architecture specific regs. Current perf_sample_regs_intr &

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Thursday 05 November 2015 06:37 PM, Peter Zijlstra wrote: > On Thu, Nov 05, 2015 at 02:16:15AM +0530, Madhavan Srinivasan wrote: >> Second patch updates struct arch_misc_reg for arch/powerpc with pmu registers >> and adds offsetof macro for the same. It extends perf_reg_value(

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Thursday 05 November 2015 08:12 PM, Stephane Eranian wrote: > Hi, > > On Wed, Nov 4, 2015 at 9:46 PM, Madhavan Srinivasan > <ma...@linux.vnet.ibm.com> wrote: >> This patchset extend the perf sample regs infrastructure >> to include architecture specific regs.

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Thursday 05 November 2015 06:37 PM, Peter Zijlstra wrote: > On Thu, Nov 05, 2015 at 02:16:15AM +0530, Madhavan Srinivasan wrote: >> Second patch updates struct arch_misc_reg for arch/powerpc with pmu registers >> and adds offsetof macro for the same. It extends perf_reg_value(

Re: [RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

On Friday 06 November 2015 08:28 AM, Sukadev Bhattiprolu wrote: > Peter Zijlstra [pet...@infradead.org] wrote: > | On Thu, Nov 05, 2015 at 02:16:15AM +0530, Madhavan Srinivasan wrote: > | > Second patch updates struct arch_misc_reg for arch/powerpc with pmu > registers > | &

[RFC PATCH 1/3] perf/core: extend perf_regs to include arch specific regs

As a foundation patch, new structure called arch_misc_regs added to perf_regs. And perf_reg_value() is modified to expect perf_regs instead of pt_regs. This way, perf_reg_value() can decide on the struct to pick based on the register idx. Signed-off-by: Madhavan Srinivasan Cc: Thomas Gleixner

[RFC PATCH 3/3]perf/powerpc: Functions to update arch_misc_regs

-by: Madhavan Srinivasan Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Peter Zijlstra Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Stephane Eranian Cc: Benjamin Herrenschmidt Cc: Michael Ellerman Cc: Sukadev Bhattiprolu --- Would really appreciate comments and feedback for the patch arch/powerpc/perf

[RFC PATCH 2/3]perf/powerpc: update macros and add regs to arch_misc_reg struct

Patch updates the arch_misc_regs struct (arch/powerpc/ptrace.h) with arch/powerpc specific regs (PMU regs). Updates asm/perf_regs.h and perf_regs.c with corresponding macros to export the arch_misc_reg values. Signed-off-by: Madhavan Srinivasan Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Peter

[RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

-...@lists.ozlabs.org to enable PERF_SAMPLE_REGS_INTR support in arch/powerpc. https://patchwork.ozlabs.org/patch/539242/ https://patchwork.ozlabs.org/patch/539243/ https://patchwork.ozlabs.org/patch/539244/ Would appreciate comments and feedback. Signed-off-by: Madhavan Srinivasan Cc: Thomas Gleixner Cc

[RFC PATCH 0/3]perf/core: extend perf_reg and perf_sample_regs_intr

-...@lists.ozlabs.org to enable PERF_SAMPLE_REGS_INTR support in arch/powerpc. https://patchwork.ozlabs.org/patch/539242/ https://patchwork.ozlabs.org/patch/539243/ https://patchwork.ozlabs.org/patch/539244/ Would appreciate comments and feedback. Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com&

[RFC PATCH 2/3]perf/powerpc: update macros and add regs to arch_misc_reg struct

Patch updates the arch_misc_regs struct (arch/powerpc/ptrace.h) with arch/powerpc specific regs (PMU regs). Updates asm/perf_regs.h and perf_regs.c with corresponding macros to export the arch_misc_reg values. Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> Cc: Thomas Gleix

[RFC PATCH 3/3]perf/powerpc: Functions to update arch_misc_regs

-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com> Cc: Thomas Gleixner <t...@linutronix.de> Cc: Ingo Molnar <mi...@kernel.org> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Arnaldo Carvalho de Melo <a...@kernel.org> Cc: Jiri Olsa <jo...@kernel.org> Cc: Stephane Eran

[RFC PATCH 1/3] perf/core: extend perf_regs to include arch specific regs

As a foundation patch, new structure called arch_misc_regs added to perf_regs. And perf_reg_value() is modified to expect perf_regs instead of pt_regs. This way, perf_reg_value() can decide on the struct to pick based on the register idx. Signed-off-by: Madhavan Srinivasan <

Re: [PATCH V3 2/3] perf/powerpc :add support for sampling intr machine state

On Tuesday 03 November 2015 02:46 PM, Michael Ellerman wrote: > On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote: > >> The perf infrastructure uses a bit mask to find out >> valid registers to display. Define a register mask >> for supported registers defined in asm/perf_regs.h. >> The bit

Re: [PATCH V3 2/3] perf/powerpc :add support for sampling intr machine state

On Tuesday 03 November 2015 02:46 PM, Michael Ellerman wrote: > On Tue, 2015-11-03 at 11:40 +0530, Anju T wrote: > >> The perf infrastructure uses a bit mask to find out >> valid registers to display. Define a register mask >> for supported registers defined in asm/perf_regs.h. >> The bit

Re: [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state

On Monday 26 October 2015 06:14 PM, Anju T wrote: > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with perf record command. > To display the

Re: [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state

On Monday 26 October 2015 06:14 PM, Anju T wrote: > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with perf record command. > To display the

Re: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power

On Monday 26 October 2015 06:14 PM, Anju T wrote: > The enum definition assigns an 'id' to each register in "struct pt_regs" > of arch/powerpc.The order of these values in the enum definition are > based on the corresponding macros in > arch/powerpc/include/uapi/asm/ptrace.h . > >

Re: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power

On Monday 26 October 2015 06:14 PM, Anju T wrote: > The enum definition assigns an 'id' to each register in "struct pt_regs" > of arch/powerpc.The order of these values in the enum definition are > based on the corresponding macros in > arch/powerpc/include/uapi/asm/ptrace.h . > >

Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state

On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju > > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with perf record command. >

Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power

On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju > > The enum definition assigns an 'id' to each register in power. I guess it should be "each register in "struct pt_regs" of arch/powerpc > The order of these values in the enum definition are based on > the corresponding macros

Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power

On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju > > The enum definition assigns an 'id' to each register in power. I guess it should be "each register in "struct pt_regs" of arch/powerpc > The order of these values in the enum definition are based on >

Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state

On Monday 19 October 2015 05:48 PM, Anju T wrote: > From: Anju > > The registers to sample are passed through the sample_regs_intr bitmask. > The name and bit position for each register is defined in asm/perf_regs.h. > This feature can be enabled by using -I option with

Re: powerpc: Add an inline function to update HID0

On Tuesday 04 August 2015 03:38 PM, Michael Ellerman wrote: > On Tue, 2015-04-08 at 08:30:58 UTC, "Gautham R. Shenoy" wrote: >> Section 3.7 of Version 1.2 of the Power8 Processor User's Manual >> prescribes that updates to HID0 be preceded by a SYNC instruction and >> followed by an ISYNC

Re: powerpc: Add an inline function to update HID0

On Tuesday 04 August 2015 03:38 PM, Michael Ellerman wrote: On Tue, 2015-04-08 at 08:30:58 UTC, Gautham R. Shenoy wrote: Section 3.7 of Version 1.2 of the Power8 Processor User's Manual prescribes that updates to HID0 be preceded by a SYNC instruction and followed by an ISYNC instruction

[PATCH v7 4/7] powerpc/powernv: detect supported nest pmus and its events

: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.c | 137 +++ 1 file changed, 137 insertions(+) diff --git a/arch/powerpc/perf/nest-pmu.c b/arch/powerpc/perf

[PATCH v7 2/7] powerpc/powernv: Add OPAL support for Nest PMU

Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/opal-api.h| 3 ++- arch/powerpc/include/asm/opal.h| 1 + arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + 3 files changed, 4 insertions(+), 1 deletion

[PATCH v7 6/7] powerpc/powernv: generic nest pmu event functions

Add set of generic nest pmu related event functions to be used by each nest pmu. Add code to register nest pmus. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan

[PATCH v7 0/7] powerpc/powernv: Nest Instrumentation support

erras Cc: Anton Blanchard Cc: Daniel Axtens Cc: Stephane Eranian Reviewed-by: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan Madhavan Srinivasan (7): powerpc/powernv: Data structure and macros definition powerpc/powernv: Add OPAL support for Nest PMU powerpc/powernv: Nest PMU de

[PATCH v7 5/7] powerpc/powernv: add event attribute and group to nest pmu

Add code to create event/format attributes and attribute groups for each nest pmu. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc

[PATCH v7 3/7] powerpc/powernv: Nest PMU detection and device tree parser

events. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/Makefile | 2 +- arch/powerpc/perf/nest-pmu.c | 72 +++

[PATCH v7 1/7] powerpc/powernv: Data structure and macros definition

aff2de3350 --- /dev/null +++ b/arch/powerpc/perf/nest-pmu.h @@ -0,0 +1,54 @@ +/* + * Nest Performance Monitor counter support for POWER8 processors. + * + * Copyright (C) 2015 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under

[PATCH v7 7/7] powerpc/powernv: nest pmu cpumask and cpu hotplug support

is designated as new cpu to read counters. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Daniel Axtens Cc: Stephane Eranian Cc: Preeti U Murthy Cc: Ingo Molnar Cc: Peter Zijlstra Signed-off-by: Madhavan Srinivasan --- arch

[PATCH v7 4/7] powerpc/powernv: detect supported nest pmus and its events

...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: Anton Blanchard an...@samba.org Cc: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc/perf/nest

[PATCH v7 2/7] powerpc/powernv: Add OPAL support for Nest PMU

Ellerman m...@ellerman.id.au Cc: Paul Mackerras pau...@samba.org Cc: Anton Blanchard an...@samba.org Cc: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc

[PATCH v7 6/7] powerpc/powernv: generic nest pmu event functions

Bhattiprolu suka...@linux.vnet.ibm.com Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc/perf/nest-pmu.c | 101 +++ 1 file changed, 101 insertions(+) diff --git

[PATCH v7 0/7] powerpc/powernv: Nest Instrumentation support

Mackerras pau...@samba.org Cc: Anton Blanchard an...@samba.org Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Reviewed-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com Madhavan Srinivasan (7): powerpc/powernv

[PATCH v7 5/7] powerpc/powernv: add event attribute and group to nest pmu

...@linux.vnet.ibm.com Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc/perf/nest-pmu.c | 61 1 file changed, 61 insertions(+) diff --git a/arch/powerpc/perf/nest-pmu.c b

[PATCH v7 3/7] powerpc/powernv: Nest PMU detection and device tree parser

Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include nest-pmu.h + +static struct perchip_nest_info

[PATCH v7 1/7] powerpc/powernv: Data structure and macros definition

suka...@linux.vnet.ibm.com Cc: Daniel Axtens d...@axtens.net Cc: Stephane Eranian eran...@google.com Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc/perf/nest-pmu.h | 54 1 file changed, 54 insertions(+) create mode 100644 arch

[PATCH v7 7/7] powerpc/powernv: nest pmu cpumask and cpu hotplug support

Eranian eran...@google.com Cc: Preeti U Murthy preet...@andrew.cmu.edu Cc: Ingo Molnar mi...@kernel.org Cc: Peter Zijlstra pet...@infradead.org Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com --- arch/powerpc/perf/nest-pmu.c | 173 +++ 1 file

[PATCH v6 6/7]powerpc/powernv: generic nest pmu event functions

Add set of generic nest pmu related event functions to be used by each nest pmu. Add code to register nest pmus. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Anshuman Khandual Cc: Stephane Eranian Signed-off-by: Madhavan

[PATCH v6 1/7]powerpc/powernv: Data structure and macros definition

00..73aff2de3350 --- /dev/null +++ b/arch/powerpc/perf/nest-pmu.h @@ -0,0 +1,54 @@ +/* + * Nest Performance Monitor counter support for POWER8 processors. + * + * Copyright (C) 2015 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it

[PATCH v6 0/7]powerpc/powernv: Nest Instrumentation support

, Preeti Murthy, Daniel Axtens, Suzuki Poulose and Michael Ellerman Kindly let me know you comments and feedback. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Anshuman Khandual Cc: Stephane Eranian Signed-off-by:

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