[PATCH v2] ARM: dts: sun8i: v3s: SRAM_C real mapping

2020-12-03 Thread Martin Cerveny
...) and it is not influenced by "real" SRAM mapping or size so it is working even without this patch. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.

[PATCH] ARM: dts: sun8i: v3s: SRAM_C real mapping

2020-12-03 Thread Martin Cerveny
...) and it is not influenced by "real" SRAM mapping or size so it is working even without this patch. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8

Re: [PATCH v3 3/6] ARM: dts: sun8i: v3s: Add node for system control

2020-12-03 Thread Martin Cerveny
Hello. On Thu, 3 Dec 2020, Chen-Yu Tsai wrote: Hi, On Mon, Nov 16, 2020 at 8:57 PM Martin Cerveny wrote: Allwinner V3s has system control and SRAM C1 region similar to H3. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++ 1 file changed, 14

[PATCH v3 5/6] dt-bindings: media: cedrus: Add V3s compatible

2020-11-16 Thread Martin Cerveny
Allwinner V3s SoC contains video engine. Add compatible for it. Signed-off-by: Martin Cerveny --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml

[PATCH v3 4/6] media: cedrus: Add support for V3s

2020-11-16 Thread Martin Cerveny
V3s video engine runs at lower speed and support video decoder for H.264 and JPEG/MJPEG only. Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers

[PATCH v3 6/6] ARM: dts: sun8i: v3s: Add video engine node

2020-11-16 Thread Martin Cerveny
Allwinner V3S SoC has a video engine. Add a node for it. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 70193512c222..e8f304125e2d 100644

[PATCH v3 1/6] media: cedrus: Register all codecs as capability

2020-11-16 Thread Martin Cerveny
All codecs should have capabilities. For example "Allwinner V3s" does not support "MPEG2". Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c | 22 +-- drivers/staging/media/sunxi/cedrus/cedrus.h | 2 ++ .../stagin

[PATCH v3 3/6] ARM: dts: sun8i: v3s: Add node for system control

2020-11-16 Thread Martin Cerveny
Allwinner V3s has system control and SRAM C1 region similar to H3. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 0c7341676921

[PATCH v3 2/6] dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles

2020-11-16 Thread Martin Cerveny
Allwinner V3s has system control similar to that in H3. Add compatibles for system control with SRAM C1 region. Signed-off-by: Martin Cerveny --- .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree

[PATCH v3 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-11-16 Thread Martin Cerveny
ed testing description Martin Cerveny (6): media: cedrus: Register all codecs as capability dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles ARM: dts: sun8i: v3s: Add node for system control media: cedrus: Add support for V3s dt-bindings: media: cedrus: Add V3s compat

Re: [PATCH v2 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-11-16 Thread Martin Cerveny
Hello. On Mon, 16 Nov 2020, Martin Cerveny wrote: On Mon, 16 Nov 2020, Hans Verkuil wrote: On 15/11/2020 19:59, Martin Cerveny wrote: On Thu, 5 Nov 2020, Hans Verkuil wrote: On 12/09/2020 16:30, Martin Cerveny wrote: First patch extends cedrus capability to all decoders because V3s missing

Re: [PATCH v2 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-11-16 Thread Martin Cerveny
On Mon, 16 Nov 2020, Hans Verkuil wrote: On 15/11/2020 19:59, Martin Cerveny wrote: Hello. On Thu, 5 Nov 2020, Hans Verkuil wrote: Hi Martin, On 12/09/2020 16:30, Martin Cerveny wrote: First patch extends cedrus capability to all decoders because V3s missing MPEG2 decoder. Next two

Re: [PATCH v2 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-11-15 Thread Martin Cerveny
Hello. On Thu, 5 Nov 2020, Hans Verkuil wrote: Hi Martin, On 12/09/2020 16:30, Martin Cerveny wrote: First patch extends cedrus capability to all decoders because V3s missing MPEG2 decoder. Next two patches add system control node (SRAM C1) and next three patches add support for Cedrus VPU

[PATCH] ARM: dts: sun8i: v3s: Add simple-framebuffer

2020-09-16 Thread Martin Cerveny
Add support for "allwinner,simple-framebuffer" with "mixer0-lcd0" pipeline from boot loader (u-boot). It depends on boot loader implementation of DE2/TCON0 setup with LCD. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 16 1 file ch

[PATCH v2 4/6] media: cedrus: Add support for V3s

2020-09-12 Thread Martin Cerveny
V3s video engine runs at lower speed and support video decoder for H.264 and JPEG/MJPEG only. Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers

[PATCH v2 2/6] dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles

2020-09-12 Thread Martin Cerveny
Allwinner V3s has system control similar to that in H3. Add compatibles for system control with SRAM C1 region. Signed-off-by: Martin Cerveny --- .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree

[PATCH v2 5/6] dt-bindings: media: cedrus: Add V3s compatible

2020-09-12 Thread Martin Cerveny
Allwinner V3s SoC contains video engine. Add compatible for it. Signed-off-by: Martin Cerveny --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml

[PATCH v2 6/6] ARM: dts: sun8i: v3s: Add video engine node

2020-09-12 Thread Martin Cerveny
Allwinner V3S SoC has a video engine. Add a node for it. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 3f18866fb37b..3fb01dc1a9ba 100644

[PATCH v2 3/6] ARM: dts: sun8i: v3s: Add node for system control

2020-09-12 Thread Martin Cerveny
Allwinner V3s has system control and SRAM C1 region similar to H3. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index

[PATCH v2 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-09-12 Thread Martin Cerveny
escription Martin Cerveny (6): media: cedrus: Register all codecs as capability dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles ARM: dts: sun8i: v3s: Add node for system control media: cedrus: Add support for V3s dt-bindings: media: cedrus: Add V3s compatible

[PATCH v2 1/6] media: cedrus: Register all codecs as capability

2020-09-12 Thread Martin Cerveny
All codecs should have capabilities. For example "Allwinner V3s" does not support "MPEG2". Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c| 18 +- drivers/staging/media/sunxi/cedrus/cedrus.h| 2 ++ .../stagin

Re: [PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-09-08 Thread Martin Cerveny
Hello. On Tue, 8 Sep 2020, Maxime Ripard wrote: On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote: First patch extends cedrus capability to all decoders because V3s missing MPEG2 decoder. Next two patches add system control node (SRAM C1) and next three patches add support

[PATCH v3 2/2] ARM: dts: sun8i: v3s: Enable crypto engine

2020-09-07 Thread Martin Cerveny
V3s contains crypto engine that is compatible with A33. Add device tree node. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index

[PATCH v3 1/2] dt-bindings: crypto: Add compatible for V3s

2020-09-07 Thread Martin Cerveny
Allwinner V3s has crypto engine similar to that in A33. So add compatible. Signed-off-by: Martin Cerveny --- .../devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10

[PATCH v3 0/2] ARM: dts: sun8i: v3s: Enable crypto engine

2020-09-07 Thread Martin Cerveny
Add support for crypto engine (sun4i-ss) for Allwinner V3s. Functionality like A33 so add only compatible and enable in device tree. Regards. Changes since v2: - reduced to device tree only with A33 compatibility Changes since v1: - splitting to patch series martin Cerveny (2): dt-bindings

[PATCH 1/2] drm/sun4i: sun8i-csc: Secondary CSC register correction

2020-09-06 Thread Martin Cerveny
"Allwinner V3s" has secondary video layer (VI). Decoded video is displayed in wrong colors until secondary CSC registers are programmed correctly. Signed-off-by: Martin Cerveny --- drivers/gpu/drm/sun4i/sun8i_csc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/d

[PATCH 2/2] drm/sun4i: mixer: Extend regmap max_register

2020-09-06 Thread Martin Cerveny
Better guess. Secondary CSC registers are from 0xF. Signed-off-by: Martin Cerveny --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cc4fb916318f

[PATCH 0/2] drm/sun4i: sun8i-csc: Secondary CSC register correction

2020-09-06 Thread Martin Cerveny
The secondary video layer (VI) on "Allwinner V3s" displays decoded video (YUV) in wrong colors. The secondary CSC should be programmed. Let's correct CSC register offset and extend regmap size. Regards. Martin Cerveny (2): drm/sun4i: sun8i-csc: Secondary CSC register correction

Re: [PATCH v2 1/3] dt-bindings: crypto: add new compatible for V3s

2020-09-05 Thread Martin Cerveny
On Wed, 2 Sep 2020, Corentin Labbe wrote: On Tue, Sep 01, 2020 at 01:40:15PM +0200, Maxime Ripard wrote: On Tue, Sep 01, 2020 at 12:57:19PM +0200, Corentin Labbe wrote: On Tue, Sep 01, 2020 at 11:32:49AM +0200, Maxime Ripard wrote: On Mon, Aug 31, 2020 at 09:30:59AM +0200, Martin Cerveny

[PATCH 1/6] media: cedrus: Register all codecs as capability

2020-09-04 Thread Martin Cerveny
All codecs should have capabilities. For example "Allwinner V3s" does not support "MPEG2". Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c| 18 +- drivers/staging/media/sunxi/cedrus/cedrus.h| 2 ++ .../stagin

[PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

2020-09-04 Thread Martin Cerveny
First patch extends cedrus capability to all decoders because V3s missing MPEG2 decoder. Next two patches add system control node (SRAM C1) and next three patches add support for Cedrus VPU. Best regards, Martin Martin Cerveny (6): media: cedrus: Register all codecs as capability dt

[PATCH 3/6] ARM: dts: sun8i: v3s: Add node for system control

2020-09-04 Thread Martin Cerveny
Allwinner V3s has system control and SRAM C1 region similar to H3. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index e5312869c

[PATCH 4/6] media: cedrus: Add support for V3s

2020-09-04 Thread Martin Cerveny
V3s video engine runs at lower speed and support video decoder for H.264 and JPEG/MJPEG only. Signed-off-by: Martin Cerveny --- drivers/staging/media/sunxi/cedrus/cedrus.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers

[PATCH 5/6] media: allwinner,sun4i-a10-video-engine: Add V3s compatible

2020-09-04 Thread Martin Cerveny
Allwinner V3s SoC contains video engine. Add compatible for it. Signed-off-by: Martin Cerveny --- .../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml

[PATCH 6/6] ARM: dts: sun8i: v3s: Add video engine node

2020-09-04 Thread Martin Cerveny
Allwinner V3S SoC has a video engine. Add a node for it. Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 3f18866fb..3fb01dc1a 100644

[PATCH 2/6] dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles

2020-09-04 Thread Martin Cerveny
Allwinner V3s has system control similar to that in H3. Add compatibles for system control with SRAM C1 region. Signed-off-by: Martin Cerveny --- .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree

[PATCH v2 3/3] crypto: sun4i-ss - add the V3s variant of SS

2020-08-31 Thread Martin Cerveny
Like A33 "sun4i-ss" has a difference, it give SHA1 digest directly in BE. So add new compatible. Tested-by: Martin Cerveny Signed-off-by: Martin Cerveny --- drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/crypto

[PATCH v2 1/3] dt-bindings: crypto: add new compatible for V3s

2020-08-31 Thread Martin Cerveny
Like A33 "sun4i-ss" has a difference, it give SHA1 digest directly in BE. So add new compatible. Tested-by: Martin Cerveny Signed-off-by: Martin Cerveny --- .../bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 5 - 1 file changed, 4 insertions(+), 1 deletion(-)

[PATCH v2 2/3] ARM: dts: sun8i: v3s: Enable crypto engine

2020-08-31 Thread Martin Cerveny
V3s contains crypto engine that is compatible with "sun4i-ss". Tested-by: Martin Cerveny Signed-off-by: Martin Cerveny --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.

[PATCH v2 0/3] crypto: sun4i-ss: add support for V3s

2020-08-31 Thread Martin Cerveny
Add support for "sun4i-ss" (crypto engine) for Allwinner V3s. Simmilar problem like A33. Changes since v1: - splited to patch series Martin Cerveny (3): dt-bindings: crypto: add new compatible for V3s ARM: dts: sun8i: v3s: Enable crypto engine crypto: sun4i-ss - add the V3s var

[PATCH] ARM: dts: sun8i: v3s: Enable crypto engine

2020-08-27 Thread Martin Cerveny
V3S contains crypto engine that is compatible with "sun4i-ss". Tested-by: Martin Cerveny Signed-off-by: Martin Cerveny --- .../bindings/crypto/allwinner,sun4i-a10-crypto.yaml| 5 - arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++ drivers/crypto/allwi