Signed-off-by: Marty E. Plummer
---
drivers/gpu/drm/rockchip/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 0ccc76217ee4..7d1ccc9efc76 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b
Signed-off-by: Marty E. Plummer
---
drivers/gpu/drm/rockchip/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 0ccc76217ee4..7d1ccc9efc76 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b
Greetings,
Having a slight issue with getting reboot to work on the board I'm tinkering
with; according to the documentation writing any value to 0x12050004 should
reset the system, as such I have the following snippet in my dts to make it
work:
sysctrl: system-controller@1205 {
Greetings,
Having a slight issue with getting reboot to work on the board I'm tinkering
with; according to the documentation writing any value to 0x12050004 should
reset the system, as such I have the following snippet in my dts to make it
work:
sysctrl: system-controller@1205 {
On Tue, Oct 24, 2017 at 01:42:50PM -0500, Rob Herring wrote:
> On Tue, Oct 17, 2017 at 05:38:52PM -0500, Marty E. Plummer wrote:
> > Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
> > generates clock and reset signals used by other module blocks on SoC.
>
On Tue, Oct 24, 2017 at 01:42:50PM -0500, Rob Herring wrote:
> On Tue, Oct 17, 2017 at 05:38:52PM -0500, Marty E. Plummer wrote:
> > Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
> > generates clock and reset signals used by other module blocks on SoC.
>
Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes
hardware mutlimedia codec cores, commonly used in consumer cctv/dvr
security systems and ipcameras. The arm core is a Cortex A7.
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
arch/arm/mach-hisi/Kconf
Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes
hardware mutlimedia codec cores, commonly used in consumer cctv/dvr
security systems and ipcameras. The arm core is a Cortex A7.
Signed-off-by: Marty E. Plummer
---
arch/arm/mach-hisi/Kconfig | 6 ++
1 file changed, 6
Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
marketed under the name Samsung SDR-B74301N
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
Chages in v2:
- Use SPDX tag and GPL-2.0+
- Add memory addresses to some nodes
- Add arm arch timer
- Ad
Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
marketed under the name Samsung SDR-B74301N
Signed-off-by: Marty E. Plummer
---
Chages in v2:
- Use SPDX tag and GPL-2.0+
- Add memory addresses to some nodes
- Add arm arch timer
- Add more specific compatible strings
Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
generates clock and reset signals used by other module blocks on SoC.
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
Changes in v2:
- Switched to SPDX tags and GPL-2.0+
drivers/clk/hisilicon/K
Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
generates clock and reset signals used by other module blocks on SoC.
Signed-off-by: Marty E. Plummer
---
Changes in v2:
- Switched to SPDX tags and GPL-2.0+
drivers/clk/hisilicon/Kconfig | 7 ++
drivers/clk
Patched up with suggestions from Rob Herring, resend.
Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 41
arch/arm
Patched up with suggestions from Rob Herring, resend.
Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 41
arch/arm
On Thu, Sep 21, 2017 at 01:08:39AM +, Rob Herring wrote:
> On Wed, Sep 20, 2017 at 6:04 PM, Marty E. Plummer
> <hanet...@startmail.com> wrote:
> > On Wed, Sep 20, 2017 at 08:53:03PM +, Rob Herring wrote:
> >> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E
On Thu, Sep 21, 2017 at 01:08:39AM +, Rob Herring wrote:
> On Wed, Sep 20, 2017 at 6:04 PM, Marty E. Plummer
> wrote:
> > On Wed, Sep 20, 2017 at 08:53:03PM +, Rob Herring wrote:
> >> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:
> >> >
On Wed, Sep 20, 2017 at 08:53:03PM +, Rob Herring wrote:
> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:
> > Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
> > marketed under the name Samsung SDR-B74301N
> >
> > Signed-off-
On Wed, Sep 20, 2017 at 08:53:03PM +, Rob Herring wrote:
> On Sun, Sep 17, 2017 at 03:23:27AM -0500, Marty E. Plummer wrote:
> > Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
> > marketed under the name Samsung SDR-B74301N
> >
> > Sign
Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
generates clock and reset signals used by other module blocks on SoC.
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Ma
Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
generates clock and reset signals used by other module blocks on SoC.
Signed-off-by: Marty E. Plummer
---
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile| 1 +
drivers/clk
Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes
hardware mutlimedia codec cores, commonly used in consumer cctv/dvr
security systems and ipcameras. The arm core is a Cortex A7.
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
arch/arm/mach-hisi/Kconf
Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes
hardware mutlimedia codec cores, commonly used in consumer cctv/dvr
security systems and ipcameras. The arm core is a Cortex A7.
Signed-off-by: Marty E. Plummer
---
arch/arm/mach-hisi/Kconfig | 6 ++
1 file changed, 6
.
Resending due to a typo, s/primcell/primecell/
Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 +
arch/arm/boot
.
Resending due to a typo, s/primcell/primecell/
Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 +
arch/arm/boot
Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
marketed under the name Samsung SDR-B74301N
Signed-off-by: Marty E. Plummer <hanet...@startmail.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++
arch/arm/bo
Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems,
marketed under the name Samsung SDR-B74301N
Signed-off-by: Marty E. Plummer
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/hi3521a-rs-dm290e.dts | 52 ++
arch/arm/boot/dts/hi3521a.dtsi
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