Re: [RFC resend 1/4] dt-bindings: display: mediatek: add drm binding

On 10/19/2017 03:06 PM, Philipp Zabel wrote: > On Thu, 2017-10-19 at 15:53 +0300, Laurent Pinchart wrote: >> Hi Matthias, >> >> Thank you for the patch. >> >> On Thursday, 19 October 2017 14:26:07 EEST Matthias Brugger wrote: >>> DRM subysystem and clo

Re: [RFC resend 1/4] dt-bindings: display: mediatek: add drm binding

look into this > Thanks. > > On Thu, 2017-10-19 at 13:26 +0200, Matthias Brugger wrote: >> DRM subysystem and clock driver shared the same compatible mmsys. >> This stopped does not work, as only the first driver for a compatible >> gets probed. We cha

Re: [RFC resend 1/4] dt-bindings: display: mediatek: add drm binding

look into this > Thanks. > > On Thu, 2017-10-19 at 13:26 +0200, Matthias Brugger wrote: >> DRM subysystem and clock driver shared the same compatible mmsys. >> This stopped does not work, as only the first driver for a compatible >> gets probed. We cha

[RFC resend 1/4] dt-bindings: display: mediatek: add drm binding

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger <mbrug...@suse.com> --- .../devicetree/bi

[RFC resend 3/4] arm64: dts: mt8173: Fix drm subsystem

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger <mbrug...@suse.com> --- arch/arm64/bo

[RFC resend 4/4] arm: dts: mt2701: Fix drm subsystem

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger <mbrug...@suse.com> --- arch/arm/boot/dts/

[RFC resend 1/4] dt-bindings: display: mediatek: add drm binding

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger --- .../devicetree/bindings/display/mediatek

[RFC resend 3/4] arm64: dts: mt8173: Fix drm subsystem

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 5

[RFC resend 4/4] arm: dts: mt2701: Fix drm subsystem

DRM subysystem and clock driver shared the same compatible mmsys. This stopped does not work, as only the first driver for a compatible gets probed. We change the comaptible to the new DRM identifier to fix this. Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt2701.dtsi | 5 + 1

[RFC resend 2/4] drm/mediatek: Add new compatible to probe multimedia subsystem.

-by: Matthias Brugger <mbrug...@suse.com> --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++-- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 30 +- drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 4 ++-- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 ++--- drivers/g

[RFC resend 2/4] drm/mediatek: Add new compatible to probe multimedia subsystem.

-by: Matthias Brugger --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++-- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 30 +- drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 4 ++-- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 ++--- drivers/gpu/drm/mediatek

[RFC resend] arm64: mt8173: Fix Acer Chromebooks mmsys probe problem

In theory the MMSYS device tree identifier is matches twice, by the clk driver and the DRM subsystem. But the kernel only matches the first driver for a device (clk) and discards the second one. This breaks graphics on mt8173 and most probably on mt2701 as well. MMSYS in Mediatek SoCs has some

[RFC resend] arm64: mt8173: Fix Acer Chromebooks mmsys probe problem

In theory the MMSYS device tree identifier is matches twice, by the clk driver and the DRM subsystem. But the kernel only matches the first driver for a device (clk) and discards the second one. This breaks graphics on mt8173 and most probably on mt2701 as well. MMSYS in Mediatek SoCs has some

Re: [PATCH v5 02/12] mmc: mediatek: add support of mt2701/mt2712

On 10/18/2017 03:46 AM, CK Hu wrote: Hi, Matthias: On Mon, 2017-10-16 at 09:49 +0200, Matthias Brugger wrote: On 10/15/2017 10:26 AM, CK Hu wrote: Hi, Chaotian: On Wed, 2017-10-11 at 10:41 +0800, Chaotian Jing wrote: mt2701/mt2712 has 12bit clock div, which is not compatible with mt8135

Re: [PATCH v5 02/12] mmc: mediatek: add support of mt2701/mt2712

On 10/18/2017 03:46 AM, CK Hu wrote: Hi, Matthias: On Mon, 2017-10-16 at 09:49 +0200, Matthias Brugger wrote: On 10/15/2017 10:26 AM, CK Hu wrote: Hi, Chaotian: On Wed, 2017-10-11 at 10:41 +0800, Chaotian Jing wrote: mt2701/mt2712 has 12bit clock div, which is not compatible with mt8135

Re: [PATCH v5 6/7] soc: mediatek: pwrap: add support for MT7622 SoC

On 10/17/2017 11:49 AM, Sean Wang wrote: On Mon, 2017-10-16 at 17:00 +0200, Matthias Brugger wrote: On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu <chenglin...@mediatek.com> Add the registers, callbacks and data structures required to make the PMIC wrappe

Re: [PATCH v5 6/7] soc: mediatek: pwrap: add support for MT7622 SoC

On 10/17/2017 11:49 AM, Sean Wang wrote: On Mon, 2017-10-16 at 17:00 +0200, Matthias Brugger wrote: On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off

Re: [PATCH 3/3] arm64: dts: mt2712: Add auxadc device node.

On 10/13/2017 05:11 PM, Matthias Brugger wrote: On 09/24/2017 05:47 PM, Jonathan Cameron wrote: On Thu, 21 Sep 2017 09:26:52 +0800 Zhiyong Tao <zhiyong@mediatek.com> wrote: Add auxadc device node for MT2712. Signed-off-by: Zhiyong Tao <zhiyong@mediatek.com> I've app

Re: [PATCH 3/3] arm64: dts: mt2712: Add auxadc device node.

On 10/13/2017 05:11 PM, Matthias Brugger wrote: On 09/24/2017 05:47 PM, Jonathan Cameron wrote: On Thu, 21 Sep 2017 09:26:52 +0800 Zhiyong Tao wrote: Add auxadc device node for MT2712. Signed-off-by: Zhiyong Tao I've applied the IIO patches to make this work, so assume this will get

Re: [PATCH 6/9] soc: mediatek: extend bus protection API

On 10/16/2017 08:38 AM, Weiyi Lu wrote: On Tue, 2017-10-10 at 17:45 +0200, Matthias Brugger wrote: On 08/22/2017 12:28 PM, Weiyi Lu wrote: MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control regi

Re: [PATCH 6/9] soc: mediatek: extend bus protection API

On 10/16/2017 08:38 AM, Weiyi Lu wrote: On Tue, 2017-10-10 at 17:45 +0200, Matthias Brugger wrote: On 08/22/2017 12:28 PM, Weiyi Lu wrote: MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control regi

Re: [PATCH v5 7/7] soc: mediatek: pwrap: fixup warnings from coding style

On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Sean Wang fixup those warnings such as lines over 80 words and parenthesis alignment which would be complained by checkpatch.pl. Signed-off-by: Sean Wang --- I already took this

Re: [PATCH v5 7/7] soc: mediatek: pwrap: fixup warnings from coding style

On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Sean Wang fixup those warnings such as lines over 80 words and parenthesis alignment which would be complained by checkpatch.pl. Signed-off-by: Sean Wang --- I already took this patch, please drop from series. Thanks

Re: [PATCH v5 6/7] soc: mediatek: pwrap: add support for MT7622 SoC

On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off-by: Chenglin Xu Signed-off-by: Chen Zhong

Re: [PATCH v5 6/7] soc: mediatek: pwrap: add support for MT7622 SoC

On 10/16/2017 09:07 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off-by: Chenglin Xu Signed-off-by: Chen Zhong Signed-off-by: Sean Wang ---

Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support

On 10/16/2017 08:42 AM, Weiyi Lu wrote: On Fri, 2017-10-13 at 16:50 +0200, Matthias Brugger wrote: On 10/13/2017 12:45 AM, Stephen Boyd wrote: On 09/19, Weiyi Lu wrote: This series is based on v4.14-rc1 and composed of clock control (PATCH 1-4) and scpsys control (PATCH 5-9) What's

Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support

On 10/16/2017 08:42 AM, Weiyi Lu wrote: On Fri, 2017-10-13 at 16:50 +0200, Matthias Brugger wrote: On 10/13/2017 12:45 AM, Stephen Boyd wrote: On 09/19, Weiyi Lu wrote: This series is based on v4.14-rc1 and composed of clock control (PATCH 1-4) and scpsys control (PATCH 5-9) What's

Re: [PATCH v5 02/12] mmc: mediatek: add support of mt2701/mt2712

On 10/15/2017 10:26 AM, CK Hu wrote: Hi, Chaotian: On Wed, 2017-10-11 at 10:41 +0800, Chaotian Jing wrote: mt2701/mt2712 has 12bit clock div, which is not compatible with mt8135/mt8173. and, some additional features will be added in mt2701/mt2712, so that need distinguish it by comatibale

Re: [PATCH v5 02/12] mmc: mediatek: add support of mt2701/mt2712

On 10/15/2017 10:26 AM, CK Hu wrote: Hi, Chaotian: On Wed, 2017-10-11 at 10:41 +0800, Chaotian Jing wrote: mt2701/mt2712 has 12bit clock div, which is not compatible with mt8135/mt8173. and, some additional features will be added in mt2701/mt2712, so that need distinguish it by comatibale

Re: [PATCH 3/3] arm64: dts: mt2712: Add auxadc device node.

On 09/24/2017 05:47 PM, Jonathan Cameron wrote: On Thu, 21 Sep 2017 09:26:52 +0800 Zhiyong Tao wrote: Add auxadc device node for MT2712. Signed-off-by: Zhiyong Tao I've applied the IIO patches to make this work, so assume this will get

Re: [PATCH 3/3] arm64: dts: mt2712: Add auxadc device node.

On 09/24/2017 05:47 PM, Jonathan Cameron wrote: On Thu, 21 Sep 2017 09:26:52 +0800 Zhiyong Tao wrote: Add auxadc device node for MT2712. Signed-off-by: Zhiyong Tao I've applied the IIO patches to make this work, so assume this will get picked up in due course. pushed now to

Re: [PATCH 1/3] ARM: mediatek: Cocci spatch "of_table"

On 09/21/2017 08:24 AM, Thomas Meyer wrote: Make sure (of/i2c/platform)_device_id tables are NULL terminated. Found by coccinelle spatch "misc/of_table.cocci" Signed-off-by: Thomas Meyer --- Applied to v4.14-next/soc Thanks! diff -u -p

Re: [PATCH 1/3] ARM: mediatek: Cocci spatch "of_table"

On 09/21/2017 08:24 AM, Thomas Meyer wrote: Make sure (of/i2c/platform)_device_id tables are NULL terminated. Found by coccinelle spatch "misc/of_table.cocci" Signed-off-by: Thomas Meyer --- Applied to v4.14-next/soc Thanks! diff -u -p a/arch/arm/mach-mediatek/platsmp.c

Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support

On 10/13/2017 12:45 AM, Stephen Boyd wrote: On 09/19, Weiyi Lu wrote: This series is based on v4.14-rc1 and composed of clock control (PATCH 1-4) and scpsys control (PATCH 5-9) What's the merge plan? Can I apply the clk ones to clk tree and ignore the rest? Yes, please do so. I'll take

Re: [PATCH v4 0/9] Mediatek MT2712 clock and scpsys support

On 10/13/2017 12:45 AM, Stephen Boyd wrote: On 09/19, Weiyi Lu wrote: This series is based on v4.14-rc1 and composed of clock control (PATCH 1-4) and scpsys control (PATCH 5-9) What's the merge plan? Can I apply the clk ones to clk tree and ignore the rest? Yes, please do so. I'll take

Re: [PATCH v4 4/7] soc: mediatek: pwrap: update pwrap_init without slave programming

On 10/13/2017 11:41 AM, Sean Wang wrote: On Tue, 2017-10-10 at 20:00 +0200, Matthias Brugger wrote: On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote: From: Sean Wang <sean.w...@mediatek.com> pwrap initialization is highly associated with the base SoC, so update here for al

Re: [PATCH v4 4/7] soc: mediatek: pwrap: update pwrap_init without slave programming

On 10/13/2017 11:41 AM, Sean Wang wrote: On Tue, 2017-10-10 at 20:00 +0200, Matthias Brugger wrote: On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote: From: Sean Wang pwrap initialization is highly associated with the base SoC, so update here for allowing pwrap_init without slave

Re: [PATCH v2 9/9] dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional ones

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: Remove dummy clocks for usb wakeup and add optional ones for MCU_BUS_CK and DMA_BUS_CK. Signed-off-by: Chunfeng Yun Acked-by: Rob Herring --- Reviewed-by:

Re: [PATCH v2 9/9] dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional ones

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: Remove dummy clocks for usb wakeup and add optional ones for MCU_BUS_CK and DMA_BUS_CK. Signed-off-by: Chunfeng Yun Acked-by: Rob Herring --- Reviewed-by: .../devicetree/bindings/usb/mediatek,mtk-xhci.txt | 18 -- 1 file

Re: [PATCH v2 6/9] usb: xhci-mtk: add optional mcu and dma bus clocks

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: There are mcu_bus and dma_bus clocks needed to be controlled by driver on some SoCs, so add them as optional ones Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com> --- Reviewed-by: Matthias Brugger <matthias@gmail.com>

Re: [PATCH v2 6/9] usb: xhci-mtk: add optional mcu and dma bus clocks

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: There are mcu_bus and dma_bus clocks needed to be controlled by driver on some SoCs, so add them as optional ones Signed-off-by: Chunfeng Yun --- Reviewed-by: Matthias Brugger drivers/usb/host/xhci-mtk.c | 79

Re: [PATCH v2 5/9] usb: xhci-mtk: remove dummy wakeup debounce clocks

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: The wakeup debounce clocks for each ports in fact are not needed, so remove them. Signed-off-by: Chunfeng Yun <chunfeng@mediatek.com> --- Reviewed-by: Matthias Brugger <matthias@gmail.com> drivers/usb/host/xhci-

Re: [PATCH v2 5/9] usb: xhci-mtk: remove dummy wakeup debounce clocks

On 10/13/2017 10:26 AM, Chunfeng Yun wrote: The wakeup debounce clocks for each ports in fact are not needed, so remove them. Signed-off-by: Chunfeng Yun --- Reviewed-by: Matthias Brugger drivers/usb/host/xhci-mtk.c | 33 - drivers/usb/host/xhci

Re: [PATCH v4 4/7] soc: mediatek: pwrap: update pwrap_init without slave programming

On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote: From: Sean Wang pwrap initialization is highly associated with the base SoC, so update here for allowing pwrap_init without slave program which would be used to those PMICs without extra encryption on bus such as

Re: [PATCH v4 4/7] soc: mediatek: pwrap: update pwrap_init without slave programming

On 09/21/2017 10:26 AM, sean.w...@mediatek.com wrote: From: Sean Wang pwrap initialization is highly associated with the base SoC, so update here for allowing pwrap_init without slave program which would be used to those PMICs without extra encryption on bus such as MT6380. Signed-off-by:

Re: [PATCH] arm64: dts: mediatek: Add cpuidle support for MT2712

On 08/31/2017 07:44 AM, James Liao wrote: Add CPU idle state nodes to enable C1/C2 idle states. Signed-off-by: James Liao --- pushed to v4.14-next/dts64 Thanks. This patch bases on latest Matthias v4.13-next/dts64 branch [1], add CPU idle states for MT2712.

Re: [PATCH] arm64: dts: mediatek: Add cpuidle support for MT2712

On 08/31/2017 07:44 AM, James Liao wrote: Add CPU idle state nodes to enable C1/C2 idle states. Signed-off-by: James Liao --- pushed to v4.14-next/dts64 Thanks. This patch bases on latest Matthias v4.13-next/dts64 branch [1], add CPU idle states for MT2712. [1]

Re: [PATCH 6/9] soc: mediatek: extend bus protection API

On 08/22/2017 12:28 PM, Weiyi Lu wrote: MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by using extend API with such new design. By improving the mtk-infracfg bus

Re: [PATCH 6/9] soc: mediatek: extend bus protection API

On 08/22/2017 12:28 PM, Weiyi Lu wrote: MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by using extend API with such new design. By improving the mtk-infracfg bus

Re: [PATCH v4 03/12] arm64: dts: mt8173: remove "mediatek,mt8135-mmc" from mmc nodes

On 10/10/2017 01:10 PM, Ulf Hansson wrote: On 10 October 2017 at 13:06, Matthias Brugger <matthias@gmail.com> wrote: On 10/10/2017 12:49 PM, Ulf Hansson wrote: On 10 October 2017 at 11:30, Chaotian Jing <chaotian.j...@mediatek.com> wrote: devicetree bindings has

Re: [PATCH v4 03/12] arm64: dts: mt8173: remove "mediatek,mt8135-mmc" from mmc nodes

On 10/10/2017 01:10 PM, Ulf Hansson wrote: On 10 October 2017 at 13:06, Matthias Brugger wrote: On 10/10/2017 12:49 PM, Ulf Hansson wrote: On 10 October 2017 at 11:30, Chaotian Jing wrote: devicetree bindings has been updated to support multi-platforms, so that each platform has its

Re: [PATCH v4 03/12] arm64: dts: mt8173: remove "mediatek,mt8135-mmc" from mmc nodes

On 10/10/2017 12:49 PM, Ulf Hansson wrote: On 10 October 2017 at 11:30, Chaotian Jing wrote: devicetree bindings has been updated to support multi-platforms, so that each platform has its owns compatible name. And, this compatible name may used in driver to

Re: [PATCH v4 03/12] arm64: dts: mt8173: remove "mediatek,mt8135-mmc" from mmc nodes

On 10/10/2017 12:49 PM, Ulf Hansson wrote: On 10 October 2017 at 11:30, Chaotian Jing wrote: devicetree bindings has been updated to support multi-platforms, so that each platform has its owns compatible name. And, this compatible name may used in driver to distinguish with other platform.

Re: [PATCH v3 9/9] soc: mediatek: pwrap: fixup warnings from coding style

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang fixup those warnings such as lines over 80 words and parenthesis alignment which would be complained by checkpatch.pl. Signed-off-by: Sean Wang ---

Re: [PATCH v3 9/9] soc: mediatek: pwrap: fixup warnings from coding style

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang fixup those warnings such as lines over 80 words and parenthesis alignment which would be complained by checkpatch.pl. Signed-off-by: Sean Wang --- drivers/soc/mediatek/mtk-pmic-wrap.c | 20 +--- 1

Re: [PATCH v3 7/9] soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave and also add extra new regmap_config of 32-bit mode for MT6380 since old regmap_config of 16-bit mode can't be fit into the need.

Re: [PATCH v3 7/9] soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave and also add extra new regmap_config of 32-bit mode for MT6380 since old regmap_config of 16-bit mode can't be fit into the need. Signed-off-by: Chenglin Xu

Re: [PATCH v3 8/9] soc: mediatek: pwrap: add support for MT7622 SoC

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off-by: Chenglin Xu Signed-off-by: Chen Zhong

Re: [PATCH v3 8/9] soc: mediatek: pwrap: add support for MT7622 SoC

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Chenglin Xu Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off-by: Chenglin Xu Signed-off-by: Chen Zhong Signed-off-by: Sean Wang ---

Re: [PATCH v3 6/9] soc: mediatek: pwrap: update pwrap_init without slave programming

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang pwrap initialization is highly associated with the base SoC, so update here for allowing pwrap_init without slave program which would be used to those PMICs without extra encryption on bus such as

Re: [PATCH v3 6/9] soc: mediatek: pwrap: update pwrap_init without slave programming

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang pwrap initialization is highly associated with the base SoC, so update here for allowing pwrap_init without slave program which would be used to those PMICs without extra encryption on bus such as MT6380. Signed-off-by:

Re: [PATCH v3 5/9] soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang Some regulators such as MediaTek MT6380 also has to be written in 32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write into pwrap_write16 and one additional function pointer is

Re: [PATCH v3 5/9] soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode

On 08/15/2017 11:09 AM, sean.w...@mediatek.com wrote: From: Sean Wang Some regulators such as MediaTek MT6380 also has to be written in 32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write into pwrap_write16 and one additional function pointer is introduced for increasing

Re: [PATCH v2 03/13] mmc: dt-bindings: make compatible explicit

On 10/10/2017 09:19 AM, Ulf Hansson wrote: On 10 October 2017 at 03:37, Chaotian Jing <chaotian.j...@mediatek.com> wrote: On Mon, 2017-10-09 at 16:54 +0200, Matthias Brugger wrote: On 10/09/2017 01:35 PM, Chaotian Jing wrote: the driver has updated to have an explicit compatible, so

Re: [PATCH v2 03/13] mmc: dt-bindings: make compatible explicit

On 10/10/2017 09:19 AM, Ulf Hansson wrote: On 10 October 2017 at 03:37, Chaotian Jing wrote: On Mon, 2017-10-09 at 16:54 +0200, Matthias Brugger wrote: On 10/09/2017 01:35 PM, Chaotian Jing wrote: the driver has updated to have an explicit compatible, so update binding file according

Re: [PATCH v3 04/12] mmc: mediatek: make hs400_tune_response only for mt8173

--- Looks good now: Reviewed-by: Matthias Brugger <matthias@gmail.com> drivers/mmc/host/mtk-sd.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 643c795..ab2fbbb 100644 --- a/drivers/m

Re: [PATCH v3 04/12] mmc: mediatek: make hs400_tune_response only for mt8173

On 10/10/2017 05:01 AM, Chaotian Jing wrote: the origin design of hs400_tune_response is for mt8173 because of mt8173 has a special design. for doing that, we add a new member "compatible", by now it's only for mt8173. Signed-off-by: Chaotian Jing --- Looks good now: Reviewed-by

Re: [PATCH v3 01/12] mmc: mediatek: add support of mt2701/mt2712

On 10/10/2017 10:22 AM, Chaotian Jing wrote: On Tue, 2017-10-10 at 10:09 +0200, Ulf Hansson wrote: On 10 October 2017 at 09:35, Chaotian Jing wrote: On Tue, 2017-10-10 at 09:26 +0200, Ulf Hansson wrote: [...] + +static const struct of_device_id msdc_of_ids[] =

Re: [PATCH v3 01/12] mmc: mediatek: add support of mt2701/mt2712

On 10/10/2017 10:22 AM, Chaotian Jing wrote: On Tue, 2017-10-10 at 10:09 +0200, Ulf Hansson wrote: On 10 October 2017 at 09:35, Chaotian Jing wrote: On Tue, 2017-10-10 at 09:26 +0200, Ulf Hansson wrote: [...] + +static const struct of_device_id msdc_of_ids[] = { + { .compatible =

Re: [PATCH v2 09/13] mmc: mediatek: add stop_clk fix and enhance_rx support

On 10/09/2017 01:35 PM, Chaotian Jing wrote: mt2712 supports stop_clk fix and enhance_rx, which can improve host stability. Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 47 +++ 1 file changed, 43

Re: [PATCH v2 09/13] mmc: mediatek: add stop_clk fix and enhance_rx support

On 10/09/2017 01:35 PM, Chaotian Jing wrote: mt2712 supports stop_clk fix and enhance_rx, which can improve host stability. Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 47 +++ 1 file changed, 43 insertions(+), 4 deletions(-)

Re: [PATCH v2 05/13] mmc: mediatek: make hs400_tune_response only for mt8173

On 10/09/2017 01:35 PM, Chaotian Jing wrote: the origin design of hs400_tune_response is for mt8173 because of mt8173 has a special design. for doing that, we add a new member "compatible", by now it's only for mt8173. Signed-off-by: Chaotian Jing ---

Re: [PATCH v2 05/13] mmc: mediatek: make hs400_tune_response only for mt8173

On 10/09/2017 01:35 PM, Chaotian Jing wrote: the origin design of hs400_tune_response is for mt8173 because of mt8173 has a special design. for doing that, we add a new member "compatible", by now it's only for mt8173. Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 8 ++--

Re: [PATCH v2 03/13] mmc: dt-bindings: make compatible explicit

On 10/09/2017 01:35 PM, Chaotian Jing wrote: the driver has updated to have an explicit compatible, so update binding file according to the driver change. Signed-off-by: Chaotian Jing --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 4 ++-- 1 file

Re: [PATCH v2 03/13] mmc: dt-bindings: make compatible explicit

On 10/09/2017 01:35 PM, Chaotian Jing wrote: the driver has updated to have an explicit compatible, so update binding file according to the driver change. Signed-off-by: Chaotian Jing --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 4 ++-- 1 file changed, 2 insertions(+), 2

Re: [PATCH v2 01/13] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 10/09/2017 01:35 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch-ck Note that source_cg and mediatek,latch-ck are optional for some projects, eg, MT2701 do not have

Re: [PATCH v2 01/13] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 10/09/2017 01:35 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch-ck Note that source_cg and mediatek,latch-ck are optional for some projects, eg, MT2701 do not have

Re: [PATCH v3] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 09/29/2017 01:50 PM, Chaotian Jing wrote: On Fri, 2017-09-29 at 13:11 +0200, Matthias Brugger wrote: On 09/22/2017 02:03 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch

Re: [PATCH v3] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 09/29/2017 01:50 PM, Chaotian Jing wrote: On Fri, 2017-09-29 at 13:11 +0200, Matthias Brugger wrote: On 09/22/2017 02:03 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch

Re: [PATCH v3] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 09/22/2017 02:03 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch-ck Note that source_cg and mediatek,latch-ck are optional for some projects, eg, MT2701 do not have

Re: [PATCH v3] mmc: dt-bindings: Add reg/source_cg/latch-ck for Mediatek MMC bindings

On 09/22/2017 02:03 PM, Chaotian Jing wrote: Change the comptiable for support of multi-platform Add description for reg Add description for source_cg Add description for mediatek,latch-ck Note that source_cg and mediatek,latch-ck are optional for some projects, eg, MT2701 do not have

Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

On 09/18/2017 01:20 AM, Levin, Alexander (Sasha Levin) wrote: On Fri, Sep 15, 2017 at 01:15:43PM +0200, Matthias Brugger wrote: On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote: From: James Liao <jamesjj.l...@mediatek.com> [ Upstream

Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

On 09/18/2017 01:20 AM, Levin, Alexander (Sasha Levin) wrote: On Fri, Sep 15, 2017 at 01:15:43PM +0200, Matthias Brugger wrote: On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote: From: James Liao [ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ] Add MT2701 subsystem

Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

James Liao <jamesjj.l...@mediatek.com> Signed-off-by: Matthias Brugger <matthias@gmail.com> Signed-off-by: Sasha Levin <alexander.le...@verizon.com> --- arch/arm/boot/dts/mt2701.dtsi | 36 1 file changed, 36 insertions(+) It's not clear t

Re: [PATCH for 4.9 39/59] arm: dts: mt2701: Add subsystem clock controller device nodes

On 09/14/2017 05:51 PM, Levin, Alexander (Sasha Levin) wrote: From: James Liao [ Upstream commit f235c7e7a75325f28a33559a71f25a0eca6112db ] Add MT2701 subsystem clock controllers, inlcude mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. Signed-off-by: James Liao Signed-off-by: Matthias

Re: [PATCH v2 RESEND 1/2] dt-bindings: serial: 8250: Add MediaTek BTIF controller bindings

On 08/27/2017 10:39 PM, Sean Wang wrote: On Sun, 2017-08-27 at 22:00 +0300, Matthias Brugger wrote: On 08/19/2017 09:06 PM, sean.w...@mediatek.com wrote: From: Sean Wang <sean.w...@mediatek.com> Document the devicetree bindings in 8250.txt for MediaTek BTIF controller which could be

Re: [PATCH v2 RESEND 1/2] dt-bindings: serial: 8250: Add MediaTek BTIF controller bindings

On 08/27/2017 10:39 PM, Sean Wang wrote: On Sun, 2017-08-27 at 22:00 +0300, Matthias Brugger wrote: On 08/19/2017 09:06 PM, sean.w...@mediatek.com wrote: From: Sean Wang Document the devicetree bindings in 8250.txt for MediaTek BTIF controller which could be found on MT7622 and MT7623 SoC

Re: [PATCH v2 RESEND 1/2] dt-bindings: serial: 8250: Add MediaTek BTIF controller bindings

On 08/19/2017 09:06 PM, sean.w...@mediatek.com wrote: From: Sean Wang Document the devicetree bindings in 8250.txt for MediaTek BTIF controller which could be found on MT7622 and MT7623 SoC. Signed-off-by: Sean Wang ---

Re: [PATCH v2 RESEND 1/2] dt-bindings: serial: 8250: Add MediaTek BTIF controller bindings

On 08/19/2017 09:06 PM, sean.w...@mediatek.com wrote: From: Sean Wang Document the devicetree bindings in 8250.txt for MediaTek BTIF controller which could be found on MT7622 and MT7623 SoC. Signed-off-by: Sean Wang --- Documentation/devicetree/bindings/serial/8250.txt | 3 +++ 1 file

Re: [PATCH] tty: serial: 8250_mtk: Use PTR_ERR_OR_ZERO

t;bus_clk = devm_clk_get(>dev, "bus"); - if (IS_ERR(data->bus_clk)) - return PTR_ERR(data->bus_clk); - - return 0; + return PTR_ERR_OR_ZERO(data->bus_clk); } Reviewed-by: Matthias Brugger <matthias@gmail.com>

Re: [PATCH] tty: serial: 8250_mtk: Use PTR_ERR_OR_ZERO

, "bus"); - if (IS_ERR(data->bus_clk)) - return PTR_ERR(data->bus_clk); - - return 0; + return PTR_ERR_OR_ZERO(data->bus_clk); } Reviewed-by: Matthias Brugger

Re: [PATCH] iommu/mediatek: Fix a build fail of m4u_type

On 08/26/2017 09:33 PM, Matthias Brugger wrote: On 08/24/2017 08:24 AM, Yong Wu wrote: The commit ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") introduce the following build error: drivers/iommu/mtk_iommu.c: In function 'mtk_iommu_hw_init': drivers/iommu/m

Re: [PATCH] iommu/mediatek: Fix a build fail of m4u_type

On 08/26/2017 09:33 PM, Matthias Brugger wrote: On 08/24/2017 08:24 AM, Yong Wu wrote: The commit ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") introduce the following build error: drivers/iommu/mtk_iommu.c: In function 'mtk_iommu_hw_init': drivers/iommu/m

Re: [PATCH] iommu/mediatek: Fix a build fail of m4u_type

On 08/24/2017 08:24 AM, Yong Wu wrote: The commit ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") introduce the following build error: drivers/iommu/mtk_iommu.c: In function 'mtk_iommu_hw_init': drivers/iommu/mtk_iommu.c:536:30: error: 'const struct mtk_iommu_data' has

Re: [PATCH] iommu/mediatek: Fix a build fail of m4u_type

On 08/24/2017 08:24 AM, Yong Wu wrote: The commit ("iommu/mediatek: Enlarge the validate PA range for 4GB mode") introduce the following build error: drivers/iommu/mtk_iommu.c: In function 'mtk_iommu_hw_init': drivers/iommu/mtk_iommu.c:536:30: error: 'const struct mtk_iommu_data' has

Re: [PATCH v1 6/9] soc: mediatek: add bus protection extend API

On 08/15/2017 08:42 AM, weiyi...@mediatek.com wrote: From: Weiyi Lu MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by using extend API with

Re: [PATCH v1 6/9] soc: mediatek: add bus protection extend API

On 08/15/2017 08:42 AM, weiyi...@mediatek.com wrote: From: Weiyi Lu MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by using extend API with such new design. Also

Re: [PATCH 0/5] Add clk and scpsys support for MT6755

On 08/17/2017 04:47 AM, Yingjoe Chen wrote: On Wed, 2017-08-16 at 11:59 +0800, Mars Cheng wrote: Hi Rob, Stephen, Matthias gentle ping. Thanks. On Tue, 2017-08-08 at 16:13 +0800, Mars Cheng wrote: Mars Cheng (3): clk: mediatek: add mt6755 clock ID clk: mediatek: add clk support

Re: [PATCH 0/5] Add clk and scpsys support for MT6755

On 08/17/2017 04:47 AM, Yingjoe Chen wrote: On Wed, 2017-08-16 at 11:59 +0800, Mars Cheng wrote: Hi Rob, Stephen, Matthias gentle ping. Thanks. On Tue, 2017-08-08 at 16:13 +0800, Mars Cheng wrote: Mars Cheng (3): clk: mediatek: add mt6755 clock ID clk: mediatek: add clk support

Re: [PATCH v3 0/4] add support of SCPSYS power domain for MediaTek MT7622

On 08/08/2017 01:41 PM, Ulf Hansson wrote: On 7 August 2017 at 09:24, wrote: From: Sean Wang Changes since v2: - reduce code duplication of scpsys_probe across all SoCs Changes since v1: - rebase to Linux v4.13-rc1 There are four power

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