Hi Matthew,
On Mon, Nov 30, 2020 at 04:45:20PM -0800, matthew.gerl...@linux.intel.com wrote:
>
>
> On Sat, 28 Nov 2020, Wu, Hao wrote:
>
> > > Subject: [PATCH v3 2/2] fpga: dfl: look for vendor specific capability
> >
> > Maybe we can change the title a little bit, what about
> > fpga:
On Sat, Nov 28, 2020 at 04:00:33PM -0800, Sonal Santan wrote:
> From: Sonal Santan
>
> Describe Alveo XRT driver architecture and provide basic overview
> of Xilinx Alveo platform.
>
> Signed-off-by: Sonal Santan
> ---
> Documentation/fpga/index.rst | 1 +
> Documentation/fpga/xrt.rst |
Hi Richard,
On Mon, Nov 30, 2020 at 12:55:44PM -0600, Richard Gong wrote:
>
> Hi Moritz,
>
> Sorry for late reply, I was out last week.
No worries, usually I'm late with replies ;-)
>
> On 11/21/20 7:10 PM, Moritz Fischer wrote:
> > Richard,
> >
> > On W
Hi Sonal,
On Sat, Nov 28, 2020 at 04:00:34PM -0800, Sonal Santan wrote:
> From: Sonal Santan
>
> Add XRT UAPI header files which describe flash layout, XRT
> mailbox protocol, xclBin/axlf FPGA image container format and
> XRT management physical function driver ioctl interfaces.
>
>
Hi Matthew,
On Wed, Nov 18, 2020 at 11:01:51AM -0800, matthew.gerl...@linux.intel.com wrote:
> From: Matthew Gerlach
>
> A DFL may not begin at offset 0 of BAR 0. A PCIe vendor
> specific capability can be used to specify the start of a
> number of DFLs.
>
> Signed-off-by: Matthew Gerlach
>
Richard,
On Wed, Nov 18, 2020 at 12:16:09PM -0600, Richard Gong wrote:
> > > -#define COMMAND_RECONFIG_FLAG_PARTIAL1
> > > +#define COMMAND_RECONFIG_FLAG_PARTIAL0
> > > +#define COMMAND_AUTHENTICATE_BITSTREAM 1
> >
> > Can you explain how this commit by itself doesn't break things?
>
On Fri, Nov 20, 2020 at 03:46:48PM -0800, David Gow wrote:
> Because dfl.c uses the 'devm_ioremap', 'devm_iounmap',
> 'devm_ioremap_resource', and 'devm_platform_ioremap_resource'
> functions, it should depend on HAS_IOMEM.
>
> This fixes make allyesconfig under UML (ARCH=um), which doesn't
Hi David,
On Fri, Nov 20, 2020 at 03:40:13PM +0800, Xu Yilun wrote:
> On Fri, Nov 20, 2020 at 03:30:35PM +0800, David Gow wrote:
> > On Fri, Nov 20, 2020 at 2:27 PM Moritz Fischer wrote:
> > >
> > > Hi David,
> > >
> > > On Thu, Nov 19, 2020 at 12:22
Hi David,
On Thu, Nov 19, 2020 at 12:22:09AM -0800, David Gow wrote:
> Because dfl.c uses the 'devm_ioremap', 'devm_iounmap',
> 'devm_ioremap_resource', and 'devm_platform_ioremap_resource'
> functions, it should depend on HAS_IOMEM.
>
> This fixes make allyesconfig under UML (ARCH=um), which
Hi Russ,
On Thu, Nov 19, 2020 at 06:39:44PM -0800, Russ Weight wrote:
>
>
> On 11/15/20 3:03 PM, Moritz Fischer wrote:
> > Hi Russ,
> >
> > On Thu, Nov 05, 2020 at 05:08:59PM -0800, Russ Weight wrote:
> >> Create the FPGA Security Manager class driver
On Wed, Nov 18, 2020 at 08:29:09AM -0600, richard.g...@linux.intel.com wrote:
> From: Richard Gong
>
> Add COMMAND_AUTHENTICATE_BITSTREAM command flag for new added bitstream
> authentication feature. Authenticating a bistream is to make sure a signed
> bitstream has the valid signatures.
>
>
On Mon, Nov 16, 2020 at 09:52:40AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Commits
>
> aaf8fe39c952 ("Revert "fpga: dfl: fix the definitions of type & feature_id
> for dfl devices"")
> 9922e71f43ac ("Revert "fpga: dfl: move dfl_device_id to mod_devicetable.h"")
> 3ae706b58b0b
Hi Russ,
On Thu, Nov 05, 2020 at 05:08:59PM -0800, Russ Weight wrote:
> Create the FPGA Security Manager class driver. The security
> manager provides interfaces to manage secure updates for the
> FPGA and BMC images that are stored in FLASH. The driver can
> also be used to update root entry
On Fri, Nov 13, 2020 at 04:55:56PM -0800, Russ Weight wrote:
> Extend the MAX10 BMC Secure Update driver to provide a
> sysfs file to expose the flash update count for the FPGA
> user image.
>
> Signed-off-by: Russ Weight
> Reviewed-by: Tom Rix
> ---
> v5:
> - Renamed sysfs node
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/ts73xx-fpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/socfpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 4a8a2fcd4e6c
Simplify registration by using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/altera-ps-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/dfl-fme-mgr.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/ice40-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/ice40-spi.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/machxo2-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/altera-pr-ip-core-plat.c | 10 --
drivers/fpga/altera-pr-ip-core.c | 4 +---
2 files changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/zynqmp-fpga.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/xilinx-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index
This patchset introduces the devm_fpga_mgr_register API,
a devres managed version of fpga_mgr_register().
It reduces boilerplate being repeated literally in every
single driver by moving it to the fpga-mgr core.
Moritz Fischer (10):
fpga: fpga-mgr: Add devm_fpga_mgr_register() API
fpga: fpga
().
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/fpga-mgr.c | 81 +--
include/linux/fpga/fpga-mgr.h | 2 +
2 files changed, 71 insertions(+), 12 deletions(-)
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index f38bab01432e
Hi Richard,
On Thu, Nov 12, 2020 at 12:06:42PM -0600, richard.g...@linux.intel.com wrote:
> From: Richard Gong
>
> Add authenticate-fpga-config property for FPGA bitstream authentication.
>
> Signed-off-by: Richard Gong
> ---
> Documentation/devicetree/bindings/fpga/fpga-region.txt | 1 +
>
On Thu, Nov 12, 2020 at 12:06:43PM -0600, richard.g...@linux.intel.com wrote:
> From: Richard Gong
>
> Exten FPGA manager driver to support FPGA bitstream authentication on
Nit: Extend
> Intel SocFPGA platforms.
>
> Signed-off-by: Richard Gong
> ---
> drivers/fpga/stratix10-soc.c | 5 -
>
Hi Russ,
On Wed, Oct 28, 2020 at 11:37:46AM -0700, Russ Weight wrote:
>
>
> On 10/27/20 7:41 PM, Wu, Hao wrote:
> >> On 10/25/20 7:29 PM, Wu, Hao wrote:
> Subject: [PATCH v5 1/7] fpga: sec-mgr: intel fpga security manager class
> driver
>
> Create the FPGA Security Manager
Hi Russ,
On Mon, Oct 26, 2020 at 04:00:40PM -0700, Russ Weight wrote:
>
>
> On 10/25/20 12:12 PM, Moritz Fischer wrote:
> > Hi Russ,
> >
> > On Tue, Oct 20, 2020 at 05:31:12PM -0700, Russ Weight wrote:
> >> I see that I need to remove "intel" from
] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
Signed-off-by: Moritz Fischer
---
Changes from v3:
- Added
Hi Jakub,
On Tue, Oct 27, 2020 at 04:16:06PM -0700, Jakub Kicinski wrote:
> On Fri, 23 Oct 2020 13:28:34 -0700 Moritz Fischer wrote:
> > diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c
> > b/drivers/net/ethernet/dec/tulip/de2104x.c
> > index d9f6c19940ef
Hi Tom,
On Mon, Oct 26, 2020 at 07:23:37AM -0700, Tom Rix wrote:
>
> On 10/25/20 7:29 PM, Wu, Hao wrote:
> >> Subject: [PATCH v5 1/7] fpga: sec-mgr: intel fpga security manager class
> >> driver
> >>
> >> Create the FPGA Security Manager class driver. The security
> >> manager provides
Hi Russ,
On Tue, Oct 20, 2020 at 05:31:12PM -0700, Russ Weight wrote:
> I see that I need to remove "intel" from the subject line on this patch.
> I'll take care of that.
>
> I still have an outstanding question about treating a class-driver as a
> managed resource of the parent device. I'm
] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
Signed-off-by: Moritz Fischer
---
I'd consider it a bug-fix
] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
Signed-off-by: Moritz Fischer
---
Changes from v1:
- Replace
On Thu, Oct 22, 2020 at 04:04:16PM -0700, James Bottomley wrote:
> On Thu, 2020-10-22 at 15:06 -0700, Moritz Fischer wrote:
> > The driver does not implement a shutdown handler which leads to
> > issues
> > when using kexec in certain scenarios. The NIC keeps on fetching
>
] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
DMAR: DMAR:[DMA read] Request device [5e:00.0]fault addr f000
Signed-off-by: Moritz Fischer
---
Hi all,
I'm not sure
Hi Xu,
On Thu, Oct 15, 2020 at 03:16:27PM +0800, Xu Yilun wrote:
> Patch #1 is a fix of the fields in struct dfl_device & dfl_device_id.
>
> Patch #2, 3, 4 add dfl bus support to MODULE_DEVICE_TABLE(), they also
> move the necessary definitions in head file to public folders so that
> scatter
Hi Krzysztof,
On Mon, Oct 12, 2020 at 06:40:46PM +0200, Krzysztof Kozlowski wrote:
> On Sat, 10 Oct 2020 at 09:15, Xu Yilun wrote:
> >
> > This driver is for the EMIF private feature implemented under FPGA
> > Device Feature List (DFL) framework. It is used to expose memory
> > interface status
Hi Xu,
On Fri, Oct 09, 2020 at 03:34:24PM +0800, Xu Yilun wrote:
> On Fri, Oct 09, 2020 at 08:41:18AM +0200, Greg KH wrote:
> > On Fri, Oct 09, 2020 at 02:20:59PM +0800, Xu Yilun wrote:
> > > Hi Greg:
> > >
> > > On Mon, Sep 28, 2020 at 09:19:00PM -0700,
On Mon, Oct 05, 2020 at 10:37:26AM -0700, Moritz Fischer wrote:
> Add a devm_fpga_mgr_register() API that can be used to register a FPGA
> Manager that was created using devm_fpga_mgr_create().
>
> Introduce a struct fpga_mgr_devres that makes the devres
> allocation a little bi
On Wed, Oct 07, 2020 at 09:43:24AM -0700, Russ Weight wrote:
>
>
> On 10/7/20 7:44 AM, Moritz Fischer wrote:
> > Hi Russ,
> >
> > On Tue, Oct 06, 2020 at 05:09:58PM -0700, Russ Weight wrote:
> >> Create the Intel Security Manager class driver. The secur
Hi Russ,
On Tue, Oct 06, 2020 at 05:09:58PM -0700, Russ Weight wrote:
> Create the Intel Security Manager class driver. The security
> manager provides interfaces to manage secure updates for the
> FPGA and BMC images that are stored in FLASH. The driver can
> also be used to update root entry
yle
- use fpga_mgr_devres consistently
- Addressed Tom's feedback
- err -> ret
- removed removal of deprecated API
- added Reviewed-by: tags
Moritz Fischer (10):
fpga: fpga-mgr: Add devm_fpga_mgr_register() API
fpga: fpga-mgr: altera-ps-spi: Simplify registration
fpga: fpga-mgr: d
:
- Addressed Hao's feedback
- priv -> res
- comment style
- use fpga_mgr_devres consistently
- Addressed Tom's feedback
- err -> ret
- removed removal of deprecated API
- added Reviewed-by: tags
Moritz Fischer (10):
fpga: fpga-mgr: Add devm_fpga_mgr_register() API
fpga: fp
().
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/fpga-mgr.c | 81 +--
include/linux/fpga/fpga-mgr.h | 2 +
2 files changed, 71 insertions(+), 12 deletions(-)
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index f38bab01432e
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/ice40-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/ice40-spi.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/socfpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 4a8a2fcd4e6c
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/machxo2-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/ts73xx-fpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c
index
Simplify registration by using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/altera-ps-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/dfl-fme-mgr.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/xilinx-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
Changes from v1:
- Removed part that removes unused symbol
---
drivers/fpga/altera-pr-ip-core-plat.c | 10 --
drivers/fpga/altera-pr-ip-core.c | 4 +---
2 files changed, 1 insertion
Simplify registration using new devm_fpga_mgr_register() API.
Reviewed-by: Tom Rix
Signed-off-by: Moritz Fischer
---
drivers/fpga/zynqmp-fpga.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
ing devm_fpga_mgr_create().
> >
> > Introduce a struct fpga_mgr_devres that makes the devres
> > allocation a little bit more readable and gets reused for
> > devm_fpga_mgr_create() devm_fpga_mgr_register().
> >
> > Signed-off-by: Moritz Fischer
> > ---
> > drivers/fpg
On Sun, Oct 04, 2020 at 11:47:26AM -0700, Tom Rix wrote:
>
> On 10/3/20 10:14 PM, Moritz Fischer wrote:
> > Simplify registration using new devm_fpga_mgr_register() API.
> > Remove the now obsolete altera_pr_unregister() function.
> >
> > Signed-off-by: Moritz Fisc
On Sun, Oct 04, 2020 at 11:22:31AM -0700, Tom Rix wrote:
>
> On 10/3/20 10:14 PM, Moritz Fischer wrote:
> > Simplify registration using new devm_fpga_mgr_register() API.
> >
> > Signed-off-by: Moritz Fischer
> > ---
> > drivers/fpga/dfl-fme-mgr.c | 12
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/socfpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 4a8a2fcd4e6c..1f467173fc1f 100644
Simplify registration using new devm_fpga_mgr_register() API.
Remove the now obsolete altera_pr_unregister() function.
Signed-off-by: Moritz Fischer
---
We should take another look at this, IIRC correctly the point of
splitting this up into a separate driver was to make it useable
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/machxo2-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
index b316369156fe..114a64d2b7a4
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/xilinx-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index 824abbbd631e..27defa98092d
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/ts73xx-fpga.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c
index 2888ff000e4d..101f016c6ed8
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/zynqmp-fpga.c | 21 +
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
index 4a1139e05280
Simplify registration by using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/altera-ps-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c
index 0221dee8dd4c
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/dfl-fme-mgr.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c
index b3f7eee3c93f..3fc2be87d059
This patchset introduces the devm_fpga_mgr_register API,
a devres managed version of fpga_mgr_register().
It reduces boilerplate being repeated literally in every
single driver by moving it to the fpga-mgr core.
Moritz Fischer (10):
fpga: fpga-mgr: Add devm_fpga_mgr_register() API
fpga: fpga
-off-by: Moritz Fischer
---
drivers/fpga/fpga-mgr.c | 76 ++-
include/linux/fpga/fpga-mgr.h | 2 +
2 files changed, 68 insertions(+), 10 deletions(-)
diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
index f38bab01432e..774ac98fb69c 100644
Simplify registration using new devm_fpga_mgr_register() API.
Signed-off-by: Moritz Fischer
---
drivers/fpga/ice40-spi.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/ice40-spi.c
index 8d689fea0dab..69dec5af23c3 100644
Hi Russ,
On Fri, Oct 02, 2020 at 04:03:59PM -0700, Russ Weight wrote:
> Hi Moritz,
>
> This patch aligns with FPGA Manager implementation as you requested by
> splitting up the create() and register() functions and adding a devm_
> version of the create() function. I have a question (below)
On Thu, Oct 01, 2020 at 08:18:59AM +0300, Alexandru Ardelean wrote:
> On Wed, Sep 30, 2020 at 8:16 PM Moritz Fischer wrote:
> >
> > On Wed, Sep 30, 2020 at 08:22:23AM +0300, Alexandru Ardelean wrote:
> > > On Tue, Sep 29, 2020 at 6:30 PM Moritz Fischer wrote:
>
Hi Russ,
On Wed, Sep 30, 2020 at 06:07:00PM -0700, Russ Weight wrote:
>
> Hi Moritz,
>
> On 9/30/20 5:31 PM, Moritz Fischer wrote:
> > I think providing the devm_ managed APIs is nicer, and makes it easier
> > for the consumer of the API to do the right thing.
>
>
Hi Russ,
On Wed, Sep 30, 2020 at 01:54:50PM -0700, Russ Weight wrote:
>
>
> On 9/16/20 1:16 PM, Moritz Fischer wrote:
> > Hi Russ,
> >
> > On Fri, Sep 04, 2020 at 04:52:54PM -0700, Russ Weight wrote:
> >> Create the Intel Security Manager class driver
[error at 11]
> fpga_region->get_bridges
> ---^
>
> Replace them by :c:expr:, with does what's desired.
>
> Signed-off-by: Mauro Carvalho Chehab
Reviewed-by: Moritz Fischer
> ---
> Documentation/driver-api/fpga/fpga-mgr.rst | 2 +-
> D
On Wed, Sep 30, 2020 at 08:22:23AM +0300, Alexandru Ardelean wrote:
> On Tue, Sep 29, 2020 at 6:30 PM Moritz Fischer wrote:
> >
> > Hi Alexandru,
> >
> > On Tue, Sep 29, 2020 at 05:44:15PM +0300, Alexandru Ardelean wrote:
> > > From: Mathias Tausen
> >
Hi Alexandru,
On Tue, Sep 29, 2020 at 05:44:15PM +0300, Alexandru Ardelean wrote:
> From: Mathias Tausen
>
> Since axi-clkgen is now supported on ZYNQMP, make sure the max/min
> frequencies of the PFD and VCO are respected.
>
> Signed-off-by: Mathias Tausen
> Signed-off-by: Alexandru Ardelean
PM +0800, Xu Yilun wrote:
> > > > Hi Greg,
> > > >
> > > > On Sun, Sep 27, 2020 at 07:51:08AM +0200, Greg KH wrote:
> > > > > On Sat, Sep 26, 2020 at 12:22:19PM -0700, Moritz Fischer wrote:
> > > > > > Hi Greg,
> > > >
Hi Ernesto, Oleksandr,
On Mon, Apr 13, 2020 at 03:29:17PM -0700, Ernesto Corona wrote:
> Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller.
>
> Driver implements the following jtag ops:
> - freq_get;
> - freq_set;
> - status_get;
> - status_set
> - xfer;
> - mode_set;
> -
> On Thu, Sep 24, 2020 at 10:27:00AM -0700, Moritz Fischer wrote:
> > > Hi Xu,
> > >
> > > On Fri, Sep 25, 2020 at 12:59:57AM +0800, Xu Yilun wrote:
> > > > Now the DFL device drivers could be made as independent modules and put
> > > > in differen
On Thu, Sep 24, 2020 at 12:01:55PM -0700, Tom Rix wrote:
>
> On 9/24/20 9:59 AM, Xu Yilun wrote:
> > Now the DFL device drivers could be made as independent modules and put
> > in different subsystems according to their functionalities. So the name
> > should be descriptive and unique in the
Hi Xu,
On Fri, Sep 25, 2020 at 12:59:57AM +0800, Xu Yilun wrote:
> Now the DFL device drivers could be made as independent modules and put
> in different subsystems according to their functionalities. So the name
> should be descriptive and unique in the whole kernel.
>
> The patch changes the
On Thu, Sep 24, 2020 at 09:50:12AM +0300, Alexandru Ardelean wrote:
> From: Mircea Caprioru
>
> This patch adds support for vco maximum and minimum ranges in accordance
> with fpga speed grade, voltage, device package, technology and family. This
> new information is extracted from two new
Hi Stephen,
On Wed, Sep 23, 2020 at 04:58:33PM -0700, Stephen Boyd wrote:
> Quoting Alexandru Ardelean (2020-09-22 23:22:33)
> > On Tue, Sep 22, 2020 at 10:42 PM Stephen Boyd wrote:
> > >
> > > Quoting Moritz Fischer (2020-09-14 19:41:38)
> > > > O
Hi Krzysztof,
On Mon, Sep 21, 2020 at 10:46:45PM +0200, Krzysztof Kozlowski wrote:
> WhOn Mon, 21 Sep 2020 at 22:31, Moritz Fischer wrote:
> >
> > Hi Krzysztof,
> >
> > On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote:
> > > On Mon, Sep 21
Hi Krzysztof,
On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote:
> On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote:
> > This driver is for the EMIF private feature implemented under FPGA
> > Device Feature List (DFL) framework. It is used to expose memory
> > interface
On Thu, Sep 17, 2020 at 01:28:22PM -0700, Tom Rix wrote:
>
> On 9/17/20 11:32 AM, Russ Weight wrote:
> > Port enable is not complete until ACK = 0. Change
> > __afu_port_enable() to guarantee that the enable process
> > is complete by polling for ACK == 0.
> >
> > Signed-off-by: Russ Weight
On Thu, Sep 17, 2020 at 10:12:40AM +0800, YueHaibing wrote:
> Fix sparse warning:
>
> drivers/fpga/dfl-n3000-nios.c:392:23: warning:
> symbol 'm10_n3000_info' was not declared. Should it be static?
>
> Signed-off-by: YueHaibing
> ---
> drivers/fpga/dfl-n3000-nios.c | 2 +-
> 1 file changed, 1
Russ,
On Fri, Sep 04, 2020 at 04:52:55PM -0700, Russ Weight wrote:
> Create a platform driver that can be invoked as a sub
> driver for the Intel MAX10 BMC in order to support
> secure updates. This sub-driver will invoke an
> instance of the Intel FPGA Security Manager class driver
> in order to
Hi Yue,
On Wed, Sep 16, 2020 at 10:25:36PM +0800, YueHaibing wrote:
> Fix sparse warning:
>
> drivers/fpga/dfl-n3000-nios.c:392:23: warning:
> symbol 'm10_n3000_info' was not declared. Should it be static?
>
> Signed-off-by: YueHaibing
> ---
> drivers/fpga/dfl-n3000-nios.c | 2 +-
> 1 file
Hi Russ,
On Fri, Sep 04, 2020 at 04:52:54PM -0700, Russ Weight wrote:
> Create the Intel Security Manager class driver. The security
> manager provides interfaces to manage secure updates for the
> FPGA and BMC images that are stored in FLASH. The driver can
> also be used to update root entry
On Mon, Sep 07, 2020 at 10:23:27PM +0800, Xu Yilun wrote:
> This patch adds support for the Nios handshake private feature on Intel
> PAC (Programmable Acceleration Card) N3000.
>
> The Nios is the embedded processor on the FPGA card. This private feature
> provides a handshake interface to FPGA
On Tue, Sep 15, 2020 at 11:27:53AM +0800, Xu Yilun wrote:
> The patch moves dfl-bus related APIs to include/linux/fpga/dfl.h
>
> Now the DFL device drivers could be made as independent modules and put
> in different folders according to their functionality. In order for
> scattered DFL device
Hi Hao, Xu,
On Tue, Sep 15, 2020 at 05:58:46AM +, Wu, Hao wrote:
> > On Tue, Sep 15, 2020 at 12:08:38PM +0800, Wu, Hao wrote:
> > > > On Tue, Sep 15, 2020 at 11:27:51AM +0800, Xu Yilun wrote:
> > > > > Device Feature List (DFL) is a linked list of feature headers within
> > > > > the
> > > >
Replace an instance of kmemdup() with the devres counted version
instead.
Signed-off-by: Moritz Fischer
---
drivers/net/ethernet/dec/tulip/de2104x.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c
b/drivers/net/ethernet/dec
Replace pci_enable_device() with its devres counterpart
pcim_enable_device().
Signed-off-by: Moritz Fischer
---
Note: Please check my logic on this, it would seem to me
calling pci_disable_device() on devices enabled with
pcim_enable_device() *should* be fine.
Changes from v1:
- Fixed missing
Replace devm_alloc_etherdev() with its devres version.
Signed-off-by: Moritz Fischer
---
drivers/net/ethernet/dec/tulip/de2104x.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c
b/drivers/net/ethernet/dec/tulip/de2104x.c
index
from v1:
- Fix issue with the pci_enable_device patch.
Moritz Fischer (3):
net: dec: tulip: de2104x: Replace alloc_etherdev by
devm_alloc_etherdev
net: dec: tulip: de2104x: Replace pci_enable_device with devres
version
net: dec: tulip: de2104x: Replace kmemdup() with devm_kmempdup
On Tue, Sep 15, 2020 at 11:27:52AM +0800, Xu Yilun wrote:
> The description of feature_id in struct dfl_device is not accurate. In
> DFL specification the feature_id is the 12 bits field. The description
> in struct dfl_device_id is more clear so we make them aligned. We also
> made the similar
On Tue, Sep 15, 2020 at 11:27:51AM +0800, Xu Yilun wrote:
> Device Feature List (DFL) is a linked list of feature headers within the
> device MMIO space. It is used by FPGA to enumerate multiple sub features
> within it. Each feature can be uniquely identified by DFL type and
> feature id, which
On Tue, Sep 15, 2020 at 11:27:50AM +0800, Xu Yilun wrote:
> In order to support MODULE_DEVICE_TABLE() for dfl device driver, this
> patch moves struct dfl_device_id to mod_devicetable.h
>
> Signed-off-by: Xu Yilun
> Signed-off-by: Wu Hao
> Signed-off-by: Matthew Gerlach
> Signed-off-by: Russ
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