Excerpts from Linus Torvalds's message of June 28, 2020 3:39 pm:
> On Fri, Jun 26, 2020 at 8:43 AM Peter Zijlstra wrote:
>>
>> I ended up with something like the below.. but it is too warm to think
>> properly.
>>
>> I don't particularly like WQ_FLAG_PAGEWAITERS, but I liked open-coding
>> all
.
Cc: Paul McKenney
Cc: Anton Blanchard
Cc: Steven Rostedt
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Nicholas Piggin
---
include/linux/ring_buffer.h | 1 +
kernel/trace/ring_buffer.c | 85 +++--
kernel/trace/trace.c| 4 +-
3 files changed, 73
Excerpts from Masahiro Yamada's message of May 23, 2020 3:44 am:
> + Michael, and PPC ML.
>
> They may know something about the reason of failure.
Because the linker can't put branch stubs within object code sections,
so when you incrementally link them too large, the linker can't resolve
Excerpts from Nicholas Piggin's message of May 16, 2020 5:36 pm:
> Excerpts from Leonardo Bras's message of May 16, 2020 3:21 pm:
>> @@ -202,6 +220,7 @@ void __init __nostackprotector initialise_paca(struct
>> paca_struct *new_paca, int
>> /* For now -- if we have threads this will be
Excerpts from Leonardo Bras's message of May 16, 2020 3:21 pm:
> Implement rtas_call_reentrant() for reentrant rtas-calls:
> "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive".
>
> On LoPAPR Version 1.1 (March 24, 2016), from 7.3.10.1 to 7.3.10.4,
> items 2 and 3 say:
>
> 2 - For the
Excerpts from Rik van Riel's message of May 16, 2020 5:24 am:
> On Fri, 2020-05-15 at 16:50 +1000, Nicholas Piggin wrote:
>>
>> But what about if there are (real, not speculative) stores in the
>> store
>> queue still on the lazy thread from when it was switched, that
Excerpts from Leonardo Bras's message of May 15, 2020 9:51 am:
> Implement rtas_call_reentrant() for reentrant rtas-calls:
> "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive".
>
> On LoPAPR Version 1.1 (March 24, 2016), from 7.3.10.1 to 7.3.10.4,
> items 2 and 3 say:
>
> 2 - For the
Hi Rik,
Commit 145f573b89a62 ("Make lazy TLB mode lazier").
A couple of questions here (and I don't know the x86 architecture too
well let alone the ASID stuff, so bear with me). I'm assuming, and it
appears to be in the x86 manual that you can't map the same physical
page with conflicting
Excerpts from Leonardo Bras's message of May 13, 2020 7:45 am:
> Currently, if printk lock (logbuf_lock) is held by other thread during
> crash, there is a chance of deadlocking the crash on next printk, and
> blocking a possibly desired kdump.
>
> At the start of default_machine_crash_shutdown,
Excerpts from Oliver O'Halloran's message of May 9, 2020 6:11 pm:
> On Sat, May 9, 2020 at 12:41 AM Qian Cai wrote:
>>
>> Booting POWER9 PowerNV has this message,
>>
>> "ioremap() called early from pnv_pci_init_ioda_phb+0x420/0xdfc. Use
>> early_ioremap() instead”
>>
>> but use the patch below
Excerpts from Qian Cai's message of May 9, 2020 3:41 am:
>
>
>> On May 8, 2020, at 10:39 AM, Qian Cai wrote:
>>
>> Booting POWER9 PowerNV has this message,
>>
>> "ioremap() called early from pnv_pci_init_ioda_phb+0x420/0xdfc. Use
>> early_ioremap() instead”
>>
>> but use the patch below
Excerpts from Abhishek's message of April 30, 2020 3:52 pm:
> Hi Nick,
>
> Have you posted out the kernel side of "opal v4" patchset?
> I could only find the opal patchset.
I just posted some new ones. I have some change sfor the cpuidle side
but I haven't really looked to see what needs
gnificant improvement. Thanks for the quick turnaround.
Tested-by: Nicholas Piggin
Michal Suchanek's on August 28, 2019 8:30 pm:
> With endian switch disabled by default the ppc64le compat supports
> ppc32le only which is something next to nobody has binaries for.
>
> Less code means less bugs so drop the compat stuff.
Interesting patches, thanks for looking into it. I don't
Christophe Leroy's on August 27, 2019 6:13 pm:
> SET_MSR_EE() is just use in this file and doesn't provide
> any added value compared to mtmsr(). Drop it.
>
> Add macros to use wrtee/wrteei insn.
>
> Replace #ifdefs by IS_ENABLED()
>
> Signed-off-by: Christophe Leroy
> ---
>
Masahiro Yamada's on August 27, 2019 8:49 pm:
> Hi.
>
> On Tue, Aug 27, 2019 at 6:59 PM Nicholas Piggin wrote:
>>
>> Nick Desaulniers's on August 27, 2019 8:57 am:
>> > On Mon, Aug 26, 2019 at 2:22 PM Nick Desaulniers
>> > wrote:
>> >>
>
Nick Desaulniers's on August 27, 2019 8:57 am:
> On Mon, Aug 26, 2019 at 2:22 PM Nick Desaulniers
> wrote:
>>
>> I'm looking into a linkage failure for one of our device kernels, and
>> it seems that genksyms isn't producing a hash value correctly for
>> aggregate definitions that contain
Abhishek Goel's on August 23, 2019 5:09 pm:
> Background
> --
>
> Previously if a older kernel runs on a newer firmware, it may enable
> all available states irrespective of its capability of handling it.
> Consider a case that some stop state has a bug, we end up disabling all
>
Santosh Sivaraj's on August 20, 2019 11:47 am:
> Hi Nick,
>
> Nicholas Piggin writes:
>
>> Santosh Sivaraj's on August 15, 2019 10:39 am:
>>> From: Balbir Singh
>>>
>>> The current code would fail on huge pages addresses, since the shift would
Segher Boessenkool's on August 20, 2019 12:24 am:
> On Mon, Aug 19, 2019 at 01:58:12PM +, Christophe Leroy wrote:
>> -#define LOAD_REG_IMMEDIATE_SYM(reg,expr)\
>> -lis reg,(expr)@highest; \
>> -ori reg,reg,(expr)@higher; \
>> -rldicr reg,reg,32,31;
g is structured. For now it's probably fine.
Reviewed-by: Nicholas Piggin
>
> Co-developed-by: Reza Arbab
> Signed-off-by: Reza Arbab
> Signed-off-by: Balbir Singh
> Signed-off-by: Santosh Sivaraj
> Reviewed-by: Mahesh Salgaonkar
> ---
> arch/powerpc/include/asm/
Santosh Sivaraj's on August 15, 2019 10:39 am:
> From: Balbir Singh
>
> The current code would fail on huge pages addresses, since the shift would
> be incorrect. Use the correct page shift value returned by
> __find_linux_pte() to get the correct physical address. The code is more
> generic and
r
> Acked-by: Balbir Singh
> Cc: sta...@vger.kernel.org # v4.15+
Reviewed-by: Nicholas Piggin
Christophe Leroy's on August 14, 2019 4:31 pm:
> Hi Nick,
>
>
> Le 07/06/2018 à 03:43, Nicholas Piggin a écrit :
>> On Wed, 6 Jun 2018 14:21:08 + (UTC)
>> Christophe Leroy wrote:
>>
>>> scaled cputime is only meaningfull when the processor has
Christophe Leroy's on August 14, 2019 6:11 am:
> Until vmalloc system is up and running, ioremap basically
> allocates addresses at the border of the IOREMAP area.
>
> On PPC32, addresses are allocated down from the top of the area
> while on PPC64, addresses are allocated up from the base of the
Greg Thelen's on July 22, 2019 4:32 pm:
> Since commit 9e3596b0c653 ("kbuild: initramfs cleanup, set target from
> Kconfig") "make clean" leaves behind compressed initramfs images.
> Example:
> $ make defconfig
> $ sed -i
>
Alex Kogan's on July 17, 2019 12:45 am:
>
>> On Jul 16, 2019, at 7:47 AM, Nicholas Piggin wrote:
>>
>> Alex Kogan's on July 16, 2019 5:25 am:
>>> Our evaluation shows that CNA also improves performance of user
>>> applications that have hot pthread m
Alex Kogan's on July 16, 2019 5:25 am:
> Our evaluation shows that CNA also improves performance of user
> applications that have hot pthread mutexes. Those mutexes are
> blocking, and waiting threads park and unpark via the futex
> mechanism in the kernel. Given that kernel futex chains, which
Santosh Sivaraj's on July 9, 2019 10:15 pm:
> If we take a UE on one of the instructions with a fixup entry, set nip
> to continue execution at the fixup entry. Stop processing the event
> further or print it.
So... what happens if we take a machine check while we happen to be
executing some
Santosh Sivaraj's on July 9, 2019 10:15 pm:
> From: Balbir Singh
>
> The pmem infrastructure uses memcpy_mcsafe in the pmem layer so as to
> convert machine check exceptions into a return value on failure in case
> a machine check exception is encountered during the memcpy. The return
> value is
Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Nicholas Piggin
> Signed-off-by: Santosh Sivaraj
> ---
> include/linux/extable.h | 2 ++
> kernel/extable.c| 16 +---
> 2 files changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/include/linux/exta
Santosh Sivaraj's on July 9, 2019 10:15 pm:
> From: Balbir Singh
>
> The current code would fail on huge pages addresses, since the shift
> would be incorrect. Use the correct page shift value returned by
> __find_linux_pte() to get the correct pfn. The code is more generic
> and can handle both
Abhishek Goel's on July 4, 2019 7:18 pm:
> Currently, the cpuidle governors determine what idle state a idling CPU
> should enter into based on heuristics that depend on the idle history on
> that CPU. Given that no predictive heuristic is perfect, there are cases
> where the governor predicts a
Naveen N. Rao's on June 27, 2019 9:23 pm:
> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
> enable function tracing and profiling. So far, with dynamic ftrace, we
> used to only patch out the branch to _mcount(). However, mflr is
> executed by the branch unit that can
bly happen
when advanced parameters are used incorrectly.
Signed-off-by: Nicholas Piggin
---
v2: Fix a NULL pointer dereference when not overriding housekeeping,
noticed by kernel test robot and Qais, who fixed it and verified
the fix (thanks!)
kernel/sched/isolat
Qais Yousef's on June 24, 2019 8:57 pm:
> On 06/01/19 21:39, Nicholas Piggin wrote:
>> With the change to allow the boot CPU0 to be isolated, it is possible
>> to specify command line options that result in no housekeeping CPU
>> online at boot.
>>
>> An 8 CPU
Christoph Hellwig's on June 21, 2019 6:15 pm:
> On Thu, Jun 20, 2019 at 10:21:46AM -0700, Linus Torvalds wrote:
>> Hmm. Honestly, I've never seen anything like that in any kernel profiles.
>>
>> Compared to the problems I _do_ see (which is usually the obvious
>> cache misses, and locking), it
kernel test robot's on June 21, 2019 6:20 pm:
> FYI, we noticed the following commit (built with gcc-7):
>
> commit: c427534e48381727924529455ddfa67e2985686d ("kernel/isolation: Asset
> that a housekeeping CPU comes up at boot time")
>
Linus Torvalds's on June 21, 2019 3:21 am:
> On Thu, Jun 20, 2019 at 5:19 AM Nicholas Piggin wrote:
>>
>> The processor aliasing problem happens because the struct will
>> be initialised with stores using one base register (e.g., stack
>> register), and then
Linus Torvalds's on June 12, 2019 11:09 am:
> On Tue, Jun 11, 2019 at 2:55 PM Nicholas Piggin wrote:
>>
>> What does this do for performance? I've found this pattern can be
>> bad for store aliasing detection.
>
> I wouldn't expect it to be noticeable, and the lack
Alastair D'Silva
Yeah I don't think you need to manage a kernel context explicitly
because it will always be flushed with tlbie, comment helps. For
the powerpc/mm bit,
Acked-by: Nicholas Piggin
Naveen N. Rao's on June 19, 2019 7:53 pm:
> Nicholas Piggin wrote:
>> Michael Ellerman's on June 19, 2019 3:14 pm:
>>> Hi Naveen,
>>>
>>> Sorry I meant to reply to this earlier .. :/
>
> No problem. Thanks for the questions.
>
>>>
>&g
Abhishek's on June 19, 2019 7:08 pm:
> Hi Nick,
>
> Thanks for the review. Some replies below.
>
> On 06/19/2019 09:53 AM, Nicholas Piggin wrote:
>> Abhishek Goel's on June 17, 2019 7:56 pm:
>>> Currently, the cpuidle governors determine what idle state a idling C
Michael Ellerman's on June 19, 2019 3:14 pm:
> Hi Naveen,
>
> Sorry I meant to reply to this earlier .. :/
>
> "Naveen N. Rao" writes:
>> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
>> enable function tracing and profiling. So far, with dynamic ftrace, we
>> used to
Abhishek Goel's on June 17, 2019 7:56 pm:
> Currently, the cpuidle governors determine what idle state a idling CPU
> should enter into based on heuristics that depend on the idle history on
> that CPU. Given that no predictive heuristic is perfect, there are cases
> where the governor predicts a
Frederic Weisbecker's on June 18, 2019 5:05 am:
> On Mon, Jun 17, 2019 at 05:59:31PM +0200, Peter Zijlstra wrote:
>> On Mon, Jun 10, 2019 at 05:24:32PM +1000, Nicholas Piggin wrote:
>> > Nicholas Piggin's on June 1, 2019 9:39 pm:
>> > > With the change to allo
Christoph Hellwig's on June 12, 2019 12:41 am:
> Instead of passing a set of always repeated arguments down the
> get_user_pages_fast iterators, create a struct gup_args to hold them and
> pass that by reference. This leads to an over 100 byte .text size
> reduction for x86-64.
What does this do
Nicholas Piggin's on June 1, 2019 9:39 pm:
> With the change to allow the boot CPU0 to be isolated, it is possible
> to specify command line options that result in no housekeeping CPU
> online at boot.
>
> An 8 CPU system booted with "nohz_full=0-6 maxcpus=4", for example.
>
> It is not easily
Andrew Morton's on June 6, 2019 7:22 am:
> On Thu, 6 Jun 2019 00:48:13 +1000 Nicholas Piggin wrote:
>
>> The kernel currently clamps large system hashes to MAX_ORDER when
>> hashdist is not set, which is rather arbitrary.
>>
>> vmalloc space is limited on 32-bi
or "linear" in the kernel log message.
Signed-off-by: Nicholas Piggin
---
This is a better solution than the previous one for the case of !NUMA
systems running on CONFIG_NUMA kernels, we can clear the default
hashdist early and have everything allocated out of the linear map.
The hu
, under 1% difference, page tables are
likely to be well cached for this workload).
Signed-off-by: Nicholas Piggin
---
mm/page_alloc.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 15f46be7d210
bly happen
when advanced parameters are used incorrectly.
Signed-off-by: Nicholas Piggin
---
kernel/sched/isolation.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/kernel/sched/isolation.c b/kernel/sched/isolation.c
index 123ea07a3f3b..7b9e1e0d4ec3 100644
--- a/ke
Stephen Rothwell's on May 30, 2019 4:17 pm:
> Hi all,
>
> My qemu boot (PowerPC le guest on PowerPC le host, with and without kvm,
> using a kernel built with powerpc_pseries_le_defconfig) oopses during boot
> like this:
>
>
Bharata B Rao's on May 21, 2019 12:29 am:
> On Mon, May 20, 2019 at 01:50:35PM +0530, Bharata B Rao wrote:
>> On Mon, May 20, 2019 at 05:00:21PM +1000, Nicholas Piggin wrote:
>> > Bharata B Rao's on May 20, 2019 3:56 pm:
>> > > On Mon, May 20, 2019 at 02:48:35P
Bharata B Rao's on May 20, 2019 3:56 pm:
> On Mon, May 20, 2019 at 02:48:35PM +1000, Nicholas Piggin wrote:
>> >> > git bisect points to
>> >> >
>> >> > commit 4231aba000f5a4583dd9f67057aadb68c3eca99d
>> >> > Author:
>> >> dlpar_remove_lmb+0x94/0x140
>> >> [ 21.964223] [c003f8803b50] [c00d52b4]
>> >> dlpar_memory+0x464/0xd00
>> >> [ 21.964259] [c003f8803be0] [c00cd5c0]
>> >> handle_dlpar_errorlog+0xc0/0x190
>> >> [ 21.9643
ing in 2 steps: patch in the
> mflr instruction, use synchronize_rcu_tasks() to ensure all existing
> threads make progress, and then patch in the branch to _mcount(). We
> override ftrace_replace_code() with a powerpc64 variant for this
> purpose.
>
> Signed-off-by: Nicholas Piggin
>
Gautham R Shenoy's on May 16, 2019 3:36 pm:
> Hello Nicholas,
>
>
> On Thu, May 16, 2019 at 02:55:42PM +1000, Nicholas Piggin wrote:
>> Abhishek's on May 13, 2019 7:49 pm:
>> > On 05/08/2019 10:29 AM, Nicholas Piggin wrote:
>> >> Abhishek Goel's on A
Abhishek's on May 13, 2019 7:49 pm:
> On 05/08/2019 10:29 AM, Nicholas Piggin wrote:
>> Abhishek Goel's on April 22, 2019 4:32 pm:
>>> Currently, the cpuidle governors determine what idle state a idling CPU
>>> should enter into based on heuristics that depend on the i
Frederic Weisbecker's on May 8, 2019 10:35 am:
> On Tue, May 07, 2019 at 09:50:24AM +1000, Nicholas Piggin wrote:
>> Frederic Weisbecker's on May 7, 2019 1:16 am:
>> > On Sat, May 04, 2019 at 04:59:12PM +1000, Nicholas Piggin wrote:
>> >> Frederic Weisbe
Frederic Weisbecker's on May 7, 2019 1:16 am:
> On Sat, May 04, 2019 at 04:59:12PM +1000, Nicholas Piggin wrote:
>> Frederic Weisbecker's on May 4, 2019 10:27 am:
>> > On Fri, May 03, 2019 at 10:47:37AM -0700, tip-bot for Nicholas Piggin
>>
Frederic Weisbecker's on May 4, 2019 10:27 am:
> On Fri, May 03, 2019 at 10:47:37AM -0700, tip-bot for Nicholas Piggin wrote:
>> Commit-ID: 9219565aa89033a9cfdae788c1940473a1253d6c
>> Gitweb:
>> https://git.kernel.org/tip/9219565aa89033a9cfdae788c1940473a1253d6c
&g
Peter Zijlstra's on May 4, 2019 2:04 am:
> On Fri, May 03, 2019 at 08:34:57PM +0800, kbuild test robot wrote:
>> tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
>> sched/core
>> head: 65874bd36e6ae3028539e989bfb5c28ad457368e
>> commit:
Commit-ID: 9219565aa89033a9cfdae788c1940473a1253d6c
Gitweb: https://git.kernel.org/tip/9219565aa89033a9cfdae788c1940473a1253d6c
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:47 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 19:42:58 +0200
sched/isolation
Commit-ID: 08ae95f4fd3b38b257f5dc7e6507e071c27ba0d5
Gitweb: https://git.kernel.org/tip/08ae95f4fd3b38b257f5dc7e6507e071c27ba0d5
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:48 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 19:42:58 +0200
nohz_full: Allow
Commit-ID: 9ca12ac04bb7d7cfb28aa549dcd3d15761f15543
Gitweb: https://git.kernel.org/tip/9ca12ac04bb7d7cfb28aa549dcd3d15761f15543
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:46 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 19:42:58 +0200
kernel/cpu: Allow non
Commit-ID: 2f1a6fbbef7781382850c3104ecb658f21b5d460
Gitweb: https://git.kernel.org/tip/2f1a6fbbef7781382850c3104ecb658f21b5d460
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:45 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 19:42:41 +0200
power/suspend: Add
Commit-ID: 65874bd36e6ae3028539e989bfb5c28ad457368e
Gitweb: https://git.kernel.org/tip/65874bd36e6ae3028539e989bfb5c28ad457368e
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:48 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 12:53:15 +0200
nohz_full: Allow
Commit-ID: 77a5352ba977d2554643e3797e10823d0d03dcf7
Gitweb: https://git.kernel.org/tip/77a5352ba977d2554643e3797e10823d0d03dcf7
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:44 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 12:53:14 +0200
sched/core: Allow
Commit-ID: e9a140c6d20ee29951a193342ebaccf07ebc63eb
Gitweb: https://git.kernel.org/tip/e9a140c6d20ee29951a193342ebaccf07ebc63eb
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:47 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 12:53:14 +0200
sched/isolation
Commit-ID: 9bcd2cd91816020b0600a2078bab51641b1341df
Gitweb: https://git.kernel.org/tip/9bcd2cd91816020b0600a2078bab51641b1341df
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:46 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 12:53:14 +0200
kernel/cpu: Allow non
Commit-ID: c2cb30bfceceba8a2a0d5713230a250dd6140e22
Gitweb: https://git.kernel.org/tip/c2cb30bfceceba8a2a0d5713230a250dd6140e22
Author: Nicholas Piggin
AuthorDate: Thu, 11 Apr 2019 13:34:45 +1000
Committer: Ingo Molnar
CommitDate: Fri, 3 May 2019 12:53:14 +0200
power/suspend: Add
Commit-ID: 9b019acb72e4b5741d88e8936d6f200ed44b66b2
Gitweb: https://git.kernel.org/tip/9b019acb72e4b5741d88e8936d6f200ed44b66b2
Author: Nicholas Piggin
AuthorDate: Fri, 12 Apr 2019 14:26:13 +1000
Committer: Ingo Molnar
CommitDate: Mon, 29 Apr 2019 08:27:03 +0200
sched/nohz: Run NOHZ
Wanpeng Li's on April 28, 2019 5:01 pm:
> On Fri, 12 Apr 2019 at 12:27, Nicholas Piggin wrote:
>>
>> The nohz idle balancer runs on the lowest idle CPU. This can
>> interfere with isolated CPUs, so confine it to HK_FLAG_MISC
>> housekeeping CPUs.
>>
>> HK_
Peter Zijlstra's on April 25, 2019 9:56 pm:
> On Fri, Apr 12, 2019 at 02:26:13PM +1000, Nicholas Piggin wrote:
>> The nohz idle balancer runs on the lowest idle CPU. This can
>> interfere with isolated CPUs, so confine it to HK_FLAG_MISC
>> housekeeping CPUs.
>>
&
Paul E. McKenney's on April 20, 2019 4:26 am:
> On Fri, Apr 19, 2019 at 08:00:17PM +0200, Peter Zijlstra wrote:
>> On Fri, Apr 19, 2019 at 01:21:45PM -0400, Alan Stern wrote:
>> > Index: usb-devel/Documentation/atomic_t.txt
>> > ===
Commit-ID: 471ba0e686cb13752bc1ff3216c54b69a2d250ea
Gitweb: https://git.kernel.org/tip/471ba0e686cb13752bc1ff3216c54b69a2d250ea
Author: Nicholas Piggin
AuthorDate: Tue, 9 Apr 2019 19:34:03 +1000
Committer: Ingo Molnar
CommitDate: Thu, 18 Apr 2019 14:07:52 +0200
irq_work: Do not raise
Commit-ID: 3ab68397950772b0dccf565b1294d929f573a8a2
Gitweb: https://git.kernel.org/tip/3ab68397950772b0dccf565b1294d929f573a8a2
Author: Nicholas Piggin
AuthorDate: Tue, 9 Apr 2019 19:34:03 +1000
Committer: Ingo Molnar
CommitDate: Thu, 18 Apr 2019 12:48:49 +0200
irq_work: Do not raise
.
The problem was observed with increased jitter on an application
running on CPU0, caused by nohz idle load balancing being run on
CPU1 (an SMT sibling).
Signed-off-by: Nicholas Piggin
---
kernel/sched/fair.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/kernel
ore use when CPU0 is _not_ a housekeeping one,
and that's where I've done most testing, but I don't see any hard
dependency.
Thanks,
Nick
>
> On Thu, Apr 11, 2019 at 04:05:36PM +1000, Nicholas Piggin wrote:
>> Date: Tue, 9 Apr 2019 20:23:16 +1000
>> Subject: [PATCH] kernel/sche
Paul E. McKenney's on April 12, 2019 1:42 am:
> On Tue, Apr 09, 2019 at 07:21:54PM +1000, Nicholas Piggin wrote:
>> Thomas Gleixner's on April 6, 2019 3:54 am:
>> > On Fri, 5 Apr 2019, Nicholas Piggin wrote:
>> >> Thomas Gleixner's on April 5, 2019 12:36 am:
>&g
for this because it is not set anywhere
at the moment. This could be folded into HK_FLAG_SCHED once that
option is fixed.
The problem was observed with increased jitter on an application
running on CPU0, caused by nohz idle load balancing being run on
CPU1 (an SMT sibling).
Signed-off-by: Nicholas Piggin
Will Deacon's on April 9, 2019 11:46 pm:
> Hi Nick,
>
> On Tue, Apr 09, 2019 at 07:00:52PM +1000, Nicholas Piggin wrote:
>> Linus Torvalds's on April 6, 2019 1:50 am:
>> > On Fri, Apr 5, 2019 at 4:01 AM Will Deacon wrote:
>> >>
>> >> mmiowb()
Acked-by: Peter Zijlstra (Intel)
Reviewed-by: Frederic Weisbecker
Signed-off-by: Nicholas Piggin
---
kernel/irq_work.c | 78 ++-
1 file changed, 43 insertions(+), 35 deletions(-)
diff --git a/kernel/irq_work.c b/kernel/irq_work.c
index 6b7cdf17ccf8
Thomas Gleixner's on April 6, 2019 3:54 am:
> On Fri, 5 Apr 2019, Nicholas Piggin wrote:
>> Thomas Gleixner's on April 5, 2019 12:36 am:
>> > On Thu, 4 Apr 2019, Nicholas Piggin wrote:
>> >
>> >> I've been looking at ways to fix suspend breakage with CPU0
Linus Torvalds's on April 6, 2019 1:50 am:
> On Fri, Apr 5, 2019 at 4:01 AM Will Deacon wrote:
>>
>> mmiowb() is now implied by spin_unlock() on architectures that require
>> it, so there is no reason to call it from driver code. This patch was
>> generated using coccinelle:
>>
>>
Thomas Gleixner's on April 5, 2019 12:36 am:
> On Thu, 4 Apr 2019, Nicholas Piggin wrote:
>
>> I've been looking at ways to fix suspend breakage with CPU0 as a
>> nohz CPU. I started looking at various things like allowing CPU0
>> to take over do_timer again temporari
freeze to occur on a non-boot CPU,
so the option may need to be made conditional by arch?
Signed-off-by: Nicholas Piggin
---
kernel/time/tick-common.c | 50 +++
kernel/time/tick-sched.c | 27 +++--
2 files changed, 60 insertions(+), 17 deletions
This patch chooses a housekeeping CPU to be the primary when disabling
CPUs for suspend / kexec freeze. This should not have any effect until
a later change because CPU0 is always a housekeeping CPU.
Signed-off-by: Nicholas Piggin
---
include/linux/cpu.h | 2 +-
kernel/cpu.c| 10
During housekeeping mask setup, currently a possible CPU is required.
That does not guarantee a CPU at boot time, so check to ensure that
at least one present CPU is in the mask.
Signed-off-by: Nicholas Piggin
---
kernel/sched/isolation.c | 18 +-
1 file changed, 13 insertions
This has on effect yet because CPU0 will always be a housekeeping CPU
until a later change.
Signed-off-by: Nicholas Piggin
---
kernel/sched/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 4778c48a7fda..10e05ec049b6
then was having the housekeeping
CPU go offline.
So I decided to try just allowing the freeze to occur on non-zero
CPU. This seems to be a lot simpler to get working, but I guess
some archs won't be able to deal with this? Would it be okay to
make it opt-in per arch?
Thanks,
Nick
Nicholas Piggin (4
Michael Ellerman's on March 4, 2019 11:01 am:
> Nicholas Piggin writes:
>> Michael Ellerman's on March 3, 2019 7:26 pm:
>>> Nicholas Piggin writes:
> ...
>>>> what was broken about the powerpc one, which is basically:
>>>>
>>>> static i
Linus Torvalds's on March 4, 2019 4:48 am:
> On Sun, Mar 3, 2019 at 2:05 AM Nicholas Piggin wrote:
>>
>> Why even bother with it at all, "internal" or not? Just get rid of
>> mmiowb, the concept is obsolete.
>
> It *is* gone, for chrissake! Only the
Michael Ellerman's on March 3, 2019 7:26 pm:
> Nicholas Piggin writes:
>> Will Deacon's on March 2, 2019 12:03 am:
>>> In preparation for removing all explicit mmiowb() calls from driver
>>> code, implement a tracking system in asm-generic based loosely on the
Linus Torvalds's on March 3, 2019 2:29 pm:
> On Sat, Mar 2, 2019, 19:34 Nicholas Piggin wrote:
>
>>
>> It doesn't have to be done all at once with this series, obviously this
>> is a big improvement on its own. But why perpetuate the nomenclature
>> and
Linus Torvalds's on March 3, 2019 12:18 pm:
> On Sat, Mar 2, 2019 at 5:43 PM Nicholas Piggin wrote:
>>
>> Is there a reason to call this "mmiowb"? We already have wmb that
>> orders cacheable stores vs mmio stores don't we?
>
> Sadly no it doesn't.
Will Deacon's on March 2, 2019 12:03 am:
> @@ -177,6 +178,7 @@ do {
> \
> static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock)
> {
> __acquire(lock);
> + mmiowb_spin_lock();
>
Will Deacon's on March 2, 2019 12:03 am:
> In preparation for removing all explicit mmiowb() calls from driver
> code, implement a tracking system in asm-generic based loosely on the
> PowerPC implementation. This allows architectures with a non-empty
> mmiowb() definition to have the barrier
Will Deacon's on February 23, 2019 4:50 am:
> The mmiowb() macro is horribly difficult to use and drivers will continue
> to work most of the time if they omit a call when it is required.
>
> Rather than rely on driver authors getting this right, push mmiowb() into
> arch_spin_unlock() for ia64.
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