RE: [PATCH v8 2/3] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU

2020-06-29 Thread Pritesh Raithatha
> Add binding for NVIDIA's Tegra194 SoC SMMU topology that is based on ARM > MMU-500. > > Signed-off-by: Krishna Reddy Reviewed-by: Pritesh Raithatha

RE: [PATCH v8 3/3] iommu/arm-smmu: Add global/context fault implementation hooks

2020-06-29 Thread Pritesh Raithatha
> Add global/context fault hooks to allow NVIDIA SMMU implementation handle > faults across multiple SMMUs. > > Signed-off-by: Krishna Reddy Reviewed-by: Pritesh Raithatha

RE: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage

2020-06-29 Thread Pritesh Raithatha
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave IOVA > accesses across them. > Add NVIDIA implementation for dual ARM MMU-500s and add new compatible > string for Tegra194 SoC SMMU topology. > > Signed-off-by: Krishna Reddy Reviewed-by: Pritesh Raithatha

Re: [PATCH V2 2/2] pinctrl: tegra114: add pinctrl driver for NVIDIA's Tegra114 SoC

2013-01-17 Thread Pritesh Raithatha
On Tuesday 08 January 2013 01:02 PM, Laxman Dewangan wrote: > From: Pritesh Raithatha > > This adds a driver for the Tegra114 pinmux, and required > parameterization data for Tegra114. > > The driver uses the common Tegra pincontrol driver utility > functions to implemen

[PATCH] arm: dt: tegra: fix length of pad control and mux registers

2012-10-30 Thread Pritesh Raithatha
Cc: Signed-off-by: Pritesh Raithatha --- arch/arm/boot/dts/tegra30.dtsi |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 3e4334d..3f96658 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm

[PATCH 2/2] pinctrl: tegra: set low power mode bank width to 2

2012-10-17 Thread Pritesh Raithatha
Signed-off-by: Pritesh Raithatha --- drivers/pinctrl/pinctrl-tegra.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c index ae52e4e..5a5f261 100644 --- a/drivers/pinctrl/pinctrl-tegra.c +++ b/drivers

[PATCH 1/2] dt: Document: correct tegra20/30 pinctrl slew-rate name

2012-10-17 Thread Pritesh Raithatha
change nvidia,slew_rate* to nvidia,slew-rate* Signed-off-by: Pritesh Raithatha --- .../bindings/pinctrl/nvidia,tegra20-pinmux.txt |2 +- .../bindings/pinctrl/nvidia,tegra30-pinmux.txt |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree

[PATCH] pinctrl: tegra: correct bank for pingroup and drv pingroup

2012-10-16 Thread Pritesh Raithatha
Signed-off-by: Pritesh Raithatha --- drivers/pinctrl/pinctrl-tegra30.c | 24 1 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c index 0386fdf..7894f14 100644 --- a/drivers/pinctrl