[PATCH 2/2] mmc: sdhci-acpi: AMDI0040: Allow changing HS200/HS400 driver strength

2020-09-28 Thread Raul E Rangel
. So this change will support both new and old platforms. Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci-acpi.c | 39 --- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c index

[PATCH 1/2] mmc: sdhci-acpi: AMDI0040: Set SDHCI_QUIRK2_PRESET_VALUE_BROKEN

2020-09-28 Thread Raul E Rangel
sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400") Signed-off-by: Raul E Rangel --- I decided to abandon adding the preset_value_support for now. Enabling presets for the AMD controller currently results in using invalid presets for HS400. This is because sdhci_get_preset_v

[PATCH] mmc: sdhci-acpi: Clear amd_sdhci_host on reset

2020-08-31 Thread Raul E Rangel
on resume. This results in HS400 being non-functional. This change clears the tuned_clock flag, clears the dll_enabled flag and disables the DLL on reset. Fixes: 61d7437ed1390 ("mmc: sdhci-acpi: Fix HS400 tuning for AMDI0040") Signed-off-by: Raul E Rangel --- - Performed 100+ suspend/r

[PATCH v2 2/2] Input: i8042 - Lock i8042_mutex before flushing

2020-08-27 Thread Raul E Rangel
behavior. Signed-off-by: Raul E Rangel --- (no changes since v1) drivers/input/serio/i8042.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 65ca6b47f41e8..b7ed93c5095c4 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers

[PATCH v2 1/2] Input: i8042 - Prevent intermixing i8042 commands

2020-08-27 Thread Raul E Rangel
) do not currently lock the mutex, so there is still a possibility for intermixed commands. Link: https://lore.kernel.org/linux-input/CAHQZ30ANTeM-pgdYZ4AbgxsnevBJnJgKZ1Kg+Uy8oSXZUvz=o...@mail.gmail.com Signed-off-by: Raul E Rangel --- Tested this on a device with only a PS/2 keyboard. I was able

[PATCH 2/2] Input: i8042 - Lock i8042_mutex before flushing

2020-08-27 Thread Raul E Rangel
behavior. Signed-off-by: Raul E Rangel --- drivers/input/serio/i8042.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 8590e51bcc087..b693154641500 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c

[PATCH 1/2] Input: i8042 - Prevent intermixing i8042 commands

2020-08-27 Thread Raul E Rangel
) do not currently lock the mutex, so there is still a possibility for intermixed commands. Signed-off-by: Raul E Rangel --- drivers/input/serio/i8042.c | 29 ++--- drivers/leds/leds-clevo-mail.c | 9 - drivers/platform/x86/acer-wmi.c | 2

[PATCH v2] mmc: sdhci: Don't enable presets while tuning

2020-08-24 Thread Raul E Rangel
his causes presets to be enabled unintentionally and stay enabled when transitioning back to HS200 or HS400. This patch prevents enabling presets while tuning is in progress. Fixes: 0dafa60eb2506 ("mmc: sdhci: also get preset value and driver type for MMC_DDR52") Signed-off-by: Raul E Rangel

[PATCH] mmc: sdhci: Don't enable presets while tuning

2020-08-24 Thread Raul E Rangel
for MMC_DDR52") Signed-off-by: Raul E Rangel --- The indentation changed because I ran clang-format drivers/mmc/host/sdhci.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 37b1158c1c0c9..fd702c436c

[PATCH v2] mmc: sdhci-acpi: Fix HS400 tuning for AMDI0040

2020-08-19 Thread Raul E Rangel
was not getting disabled when switching to DDR52 which is part of the HS400 tuning sequence. Fixes: 34597a3f60b1 ("mmc: sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400") Signed-off-by: Raul E Rangel Acked-by: Adrian Hunter --- Changes in v2: - Added static to amd_sdhci_exec

[PATCH] mmc: sdhci-acpi: Fix HS400 tuning for AMDI0040

2020-08-18 Thread Raul E Rangel
was not getting disabled when switching to DDR52 which is part of the HS400 tuning sequence. Fixes: 34597a3f60b1 ("mmc: sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400") Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci-acpi.c | 68 +

[PATCH v2] iommu/amd: Fix get_acpihid_device_id()

2020-05-11 Thread Raul E Rangel
it will try and match an empty string to the ACPI UID of the device. Fixes: ae5e6c6439c3 ("iommu/amd: Switch to use acpi_dev_hid_uid_match()") Suggested-by: Andy Shevchenko Signed-off-by: Raul E Rangel Reviewed-by: Andy Shevchenko --- Changes in v2: - Added Suggested by - Fixed commit d

[PATCH] mmc: sdhci-acpi: Add SDHCI_QUIRK2_BROKEN_64_BIT_DMA for AMDI0040

2020-05-08 Thread Raul E Rangel
The AMD eMMC 5.0 controller does not support 64 bit DMA. See the discussion here: https://marc.info/?l=linux-mmc=158879884514552=2 Fixes: 34597a3f60b1 ("mmc: sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400") Signed-off-by: Raul E Rangel --- drivers/mmc/host/sd

[PATCH] iommu/amd: Fix get_acpihid_device_id

2020-05-08 Thread Raul E Rangel
it will try and match an empty string to the ACPI UID of the device. Fixes: ae5e6c6439c3 ("iommu/amd: Switch to use acpi_dev_hid_uid_match()") Signed-off-by: Raul E Rangel --- drivers/iommu/amd_iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/amd

[PATCH 2/2] mmc: sdhci: Quirk for AMD SDHC Device 0x7906

2019-09-04 Thread Raul E Rangel
to D3Cold then the power state transitions are a no-op. Signed-off-by: Raul E Rangel Signed-off-by: Shyam Sundar S K Acked-by: Adrian Hunter --- This is just a resend of https://patchwork.kernel.org/patch/10925467/ drivers/mmc/host/sdhci-pci-core.c | 51 ++- 1

[PATCH 1/2] mmc: sdhci: Check card status after reset

2019-09-04 Thread Raul E Rangel
there is no notification to the MMC system that the card was removed. So from the drivers point of view the card is always present. By making sdhci_reinit compare the present state it can schedule a rescan if the card was removed while a reset was in progress. Signed-off-by: Raul E Rangel --- Sorry this took me so long

[PATCH v2] lkdtm/bugs: fix build error in lkdtm_EXHAUST_STACK

2019-08-27 Thread Raul E Rangel
ng as well. Fixes: 24cccab42c419 ("lkdtm/bugs: Adjust recursion test to avoid elision") Signed-off-by: Raul E Rangel --- Changes in v2: - Correctly cast CONFIG_FRAME_WARN so the type is consistent. drivers/misc/lkdtm/bugs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[PATCH] lkdtm/bugs: fix build error in lkdtm_EXHAUST_STACK

2019-08-27 Thread Raul E Rangel
recursion test to avoid elision") Signed-off-by: Raul E Rangel --- drivers/misc/lkdtm/bugs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/lkdtm/bugs.c b/drivers/misc/lkdtm/bugs.c index 1606658b9b7e..bf945704f21a 100644 --- a/drivers/misc/lkdtm/bugs.c +++

[PATCH v2 1/3] mmc: sdhci: sdhci-pci-o2micro: Correctly set bus width when tuning

2019-06-17 Thread Raul E Rangel
ize in sdhci_send_tuning which results in a tuning failure. Signed-off-by: Raul E Rangel Fixes: 0086fc217d5d7 ("mmc: sdhci: Add support for O2 hardware tuning") Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-pci-o2micro.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/dri

[PATCH v2 2/3] mmc: sdhci: sdhci-pci-o2micro: Check if controller supports 8-bit width

2019-06-17 Thread Raul E Rangel
The O2 controller supports 8-bit EMMC access. JESD84-B51 section A.6.3.a defines the bus testing procedure that `mmc_select_bus_width()` implements. This is used to determine the actual bus width of the eMMC. Signed-off-by: Raul E Rangel --- I tested this on an AMD chromebook. $ cat /sys

[PATCH v2 3/3] mmc: sdhci: Fix indenting on SDHCI_CTRL_8BITBUS

2019-06-17 Thread Raul E Rangel
Remove whitespace in front of SDHCI_CTRL_8BITBUS. The value is not part of SDHCI_CTRL_DMA_MASK. Signed-off-by: Raul E Rangel Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host

[PATCH 3/3] mmc: sdhci: Fix indenting on SDHCI_CTRL_8BITBUS

2019-06-10 Thread Raul E Rangel
The value is referring to SDHCI_HOST_CONTROL, not SDHCI_CTRL_DMA_MASK. Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 199712e7adbb3..89fd96596a1f7 100644

[PATCH 2/3] mmc: sdhci: sdhci-pci-o2micro: Check if controller supports 8-bit width

2019-06-10 Thread Raul E Rangel
The O2 controller supports 8-bit EMMC access. mmc_select_bus_width() will be used to determine if the MMC supports 8-bit or 4-bit access. Signed-off-by: Raul E Rangel --- I tested this on an AMD chromebook. $ cat /sys/kernel/debug/mmc1/ios clock: 2 Hz actual clock: 2

[PATCH 1/3] mmc: sdhci: sdhci-pci-o2micro: Correctly set bus width when tuning

2019-06-10 Thread Raul E Rangel
sdhci_send_tuning uses mmc->ios.bus_width to determine the block size. Without this patch the block size would be set incorrectly when the bus_width == 8 which results in tuning failing. Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci-pci-o2micro.c | 5 - 1 file changed

[RFC PATCH] kbuild: Add option to generate a Compilation Database

2019-06-06 Thread Raul E Rangel
This patch takes advantage of the -MJ option. So it only works for Clang. Signed-off-by: Raul E Rangel --- I have a couple TODOs in the code that I would like some feedback on. Specifically why extra-y doesn't seem to work in the root Makefile. Also, is there a way to add the correct list of prerequisites

[PATCH v2] platform/chrome: wilco_ec: Add version sysfs entries

2019-06-03 Thread Raul E Rangel
mber <== 08B6 Signed-off-by: Raul E Rangel --- This patch is rebased on chromeos-platform/for-next. It was originally developed on the chromiumos 4.19 kernel which has the following patch applied: https://lore.kernel.org/patchwork/patch/1062995/. That patch is not currently upstream. Changes

[PATCH] platform/chrome: wilco_ec: Add version sysfs entries

2019-05-21 Thread Raul E Rangel
Add the ability to extract version information from the EC. Signed-off-by: Raul E Rangel --- This patch is rebased on platform/chrome: wilco_ec: Add Boot on AC support. https://lkml.org/lkml/2019/4/16/1374 That patch wasn't in the for-next branch, so I'm not 100% sure if it applies cleanly

[stable/4.14.y PATCH 3/3] mmc: Kill the request if the queuedata has been removed

2019-05-13 Thread Raul E Rangel
No reason to even try processing the request if the queue is shutting down. Signed-off-by: Raul E Rangel --- drivers/mmc/core/queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c index bd7d521d5ad9d..e7ac7163fafa4

[stable/4.14.y PATCH 2/3] mmc: Fix null pointer dereference in mmc_init_request

2019-05-13 Thread Raul E Rangel
It is possible for queuedata to be cleared in mmc_cleanup_queue before the request has been started. This will result in dereferencing a null pointer. Signed-off-by: Raul E Rangel --- drivers/mmc/core/queue.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git

[stable/4.14.y PATCH 0/3] mmc: Fix a potential resource leak when shutting down request queue.

2019-05-13 Thread Raul E Rangel
later commits migrate the mmc stack to blk-mq. I tested this patch set by randomly connecting/disconnecting the SD card. I got over 189650 itarations without a problem. Thanks, Raul Adrian Hunter (1): mmc: block: Simplify cleaning up the queue Raul E Rangel (2): mmc: Fix null pointer

[stable/4.14.y PATCH 1/3] mmc: block: Simplify cleaning up the queue

2019-05-13 Thread Raul E Rangel
Tested-by: Linus Walleij Signed-off-by: Raul E Rangel --- commit 41e3efd07d5a02c80f503e29d755aa1bbb4245de upstream. drivers/mmc/core/block.c | 17 - drivers/mmc/core/queue.c | 2 ++ 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers

[PATCH 2/2] mmc: v4.14: Kill the request if the queuedata has been removed

2019-05-08 Thread Raul E Rangel
No reason to even try processing the request if the queue is shutting down. Signed-off-by: Raul E Rangel --- This commit applies to v4.14.116. This doesn't apply to 5.1 since mmc has been migrated to blk-mq. drivers/mmc/core/queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH 1/2] mmc: v4.14: Fix null pointer dereference in mmc_init_request

2019-05-08 Thread Raul E Rangel
It is possible for queuedata to be cleared in mmc_cleanup_queue before the request has been started. This will result in dereferencing a null pointer. Signed-off-by: Raul E Rangel --- I think we should cherry-pick 41e3efd07d5a02c80f503e29d755aa1bbb4245de https://lore.kernel.org/patchwork/patch

[PATCH] block: Fix function name in comment

2019-05-02 Thread Raul E Rangel
The comment was out of date. Signed-off-by: Raul E Rangel --- block/blk-mq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/block/blk-mq.c b/block/blk-mq.c index 9516304a38ee..0e467ff440a2 100644 --- a/block/blk-mq.c +++ b/block/blk-mq.c @@ -2062,7 +2062,7 @@ void

[PATCH] mmc: Fix tag set memory leak

2019-05-02 Thread Raul E Rangel
The tag set is allocated in mmc_init_queue but never freed. This results in a memory leak. This change makes sure we free the tag set when the queue is also freed. Signed-off-by: Raul E Rangel --- I found this using kmemleak and plugging and unplugging an SD card in a few times. Here

[RFC PATCH 1/2] mmc: sdhci: Manually check card status after reset

2019-05-01 Thread Raul E Rangel
. The SDHCI layer will keep returning -ENOMEDIUM. This results in a card that is always present and not functional. Signed-off-by: Raul E Rangel --- You can see an example of the following two patches here: https://privatebin.net/?b0f5953716d34ca6#C699bCBQ99NdvspfDW7CMucT8CJG4DgL+yUNPyepDCo

[RFC PATCH 2/2] mmc: sdhci: Quirk for AMD SDHC Device 0x7906

2019-05-01 Thread Raul E Rangel
to D3Cold then the power state transitions are a no-op. Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci-pci-core.c | 51 ++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c

[PATCH v3] mmc: core: Verify SD bus width

2019-04-29 Thread Raul E Rangel
g the card. Acked-by: Avri Altman Reviewed-by: Avri Altman Signed-off-by: Raul E Rangel --- Here is the testing I did: Good Trace: https://paste.fedoraproject.org/paste/oVEI5b0IzHD23Yo7CDZgEg [ 30.103686] mmc0: new high speed SDHC card at address 0001 [ 30.105262] mmcblk0: mmc0:0001

[PATCH v6] platform/chrome: cros_ec: Add trace event to trace EC commands

2019-04-16 Thread Raul E Rangel
NFO */ /* cros_ec_cmd: version: 1, command: EC_CMD_GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: EC_CMD_USB_PD_CONTROL */ Signed-off-by: Raul E Rangel Reviewed-by: Ross Zwisler Reviewed-by: Steven Rostedt (VMware) --- I did not add cros_ec_commands.h as an include to cros_ec_trace.c. I

[PATCH v2] mmc: core: Verify SD bus width

2019-04-16 Thread Raul E Rangel
g the card. Acked-by: Avri Altman Signed-off-by: Raul E Rangel --- This patch currently requires the SD trace events patch to be applied first for it to apply cleanly. See: https://patchwork.kernel.org/cover/10903761 This is because I want the check to happen after the trace call. This way the inv

[PATCH v2 3/4] mmc: core: Add trace event for SD OCR response

2019-04-16 Thread Raul E Rangel
| 3.5 ~ 3.6] Signed-off-by: Raul E Rangel --- drivers/mmc/core/sd_ops.c | 6 +++ include/trace/events/mmc.h | 92 ++ 2 files changed, 98 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index 0bb0b8419016..4cf0f040f896 100644

[PATCH v2 4/4] mmc: core: Add trace event for CSD response

2019-04-16 Thread Raul E Rangel
Example: mmc_csd: mmc0: struct: 0, cmdclass: 0x5b5, raw: {0x400e0032,0x5b59,0x3b4b7f80,0xa404000} Signed-off-by: Raul E Rangel --- drivers/mmc/core/mmc.c | 4 drivers/mmc/core/sd.c | 2 ++ include/trace/events/mmc.h | 29 + 3 files changed, 35

[PATCH v2 2/4] mmc: core: Add trace event for SD SSR response

2019-04-16 Thread Raul E Rangel
Example: sd_ssr: mmc0: au: 8192, erase time: 0, erase offset: 0x0, raw: {0x0,0x300,0x1019000,0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0} Signed-off-by: Raul E Rangel --- drivers/mmc/core/sd.c | 2 ++ include/trace/events/mmc.h | 32 2

[PATCH v2 0/4] Add trace events for SD registers.

2019-04-16 Thread Raul E Rangel
sizeof(__entry->raw) Raul E Rangel (4): mmc: core: Add trace event for SD SCR response mmc: core: Add trace event for SD SSR response mmc: core: Add trace event for SD OCR response mmc: core: Add trace event for CSD response drivers/mmc/core/mmc.c | 4 + drivers/mmc/core/s

[PATCH v2 1/4] mmc: core: Add trace event for SD SCR response

2019-04-16 Thread Raul E Rangel
Example: sd_scr: mmc0: version: 2, spec3: 1, width: [1-BIT | 4-BIT], cmds: [], raw: {0x2b58000,0x0} */ Signed-off-by: Raul E Rangel --- drivers/mmc/core/sd.c | 6 + include/trace/events/mmc.h | 51 ++ 2 files changed, 57 insertions(+) diff --git

[PATCH v1 4/4] mmc: core: Add trace event for CSD response

2019-04-15 Thread Raul E Rangel
Example: mmc_csd: mmc0: struct: 0, cmdclass: 0x5b5, raw: {0x400e0032,0x5b59,0x3b4b7f80,0xa404000} Signed-off-by: Raul E Rangel --- drivers/mmc/core/mmc.c | 4 drivers/mmc/core/sd.c | 2 ++ include/trace/events/mmc.h | 28 3 files changed, 34

[PATCH v1 2/4] mmc: core: Add trace event for SD SSR response

2019-04-15 Thread Raul E Rangel
Example: sd_ssr: mmc0: au: 8192, erase time: 0, erase offset: 0x0, raw: {0x0,0x300,0x1019000,0x1,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0} Signed-off-by: Raul E Rangel --- drivers/mmc/core/sd.c | 2 ++ include/trace/events/mmc.h | 31 +++ 2

[PATCH v1 3/4] mmc: core: Add trace event for SD OCR response

2019-04-15 Thread Raul E Rangel
Example: ocr_request: mmc0: 0x5120 SDHC or SDXC Supported (HCS) | Maximum Performance (XPC) | Switch to 1.8V (S18R) | 3.3 ~ 3.4 ocr_response: mmc0: 0xff8000 2.7 ~ 2.8 | 2.8 ~ 2.9 | 2.9 ~ 3.0 | 3.0 ~ 3.1 | 3.1 ~ 3.2 | 3.2 ~ 3.3 | 3.3 ~ 3.4 | 3.4 ~ 3.5 | 3.5 ~ 3.6 Signed-off-by: Raul E Rangel

[PATCH v1 1/4] mmc: core: Add trace event for SD SCR response

2019-04-15 Thread Raul E Rangel
Example: sd_scr: mmc0: version: 2, spec3: 1, width: 5, cmds: 0, raw: {0x2b58000,0x0} Signed-off-by: Raul E Rangel --- drivers/mmc/core/sd.c | 4 include/trace/events/mmc.h | 42 ++ 2 files changed, 46 insertions(+) diff --git a/drivers/mmc/core

[PATCH v1] mmc: core: Verify SD bus width

2019-04-15 Thread Raul E Rangel
dn't mount. Signed-off-by: Raul E Rangel --- AMD SDHC Device 7806 can get into a bad state after a card disconnect where anything transferred via the DATA lines will always result in a zero filled buffer. Currently the driver will continue without error if the HC is in this condition. A block device will

[PATCH v5] chrome/platform: cros_ec_proto: Add trace event to trace EC commands

2019-04-15 Thread Raul E Rangel
L_INFO */ /* cros_ec_cmd: version: 1, command: EC_CMD_GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: EC_CMD_USB_PD_CONTROL */ Signed-off-by: Raul E Rangel Reviewed-by: Ross Zwisler --- Changes in v5: - Rebased on upstream/master. It turns out upstream/master is missing a lot of c

[PATCH v4] chrome/platform: cros_ec_proto: Add trace event to trace EC commands

2019-04-12 Thread Raul E Rangel
L_INFO */ /* cros_ec_cmd: version: 1, command: EC_CMD_GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: EC_CMD_USB_PD_CONTROL */ Signed-off-by: Raul E Rangel Reviewed-by: Ross Zwisler --- Changes in v4: - Use the full command name so go to definition continues to work in my editor. Changes in v3:

[PATCH v3] chrome/platform: cros_ec_proto: Add trace event to trace EC commands

2019-04-12 Thread Raul E Rangel
ersion: 1, command: GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: USB_PD_CONTROL */ Signed-off-by: Raul E Rangel --- Changes in v3: - Use a macro to avoid duplicating the ec command names. Changes in v2: - Changed comment style to match other cros_ec files. - Fixed commit tag. d

[PATCH v2] chrome/platform: cros_ec_proto:: Add trace event to trace EC commands

2019-04-12 Thread Raul E Rangel
ersion: 1, command: GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: USB_PD_CONTROL */ Signed-off-by: Raul E Rangel --- Changes in v2: - Changed comment style to match other cros_ec files. - Fixed commit tag. drivers/platform/chrome/Makefile| 4 +- drivers/platform/

[PATCH v1 2/4] mmc/sdhci: Rename sdhci.c to sdhci-core.c

2019-04-11 Thread Raul E Rangel
Preparing to add an sdhci-trace.o to the sdhci module. Signed-off-by: Raul E Rangel --- drivers/mmc/host/Makefile | 1 + drivers/mmc/host/{sdhci.c => sdhci-core.c} | 0 2 files changed, 1 insertion(+) rename drivers/mmc/host/{sdhci.c => sdhci-core.c} (100%) diff

[PATCH v1 0/4] Add tracing for SDHCI register access

2019-04-11 Thread Raul E Rangel
this makes someone else's life easier when debugging SDHC hardware problems. Raul E Rangel (4): trace_events: Add trace_print_register to print register fields mmc/sdhci: Rename sdhci.c to sdhci-core.c mmc/host/sdhci: Add register read and write trace events mmc/host/sdhci: Make sdhci_read

[PATCH v1 4/4] mmc/host/sdhci: Make sdhci_read/sdhci_write call trace functions

2019-04-11 Thread Raul E Rangel
name. Signed-off-by: Raul E Rangel --- drivers/mmc/host/sdhci-core.c | 136 ++ drivers/mmc/host/sdhci.h | 89 ++ 2 files changed, 142 insertions(+), 83 deletions(-) diff --git a/drivers/mmc/host/sdhci-core.c b/drivers/mmc/host/sdhci

[PATCH v1 3/4] mmc/host/sdhci: Add register read and write trace events

2019-04-11 Thread Raul E Rangel
Adds an sdhci-trace object file that is linked with the sdhci module. This will allow sdhci-core to call the trace functions. There weren't constants defined for some of the fields, so I just used the raw values. See the next change for usage. Signed-off-by: Raul E Rangel --- drivers/mmc

[PATCH v1 1/4] trace_events: Add trace_print_register to print register fields

2019-04-11 Thread Raul E Rangel
"}, {} } }, {0xF<<4, "TIMEOUT"} } This would print out the following given value 0xAB: ENABLED: 1 | WIDTH: 4-BIT | ADMA | TIMEOUT: 0xA See https://pastebin.com/x73d5cvL for this in action. Signed-off-by: Raul E Rangel --- include/linux/trace_event

[PATCH] cros_ec: Add trace event to trace EC commands

2019-04-10 Thread Raul E Rangel
ersion: 1, command: GET_CMD_VERSIONS */ /* cros_ec_cmd: version: 1, command: USB_PD_CONTROL */ Signed-off-by: Raul E Rangel --- drivers/platform/chrome/Makefile| 4 +- drivers/platform/chrome/cros_ec_proto.c | 4 + drivers/platform/chrome/cros_ec_trace.c