reference
SPRUI30C – DRA75x, DRA74x Technical Reference Manual - November 2016
SPRUHZ6H - AM572x Technical Reference Manual - November 2016
Tested on:
DRA75x PG 2.0 Rev H EVM
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/dra7.dtsi | 16
1 file changed, 16 insertions
Hi,
On Wednesday 12 April 2017 11:54 AM, Kattekola, Ravikumar wrote:
On dra7, as per TRM, the HW shutdown (TSHUT) temperature is hardcoded
to 123C and cannot be modified by SW. This means when the temperature
reaches 123C HW asserts TSHUT output which signals a warm reset.
This reset is held
On Tuesday 18 April 2017 09:59 AM, Keerthy wrote:
orderly_poweroff is triggered when a graceful shutdown
of system is desired. This may be used in many critical states of the
kernel such as when subsystems detects conditions such as critical
temperature conditions. However, in certain condition
SPRUI30C – DRA75x, DRA74x Technical Reference Manual - November 2016
SPRUHZ6H - AM572x Technical Reference Manual - November 2016
Tested on:
DRA75x PG 2.0 Rev H EVM
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/dra7.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm
On Tuesday 31 January 2017 03:42 PM, Ulf Hansson wrote:
On 30 January 2017 at 11:11, Ravikumar Kattekola wrote:
From: Kishon Vijay Abraham I
commit e2bf08d643a244ccb ("omap_hsmmc: set a large data timeout for
commands with busy signal") sets an arbitrary timeout value (100ms) fo
On Tuesday 31 January 2017 03:45 PM, Ulf Hansson wrote:
On 30 January 2017 at 11:11, Ravikumar Kattekola wrote:
A few issues have been identified during mmc testing and following
set of patches fixes a couple of them related to
*timeout handling and ceb error handling*
Tested on DRA75X PG
Fixes: a45c6cb81647 ("[ARM] 5369/1: omap mmc: Add new omap
hsmmc controller for 2430 and 34xx, v3")
when using really large timeout (up to 4*60*1000 ms for bkops)
there is a possibility of data overflow using
unsigned int so use 64 bit unsigned long long.
Signed-off-by: Ravikumar
When CEB (command end bit error) occurs
reset CMD line to avoid system ending up in
erroneous state.
While command line is reset for CTO and CCRC errors,
it's not done for CEB error. Fix it here.
Reviewed-by: Kishon Vijay Abraham I
Signed-off-by: Ravikumar Kattekola
Signed-off-by: Sekhar
ith MICRON eMMC card present in AM572x IDK REV 1.3A resulting in
timeout and failed enumeration. It is fixed here by programming the
timeout with the value advertised in GENERIC_CMD6_TIME.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Sekhar Nori
Signed-off-by: Ravikumar Kattekola
---
d
for CMD6
Ravikumar Kattekola (2):
mmc: host: omap_hsmmc: reset cmd line on ceb error
mmc: host: omap_hsmmc: avoid possible overflow of timeout value
drivers/mmc/host/omap_hsmmc.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
--
1.9.1
On Monday 29 August 2016 09:13 AM, Matthijs van Duin wrote:
On 28 August 2016 at 07:35, Wolfram Sang wrote:
Well, I2C is simple, what could go wrong? :/
Actually I2C is elegant and *seems* simple, but in all its
asynchronicity there are actually a surprising number of fine details
you can tr
On Saturday 27 August 2016 07:29 PM, Matthijs van Duin wrote:
Greetings, unfortunate souls trying to use the omap-i2c peripheral in
slave mode! :-)
That would be me :( and greetings to you too :)
I recently posted some stuff about exactly that topic on TI's E2E
forum, you may want to read th
On Thursday 25 August 2016 10:44 PM, Wolfram Sang wrote:
Hi,
The omap i2c controller (at least on dra7x devices)
doesn't have start/stop (STT/STP) support for slave mode
so event #5 is not implemented in the driver.
I think you can deduce that. If a new {READ|WRITE}_REQUESTED slave event
co
ample backend driver.
Tested on:
DRA75x EVM Rev G3 and DRA72x EVM Rev B1 connected over i2c3 using DCAN2 lines
[JP3]
Ravikumar Kattekola (1):
drivers: i2c: omap: Add slave support
drivers/i2c/busses/i2c-omap.c | 144 ++
1 file changed, 144 inser
The omap i2c controller (at least on dra7x devices)
doesn't have start/stop (STT/STP) support for slave mode
so event #5 is not implemented in the driver.
Signed-off-by: Ravikumar Kattekola
---
drivers/i2c/busses/i2c-omap.c | 144 ++
1 file changed
dra72x device has i2c6 controller.
Adding hwmod definition for the same.
Reference DRA72x TRM [ SPRUHP2Q ]
Signed-off-by: Ravikumar Kattekola
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-omap2
DRA72x devices have a sixth i2c ocntroller instance.
Following patches add the required hwmod structure and
device tree nodes.
Reference doc: DRA72x TRM [ SPRUHP2Q ]
Tested on :
DRA72x Rev B EVM
Ravikumar Kattekola (2):
arm: dra7: Add hwmod entry for i2c6
dts: dra7: Add device tree node for
DRA72x devices have an extra i2c controller instance - i2c6
Adding device description for the same.
Reference : DRA72x_SR1.0 TRM [ SPRUHP2Q ]
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts
On 1/31/2015 10:36 PM, Ravikumar Kattekola wrote:
Fix bypass clock source for a few DPLLs.
On DRA7x/OMAP5, for a few DPLLs, both CLKINP and CLKINPULOW are connected
to a mux and the output from mux is routed to the bypass clkout.
Add a mux-clock as bypass clock with CLKINP and CLKINPULOW as
dding another mux clock as parent in bypass mode.
This design is common to most of the PLLs and the rest have only one bypass
clock. Below is a list of the DPLLs that need this fix:
DPLL_IVA,
DPLL_PER,
DPLL_USB and DPLL_CORE
Signed-off-by: Ravikumar Kattekola
---
arch/arm
://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git
branch: master
On:
CPU : OMAP5432 ES2.0
Board: OMAP5432 uEVM
and
CPU : DRA752 ES1.0
Board: DRA7xx
Ravikumar Kattekola (2):
ARM: DRA7x: dts: Fix the bypass clock source for dpll_iva and others
ARM: OMAP5: dts: Fix the bypass clock
arent in bypass mode.
This design is common to most of the PLLs and the rest have only one bypass
clock. Below is a list of the DPLLs that need this fix:
DPLL_IVA, DPLL_DDR,
DPLL_DSP, DPLL_EVE,
DPLL_GMAC, DPLL_PER,
DPLL_USB and DPLL_CORE
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/d
nodes")
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 736092b..b6b9286 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/ar
, SPRS857M - Dec 2012, Revised Oct 2014.
DRA72 Data Manual, SPRS906G - Dec 2012, revised Oct 2014.
Signed-off-by: Ravikumar Kattekola
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
arch/arm/boot/dts/dra72-evm.dts |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts
with the
latest Data Manual
Regards,
RK
Ravikumar Kattekola (2):
ARM: dts: dra7-evm: Fix typo in SMPS6 (VDD_GPU) max voltage
ARM: dts: dra7-evm: Update SMPS7 (VDD_CORE) max voltage to match DM
arch/arm/boot/dts/dra7-evm.dts |4 ++--
arch/arm/boot/dts/dra72-evm.dts |2 +
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