[PATCH V5 2/6] perf/x86: Add helper to obtain performance counter index

as a false positive in http://lkml.kernel.org/r/20180919091759.gz24...@hirez.programming.kicks-ass.net Link: http://lkml.kernel.org/r/20180917230758.ga3...@worktop.programming.kicks-ass.net Suggested-by: Peter Zijlstra Signed-off-by: Reinette Chatre --- arch/x86/events/core.c| 21

[PATCH V5 4/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 26 + 1 file changed, 26 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 8ad83eb3fc89..33d7968f152a 100644 --- a/arch/x86

[PATCH V5 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 305 2 files changed, 204 insertions(+), 123 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

[PATCH V5 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 305 2 files changed, 204 insertions(+), 123 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

[tip:x86/urgent] x86/intel_rdt: Fix incorrect loop end condition

Commit-ID: ffb2315fd22c2568747402eecdc581a245a2f5ba Gitweb: https://git.kernel.org/tip/ffb2315fd22c2568747402eecdc581a245a2f5ba Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:27 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:07 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix incorrect loop end condition

Commit-ID: ffb2315fd22c2568747402eecdc581a245a2f5ba Gitweb: https://git.kernel.org/tip/ffb2315fd22c2568747402eecdc581a245a2f5ba Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:27 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:07 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix exclusive mode handling of MBA resource

Commit-ID: 939b90b20bc87e199b6b53942764b987289b87ce Gitweb: https://git.kernel.org/tip/939b90b20bc87e199b6b53942764b987289b87ce Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:26 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:07 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix exclusive mode handling of MBA resource

Commit-ID: 939b90b20bc87e199b6b53942764b987289b87ce Gitweb: https://git.kernel.org/tip/939b90b20bc87e199b6b53942764b987289b87ce Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:26 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:07 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix incorrect loop end condition

Commit-ID: f0df4e1acf3d721958dcafb2c9c0bdf25189068d Gitweb: https://git.kernel.org/tip/f0df4e1acf3d721958dcafb2c9c0bdf25189068d Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:25 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix incorrect loop end condition

Commit-ID: f0df4e1acf3d721958dcafb2c9c0bdf25189068d Gitweb: https://git.kernel.org/tip/f0df4e1acf3d721958dcafb2c9c0bdf25189068d Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:25 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Do not allow pseudo-locking of MBA resource

Commit-ID: 32d736abed4febff4b6bf85d5d240ee24d254322 Gitweb: https://git.kernel.org/tip/32d736abed4febff4b6bf85d5d240ee24d254322 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:24 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Do

[tip:x86/urgent] x86/intel_rdt: Do not allow pseudo-locking of MBA resource

Commit-ID: 32d736abed4febff4b6bf85d5d240ee24d254322 Gitweb: https://git.kernel.org/tip/32d736abed4febff4b6bf85d5d240ee24d254322 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:24 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Do

[tip:x86/urgent] x86/intel_rdt: Fix unchecked MSR access

Commit-ID: 70479c012b67b89e219c40eddc5dc338b7c447a3 Gitweb: https://git.kernel.org/tip/70479c012b67b89e219c40eddc5dc338b7c447a3 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:23 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix unchecked MSR access

Commit-ID: 70479c012b67b89e219c40eddc5dc338b7c447a3 Gitweb: https://git.kernel.org/tip/70479c012b67b89e219c40eddc5dc338b7c447a3 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:23 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:06 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix invalid mode warning when multiple resources are managed

Commit-ID: 47d53b184aee983ab9492503da11b0a81b19145b Gitweb: https://git.kernel.org/tip/47d53b184aee983ab9492503da11b0a81b19145b Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:22 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix invalid mode warning when multiple resources are managed

Commit-ID: 47d53b184aee983ab9492503da11b0a81b19145b Gitweb: https://git.kernel.org/tip/47d53b184aee983ab9492503da11b0a81b19145b Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:22 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Fix size reporting of MBA resource

Commit-ID: f968dc119a159a95628a20de2a2dcc913d0a82d7 Gitweb: https://git.kernel.org/tip/f968dc119a159a95628a20de2a2dcc913d0a82d7 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:20 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Global closid helper to support future fixes

Commit-ID: c793da8e4c62d2c002a79c47f44efead450cbcae Gitweb: https://git.kernel.org/tip/c793da8e4c62d2c002a79c47f44efead450cbcae Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:21 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt

[tip:x86/urgent] x86/intel_rdt: Fix size reporting of MBA resource

Commit-ID: f968dc119a159a95628a20de2a2dcc913d0a82d7 Gitweb: https://git.kernel.org/tip/f968dc119a159a95628a20de2a2dcc913d0a82d7 Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:20 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt: Fix

[tip:x86/urgent] x86/intel_rdt: Global closid helper to support future fixes

Commit-ID: c793da8e4c62d2c002a79c47f44efead450cbcae Gitweb: https://git.kernel.org/tip/c793da8e4c62d2c002a79c47f44efead450cbcae Author: Reinette Chatre AuthorDate: Sat, 15 Sep 2018 14:58:21 -0700 Committer: Thomas Gleixner CommitDate: Tue, 18 Sep 2018 23:38:05 +0200 x86/intel_rdt

Re: [PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

Hi Peter, On 9/17/2018 4:07 PM, Peter Zijlstra wrote: > On Mon, Sep 17, 2018 at 09:37:14AM -0700, Reinette Chatre wrote: >> On 9/17/2018 1:23 AM, Peter Zijlstra wrote: > >>> I said arch/x86/include/asm/perf_events.h and call it: >>> x86_perf_rdpmc_index(). >>

Re: [PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

Hi Peter, On 9/17/2018 4:07 PM, Peter Zijlstra wrote: > On Mon, Sep 17, 2018 at 09:37:14AM -0700, Reinette Chatre wrote: >> On 9/17/2018 1:23 AM, Peter Zijlstra wrote: > >>> I said arch/x86/include/asm/perf_events.h and call it: >>> x86_perf_rdpmc_index(). >>

Re: [PATCH V3 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/17/2018 1:58 AM, Peter Zijlstra wrote: > On Tue, Sep 11, 2018 at 10:14:36AM -0700, Reinette Chatre wrote: >> +static int measure_l2_residency(void *_plr) >> +{ > >> +measure_residency_fn(_miss_attr, _hit_attr, plr, ); > >> +} >> + &

Re: [PATCH V3 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/17/2018 1:58 AM, Peter Zijlstra wrote: > On Tue, Sep 11, 2018 at 10:14:36AM -0700, Reinette Chatre wrote: >> +static int measure_l2_residency(void *_plr) >> +{ > >> +measure_residency_fn(_miss_attr, _hit_attr, plr, ); > >> +} >> + &

Re: [PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

Hi Peter, On 9/17/2018 1:23 AM, Peter Zijlstra wrote: > On Tue, Sep 11, 2018 at 10:14:33AM -0700, Reinette Chatre wrote: >> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h >> index 53c500f0ca79..c04dc666425c 100644 >> --- a/include/linux/perf_event.h &

Re: [PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

Hi Peter, On 9/17/2018 1:23 AM, Peter Zijlstra wrote: > On Tue, Sep 11, 2018 at 10:14:33AM -0700, Reinette Chatre wrote: >> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h >> index 53c500f0ca79..c04dc666425c 100644 >> --- a/include/linux/perf_event.h &

Re: [PATCH 4/9] x86/intel_rdt: Fix invalid mode warning when

On 9/14/2018 9:36 PM, Reinette Chatre wrote: > On 9/14/2018 1:32 PM, Fenghua Yu wrote: >> From: Reinette Chatre >> >> multiple resources are managed > > The above snippet is redundant. We can remove it in the next version. Apologies, I responded too fast. The su

Re: [PATCH 4/9] x86/intel_rdt: Fix invalid mode warning when

On 9/14/2018 9:36 PM, Reinette Chatre wrote: > On 9/14/2018 1:32 PM, Fenghua Yu wrote: >> From: Reinette Chatre >> >> multiple resources are managed > > The above snippet is redundant. We can remove it in the next version. Apologies, I responded too fast. The su

Re: [PATCH 4/9] x86/intel_rdt: Fix invalid mode warning when

On 9/14/2018 1:32 PM, Fenghua Yu wrote: > From: Reinette Chatre > > multiple resources are managed The above snippet is redundant. We can remove it in the next version. Reinette

Re: [PATCH 4/9] x86/intel_rdt: Fix invalid mode warning when

On 9/14/2018 1:32 PM, Fenghua Yu wrote: > From: Reinette Chatre > > multiple resources are managed The above snippet is redundant. We can remove it in the next version. Reinette

[PATCH V4 4/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- V4: The kbuild test robot reported a build issue that at first seems to be related to "make ARCH=i386" but was actually a result of the kernel configuration used not having CONFIG_TRACEPOINTS set. The consequence was that include/linux/perf_event.h was

[PATCH V4 4/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- V4: The kbuild test robot reported a build issue that at first seems to be related to "make ARCH=i386" but was actually a result of the kernel configuration used not having CONFIG_TRACEPOINTS set. The consequence was that include/linux/perf_event.h was

[PATCH V3 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

the rework of the measurement function the L2 and L3 cache measurements are separated to avoid the additional code needed to decide on which measurement causing unrelated cache hits and misses. Your feedback on this work will be greatly appreciated. Reinette Reinette Chatre (6): perf/core: Add sanity che

[PATCH V3 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

the rework of the measurement function the L2 and L3 cache measurements are separated to avoid the additional code needed to decide on which measurement causing unrelated cache hits and misses. Your feedback on this work will be greatly appreciated. Reinette Reinette Chatre (6): perf/core: Add sanity che

[PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

with care to ensure it is queried and used within the same disabled interrupts section. Signed-off-by: Reinette Chatre --- include/linux/perf_event.h | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/include/linux/perf_event.h b/include/linux

[PATCH V3 2/6] perf/core: Add helper to obtain performance counter index

with care to ensure it is queried and used within the same disabled interrupts section. Signed-off-by: Reinette Chatre --- include/linux/perf_event.h | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/include/linux/perf_event.h b/include/linux

[PATCH V3 1/6] perf/core: Add sanity check to deal with pinned event failure

for and have a credible error. Link: http://lkml.kernel.org/r/20180807093615.gy2...@hirez.programming.kicks-ass.net Suggested-by: Peter Zijlstra Signed-off-by: Reinette Chatre --- kernel/events/core.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/kernel/events/core.c b/kernel/events

[PATCH V3 6/6] x86/intel_rdt: Re-enable pseudo-lock measurements

Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 5a294fe080d7..e2bd212f382f 100644 --- a/arch/x86/

[PATCH V3 1/6] perf/core: Add sanity check to deal with pinned event failure

for and have a credible error. Link: http://lkml.kernel.org/r/20180807093615.gy2...@hirez.programming.kicks-ass.net Suggested-by: Peter Zijlstra Signed-off-by: Reinette Chatre --- kernel/events/core.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/kernel/events/core.c b/kernel/events

[PATCH V3 6/6] x86/intel_rdt: Re-enable pseudo-lock measurements

Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 5a294fe080d7..e2bd212f382f 100644 --- a/arch/x86/

[PATCH V3 3/6] x86/intel_rdt: Remove local register variables

variables). Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 53 - 1 file changed, 9 insertions(+), 44 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 40f3903ae5d9

[PATCH V3 3/6] x86/intel_rdt: Remove local register variables

variables). Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 53 - 1 file changed, 9 insertions(+), 44 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 40f3903ae5d9

[PATCH V3 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 295 2 files changed, 194 insertions(+), 123 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

[PATCH V3 4/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 8ad83eb3fc89..2191623f1f27 100644 --- a/arch/x86

[PATCH V3 4/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 8ad83eb3fc89..2191623f1f27 100644 --- a/arch/x86

[PATCH V3 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 295 2 files changed, 194 insertions(+), 123 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

Re: [PATCH V2 4/6] x86/intel_rdt: Add helper to obtain performance counter index

Hi Peter, On 9/6/2018 7:47 AM, Peter Zijlstra wrote: > On Thu, Aug 16, 2018 at 01:16:07PM -0700, Reinette Chatre wrote: > >> +static inline int x86_perf_rdpmc_ctr_get(struct perf_event *event) >> +{ >> +lockdep_assert_irqs_disabled(); >> + >> +retur

Re: [PATCH V2 4/6] x86/intel_rdt: Add helper to obtain performance counter index

Hi Peter, On 9/6/2018 7:47 AM, Peter Zijlstra wrote: > On Thu, Aug 16, 2018 at 01:16:07PM -0700, Reinette Chatre wrote: > >> +static inline int x86_perf_rdpmc_ctr_get(struct perf_event *event) >> +{ >> +lockdep_assert_irqs_disabled(); >> + >> +retur

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

On 9/6/2018 1:29 PM, Peter Zijlstra wrote: > On Thu, Sep 06, 2018 at 01:05:05PM -0700, Reinette Chatre wrote: >> When I separate the above into the two functions it just becomes either: >>rdpmcl(l2_hit_pmcnum, l2_hits_after); >>

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

On 9/6/2018 1:29 PM, Peter Zijlstra wrote: > On Thu, Sep 06, 2018 at 01:05:05PM -0700, Reinette Chatre wrote: >> When I separate the above into the two functions it just becomes either: >>rdpmcl(l2_hit_pmcnum, l2_hits_after); >>

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/6/2018 12:44 PM, Peter Zijlstra wrote: > On Thu, Sep 06, 2018 at 12:21:59PM -0700, Reinette Chatre wrote: >> If you do have suggestions on how I can improve the implementation while >> maintaining (or improving) the accuracy of the measurements I would >&g

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/6/2018 12:44 PM, Peter Zijlstra wrote: > On Thu, Sep 06, 2018 at 12:21:59PM -0700, Reinette Chatre wrote: >> If you do have suggestions on how I can improve the implementation while >> maintaining (or improving) the accuracy of the measurements I would >&g

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/6/2018 7:15 AM, Peter Zijlstra wrote: > On Thu, Aug 16, 2018 at 01:16:08PM -0700, Reinette Chatre wrote: >> +l2_miss_event = perf_event_create_kernel_counter(_miss_attr, >> +

Re: [PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

Hi Peter, On 9/6/2018 7:15 AM, Peter Zijlstra wrote: > On Thu, Aug 16, 2018 at 01:16:08PM -0700, Reinette Chatre wrote: >> +l2_miss_event = perf_event_create_kernel_counter(_miss_attr, >> +

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

Hi Yu, On 9/4/2018 11:28 PM, Yu Chen wrote: > On Tue, Sep 04, 2018 at 03:36:01PM -0700, Reinette Chatre wrote: >> On 9/4/2018 1:24 PM, Reinette Chatre wrote: >>> On 9/4/2018 10:46 AM, Chen Yu wrote: >>>> On a platform with MB resource enabled, a divided-by-zero &g

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

Hi Yu, On 9/4/2018 11:28 PM, Yu Chen wrote: > On Tue, Sep 04, 2018 at 03:36:01PM -0700, Reinette Chatre wrote: >> On 9/4/2018 1:24 PM, Reinette Chatre wrote: >>> On 9/4/2018 10:46 AM, Chen Yu wrote: >>>> On a platform with MB resource enabled, a divided-by-zero &g

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

Hi Chen Yu, On 9/4/2018 1:24 PM, Reinette Chatre wrote: > On 9/4/2018 10:46 AM, Chen Yu wrote: >> On a platform with MB resource enabled, a divided-by-zero >> exception is triggered when accessing 'size': >> >> [ 151.193447] divide error: [#1] SMP PTI >>

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

Hi Chen Yu, On 9/4/2018 1:24 PM, Reinette Chatre wrote: > On 9/4/2018 10:46 AM, Chen Yu wrote: >> On a platform with MB resource enabled, a divided-by-zero >> exception is triggered when accessing 'size': >> >> [ 151.193447] divide error: [#1] SMP PTI >>

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

entry_SYSCALL_64_after_hwframe+0x44/0xa9 > > This is because for MB resource, the r->cache.cbm_len is zero, thus > calculating size in rdtgroup_cbm_to_size() will trigger the exception. > > Fix this issue by not exposing 'size' for non-CAT resources. > > Fixes: d9b48c86eb38

Re: [PATCH][RFC] x86/intel_rdt: Do not display size for non-CAT resource

entry_SYSCALL_64_after_hwframe+0x44/0xa9 > > This is because for MB resource, the r->cache.cbm_len is zero, thus > calculating size in rdtgroup_cbm_to_size() will trigger the exception. > > Fix this issue by not exposing 'size' for non-CAT resources. > > Fixes: d9b48c86eb38

Re: [PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

not exist in earlier kernels. Patch 1 was suggested by Peter and is a fix to perf. Your consideration would be greatly appreciated. Thank you Reinette On 8/16/2018 1:16 PM, Reinette Chatre wrote: > Dear Maintainers, > > This is the second attempt at fixing the lack of coordination b

Re: [PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

not exist in earlier kernels. Patch 1 was suggested by Peter and is a fix to perf. Your consideration would be greatly appreciated. Thank you Reinette On 8/16/2018 1:16 PM, Reinette Chatre wrote: > Dear Maintainers, > > This is the second attempt at fixing the lack of coordination b

[PATCH V2 6/6] x86/intel_rdt: Re-enable pseudo-lock measurements

also separated the L2 and L3 measurements that can be triggered separately from user space. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86

[PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 342 ++-- 2 files changed, 258 insertions(+), 106 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

[PATCH V2 6/6] x86/intel_rdt: Re-enable pseudo-lock measurements

also separated the L2 and L3 measurements that can be triggered separately from user space. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86

[PATCH V2 5/6] x86/intel_rdt: Use perf infrastructure for measurements

. Signed-off-by: Reinette Chatre --- Documentation/x86/intel_rdt_ui.txt | 22 +- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 342 ++-- 2 files changed, 258 insertions(+), 106 deletions(-) diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86

[PATCH V2 4/6] x86/intel_rdt: Add helper to obtain performance counter index

-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index ab93079e9e5b..20b76024701d 100644 --- a/arch/x86/kernel/cpu

[PATCH V2 4/6] x86/intel_rdt: Add helper to obtain performance counter index

-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index ab93079e9e5b..20b76024701d 100644 --- a/arch/x86/kernel/cpu

[PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

ved to use the in-kernel interface to perf. During the rework of the measurement function the L2 and L3 cache measurements are separated to avoid the additional code needed to decide on which measurement causing unrelated cache hits and misses. Your feedback on this work will be greatly appreciated. Reinette

[PATCH V2 0/6] perf/core and x86/intel_rdt: Fix lack of coordination with perf

ved to use the in-kernel interface to perf. During the rework of the measurement function the L2 and L3 cache measurements are separated to avoid the additional code needed to decide on which measurement causing unrelated cache hits and misses. Your feedback on this work will be greatly appreciated. Reinette

[PATCH V2 1/6] perf/core: Add sanity check to deal with pinned event failure

for and have a credible error. Link: http://lkml.kernel.org/r/20180807093615.gy2...@hirez.programming.kicks-ass.net Suggested-by: Peter Zijlstra Signed-off-by: Reinette Chatre --- kernel/events/core.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/kernel/events/core.c b/kernel/events

[PATCH V2 1/6] perf/core: Add sanity check to deal with pinned event failure

for and have a credible error. Link: http://lkml.kernel.org/r/20180807093615.gy2...@hirez.programming.kicks-ass.net Suggested-by: Peter Zijlstra Signed-off-by: Reinette Chatre --- kernel/events/core.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/kernel/events/core.c b/kernel/events

[PATCH V2 2/6] x86/intel_rdt: Remove local register variables

the measurement. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 39 +++-- 1 file changed, 4 insertions(+), 35 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 40f3903ae5d9..f46c8afe7875

[PATCH V2 3/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index f46c8afe7875..ab93079e9e5b 100644 --- a/arch/x86

[PATCH V2 2/6] x86/intel_rdt: Remove local register variables

the measurement. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 39 +++-- 1 file changed, 4 insertions(+), 35 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index 40f3903ae5d9..f46c8afe7875

[PATCH V2 3/6] x86/intel_rdt: Create required perf event attributes

. Signed-off-by: Reinette Chatre --- arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 25 + 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c index f46c8afe7875..ab93079e9e5b 100644 --- a/arch/x86

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Just one clarification ... On 8/10/2018 9:25 AM, Reinette Chatre wrote: > static inline int x86_perf_event_error_state(struct perf_event *event) > { > int ret = 0; > u64 tmp; > > ret = perf_event_read_local(event, , NULL, NULL); >

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Just one clarification ... On 8/10/2018 9:25 AM, Reinette Chatre wrote: > static inline int x86_perf_event_error_state(struct perf_event *event) > { > int ret = 0; > u64 tmp; > > ret = perf_event_read_local(event, , NULL, NULL); >

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/8/2018 10:33 AM, Reinette Chatre wrote: > On 8/8/2018 12:51 AM, Peter Zijlstra wrote: >> On Tue, Aug 07, 2018 at 03:47:15PM -0700, Reinette Chatre wrote: >>>> - I don't much fancy people accessing the guts of events like that; >>>>

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/8/2018 10:33 AM, Reinette Chatre wrote: > On 8/8/2018 12:51 AM, Peter Zijlstra wrote: >> On Tue, Aug 07, 2018 at 03:47:15PM -0700, Reinette Chatre wrote: >>>> - I don't much fancy people accessing the guts of events like that; >>>>

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter and Tony, On 8/8/2018 12:51 AM, Peter Zijlstra wrote: > On Tue, Aug 07, 2018 at 03:47:15PM -0700, Reinette Chatre wrote: >>> FWIW, how long is that IRQ disabled section? It looks like something >>> that could be taking a bit of time. We have these people that care

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter and Tony, On 8/8/2018 12:51 AM, Peter Zijlstra wrote: > On Tue, Aug 07, 2018 at 03:47:15PM -0700, Reinette Chatre wrote: >>> FWIW, how long is that IRQ disabled section? It looks like something >>> that could be taking a bit of time. We have these people that care

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

On 8/8/2018 9:47 AM, Peter Zijlstra wrote: > On Wed, Aug 08, 2018 at 03:55:54PM +, Luck, Tony wrote: >>> So _why_ doesn't this work? As said by Tony, that first call should >>> prime the caches, so the second and third calls should not generate any >>> misses. >> >> How much code/data is

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

On 8/8/2018 9:47 AM, Peter Zijlstra wrote: > On Wed, Aug 08, 2018 at 03:55:54PM +, Luck, Tony wrote: >>> So _why_ doesn't this work? As said by Tony, that first call should >>> prime the caches, so the second and third calls should not generate any >>> misses. >> >> How much code/data is

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Tony, On 8/7/2018 6:28 PM, Luck, Tony wrote: > Would it help to call routines to read the "before" values of the counter > twice. The first time to preload the cache with anything needed to execute > the perf code path. >>> In an attempt to improve the accuracy of the above I modified it to

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Tony, On 8/7/2018 6:28 PM, Luck, Tony wrote: > Would it help to call routines to read the "before" values of the counter > twice. The first time to preload the cache with anything needed to execute > the perf code path. >>> In an attempt to improve the accuracy of the above I modified it to

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/6/2018 3:12 PM, Peter Zijlstra wrote: > On Mon, Aug 06, 2018 at 12:50:50PM -0700, Reinette Chatre wrote: >> In my previous email I provided the details of the Cache Pseudo-Locking >> feature implemented on top of resctrl. Please let me know if you would >>

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/6/2018 3:12 PM, Peter Zijlstra wrote: > On Mon, Aug 06, 2018 at 12:50:50PM -0700, Reinette Chatre wrote: >> In my previous email I provided the details of the Cache Pseudo-Locking >> feature implemented on top of resctrl. Please let me know if you would >>

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 11:37 AM, Reinette Chatre wrote: > On 8/3/2018 8:25 AM, Peter Zijlstra wrote: >> On Fri, Aug 03, 2018 at 08:18:09AM -0700, Reinette Chatre wrote: >>> You state that you understand what we are trying to do and I hope that I >>> convinced you that we

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 11:37 AM, Reinette Chatre wrote: > On 8/3/2018 8:25 AM, Peter Zijlstra wrote: >> On Fri, Aug 03, 2018 at 08:18:09AM -0700, Reinette Chatre wrote: >>> You state that you understand what we are trying to do and I hope that I >>> convinced you that we

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 8:25 AM, Peter Zijlstra wrote: > On Fri, Aug 03, 2018 at 08:18:09AM -0700, Reinette Chatre wrote: >> You state that you understand what we are trying to do and I hope that I >> convinced you that we are not able to accomplish the same by following &

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 8:25 AM, Peter Zijlstra wrote: > On Fri, Aug 03, 2018 at 08:18:09AM -0700, Reinette Chatre wrote: >> You state that you understand what we are trying to do and I hope that I >> convinced you that we are not able to accomplish the same by following &

Re: [RFC PATCH 0/7] x86/intel_rdt: Restoration of Cache Pseudo-Locked regions

Hi Thomas, On 8/3/2018 4:45 AM, Thomas Gleixner wrote: > On Tue, 24 Jul 2018, Reinette Chatre wrote: >> A Cache Pseudo-Locked region is vulnerable to certain instructions (INVD, >> WBINVD, CLFLUSH) or deeper C-states (that could shrink or power off the >> cache) evicting the

Re: [RFC PATCH 0/7] x86/intel_rdt: Restoration of Cache Pseudo-Locked regions

Hi Thomas, On 8/3/2018 4:45 AM, Thomas Gleixner wrote: > On Tue, 24 Jul 2018, Reinette Chatre wrote: >> A Cache Pseudo-Locked region is vulnerable to certain instructions (INVD, >> WBINVD, CLFLUSH) or deeper C-states (that could shrink or power off the >> cache) evicting the

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 3:49 AM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 01:43:42PM -0700, Reinette Chatre wrote: > >> The goal of this work is to use the existing PMU hardware coordination >> mechanism to ensure that perf and resctrl will not interfere with eac

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/3/2018 3:49 AM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 01:43:42PM -0700, Reinette Chatre wrote: > >> The goal of this work is to use the existing PMU hardware coordination >> mechanism to ensure that perf and resctrl will not interfere with eac

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/2/2018 1:13 PM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 01:06:19PM -0700, Dave Hansen wrote: >> On 08/02/2018 12:54 PM, Peter Zijlstra wrote: I totally understand not wanting to fill the tree with code hijacking the raw PMU. Is your reaction to this really around

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

Hi Peter, On 8/2/2018 1:13 PM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 01:06:19PM -0700, Dave Hansen wrote: >> On 08/02/2018 12:54 PM, Peter Zijlstra wrote: I totally understand not wanting to fill the tree with code hijacking the raw PMU. Is your reaction to this really around

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

On 8/2/2018 9:18 AM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 09:14:10AM -0700, Reinette Chatre wrote: > >> The current implementation does not coordinate with perf and this is >> what I am trying to fix in this series. >> >> I do respect your NAK but it is

Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf

On 8/2/2018 9:18 AM, Peter Zijlstra wrote: > On Thu, Aug 02, 2018 at 09:14:10AM -0700, Reinette Chatre wrote: > >> The current implementation does not coordinate with perf and this is >> what I am trying to fix in this series. >> >> I do respect your NAK but it is

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