[PATCH v7 22/26] x86/umip: Force a page fault when unable to copy emulated result to user

2017-05-05 Thread Ricardo Neri
> Cc: Vlastimil Babka <vba...@suse.cz> Cc: Tony Luck <tony.l...@intel.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Liang Z. Li <liang.z...@intel.com> Cc: Alexandre Julliard <julli...@winehq.org> Cc: Stas Sergeev <s...@list.ru> Cc: x...@kerne

[PATCH v7 22/26] x86/umip: Force a page fault when unable to copy emulated result to user

2017-05-05 Thread Ricardo Neri
...@vger.kernel.org Signed-off-by: Ricardo Neri --- arch/x86/kernel/umip.c | 45 +++-- 1 file changed, 43 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/umip.c b/arch/x86/kernel/umip.c index c7c5795..ff7366a 100644 --- a/arch/x86/kernel/umip.c +++ b/arch

[PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b

2017-05-05 Thread Ricardo Neri
: Peter Zijlstra <pet...@infradead.org> Cc: Nathan Howard <liverl...@gmail.com> Cc: Adan Hawthorn <adanhawth...@gmail.com> Cc: Joe Perches <j...@perches.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde..

[PATCH v7 04/26] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b

2017-05-05 Thread Ricardo Neri
: Dave Hansen Cc: Adam Buchbinder Cc: Colin Ian King Cc: Lorenzo Stoakes Cc: Qiaowei Ren Cc: Peter Zijlstra Cc: Nathan Howard Cc: Adan Hawthorn Cc: Joe Perches Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/mm/mpx.c | 20 ++-- 1 file

[PATCH v7 07/26] x86/insn-eval: Do not BUG on invalid register type

2017-05-05 Thread Ricardo Neri
<pet...@infradead.org> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/lib/insn-eval.c | 6 +++--- 1 file changed, 3 insertions(+), 3 delet

[PATCH v7 15/26] x86/insn-eval: Incorporate segment base and limit in linear address computation

2017-05-05 Thread Ricardo Neri
Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/lib/insn-eval.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff

[PATCH v7 07/26] x86/insn-eval: Do not BUG on invalid register type

2017-05-05 Thread Ricardo Neri
Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c index e746a6f..182e2ae 100644 --- a/arch/x86/lib/insn-eval.c +++ b/arch/x86/lib/insn-eval.c

[PATCH v7 15/26] x86/insn-eval: Incorporate segment base and limit in linear address computation

2017-05-05 Thread Ricardo Neri
...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c index 4f600de..1a5f5a6 100644 --- a/arch/x86/lib/insn-eval.c +++ b/arch/x86/lib

[PATCH v7 11/26] x86/insn-eval: Add utility function to get segment descriptor

2017-05-05 Thread Ricardo Neri
v <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/lib/insn-eval.c | 55 1

[PATCH v7 11/26] x86/insn-eval: Add utility function to get segment descriptor

2017-05-05 Thread Ricardo Neri
Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 55 1 file changed, 55 insertions(+) diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c index 0a496f4..f46cb31 100644 --- a/arch/x86

[PATCH v7 09/26] x86/insn-eval: Add utility function to identify string instructions

2017-05-05 Thread Ricardo Neri
adrian.hun...@intel.com> Cc: Kees Cook <keesc...@chromium.org> Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc

[PATCH v7 06/26] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file

2017-05-05 Thread Ricardo Neri
g> Cc: Adrian Hunter <adrian.hun...@intel.com> Cc: Kees Cook <keesc...@chromium.org> Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x..

[PATCH v7 09/26] x86/insn-eval: Add utility function to identify string instructions

2017-05-05 Thread Ricardo Neri
: Qiaowei Ren Cc: Arnaldo Carvalho de Melo Cc: Masami Hiramatsu Cc: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 67

[PATCH v7 06/26] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file

2017-05-05 Thread Ricardo Neri
Cc: Arnaldo Carvalho de Melo Cc: Masami Hiramatsu Cc: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/insn-eval.h | 16 arch/x86/lib/Make

[PATCH v7 10/26] x86/insn-eval: Add utility functions to get segment selector

2017-05-05 Thread Ricardo Neri
tel.com> Cc: Kees Cook <keesc...@chromium.org> Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kern

[PATCH v7 10/26] x86/insn-eval: Add utility functions to get segment selector

2017-05-05 Thread Ricardo Neri
Cc: Arnaldo Carvalho de Melo Cc: Masami Hiramatsu Cc: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 256

[PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment

2017-05-05 Thread Ricardo Neri
gt; Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde

[PATCH v7 13/26] x86/insn-eval: Add function to get default params of code segment

2017-05-05 Thread Ricardo Neri
: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/insn-eval.h | 6 arch/x86/lib/insn-eval.c | 65

[PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5

2017-05-05 Thread Ricardo Neri
r...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com>

[PATCH v7 24/26] x86: Enable User-Mode Instruction Prevention

2017-05-05 Thread Ricardo Neri
Julliard <julli...@winehq.org> Cc: Stas Sergeev <s...@list.ru> Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/Kconfig | 10 ++ arch/x86/kernel/cpu/common.c | 16 +++-

[PATCH v7 12/26] x86/insn-eval: Add utility functions to get segment descriptor base address and limit

2017-05-05 Thread Ricardo Neri
rislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/include/asm/insn-eval.h | 2 + arch/x86/lib/insn-eva

[PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5

2017-05-05 Thread Ricardo Neri
Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 22 -- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/x86/lib/insn

[PATCH v7 24/26] x86: Enable User-Mode Instruction Prevention

2017-05-05 Thread Ricardo Neri
Bonzini Cc: Liang Z. Li Cc: Alexandre Julliard Cc: Stas Sergeev Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Signed-off-by: Ricardo Neri --- arch/x86/Kconfig | 10 ++ arch/x86/kernel/cpu/common.c | 16 +++- 2 files changed, 25 insertions(+), 1 deletion

[PATCH v7 12/26] x86/insn-eval: Add utility functions to get segment descriptor base address and limit

2017-05-05 Thread Ricardo Neri
: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/insn-eval.h | 2 + arch/x86/lib/insn-eval.c | 127 +++ 2 files changed, 129 insertions(+) diff --git a/arch/x86/include/asm/insn-eval.h b/arch

[PATCH v7 26/26] selftests/x86: Add tests for instruction str and sldt

2017-05-05 Thread Ricardo Neri
; Cc: Paul Gortmaker <paul.gortma...@windriver.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: Shuah Khan <sh...@kernel.org> Cc: Vlastimil Babka <vba...@suse.cz> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.co

[PATCH v7 25/26] selftests/x86: Add tests for User-Mode Instruction Prevention

2017-05-05 Thread Ricardo Neri
: Jiri Slaby <jsl...@suse.cz> Cc: Jonathan Corbet <cor...@lwn.net> Cc: Michael S. Tsirkin <m...@redhat.com> Cc: Paul Gortmaker <paul.gortma...@windriver.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: Shuah Khan <sh.

[PATCH v7 26/26] selftests/x86: Add tests for instruction str and sldt

2017-05-05 Thread Ricardo Neri
Cc: Peter Zijlstra Cc: Ravi V. Shankar Cc: Shuah Khan Cc: Vlastimil Babka Signed-off-by: Ricardo Neri --- tools/testing/selftests/x86/entry_from_vm86.c | 18 +- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/x86/entry_from_vm86.c b/to

[PATCH v7 25/26] selftests/x86: Add tests for User-Mode Instruction Prevention

2017-05-05 Thread Ricardo Neri
Cc: Dave Hansen Cc: Fenghua Yu Cc: Huang Rui Cc: Jiri Slaby Cc: Jonathan Corbet Cc: Michael S. Tsirkin Cc: Paul Gortmaker Cc: Peter Zijlstra Cc: Ravi V. Shankar Cc: Shuah Khan Cc: Vlastimil Babka Signed-off-by: Ricardo Neri --- tools/testing/selftests/x86/entry_from_vm86.c | 73

[PATCH v7 17/26] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode

2017-05-05 Thread Ricardo Neri
..@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/lib/insn-eval.c | 10 ++ 1

[PATCH v7 16/26] x86/insn-eval: Support both signed 32-bit and 64-bit effective addresses

2017-05-05 Thread Ricardo Neri
Cook <keesc...@chromium.org> Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed

[PATCH v7 23/26] x86/traps: Fixup general protection faults caused by UMIP

2017-05-05 Thread Ricardo Neri
; Cc: Liang Z. Li <liang.z...@intel.com> Cc: Alexandre Julliard <julli...@winehq.org> Cc: Stas Sergeev <s...@list.ru> Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Reviewed-by: Andy Lutomirski <l...@kernel.org> Signed-off-by: Ricardo Neri <ricardo.neri-calde...@l

[PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions

2017-05-05 Thread Ricardo Neri
.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Liang Z. Li <liang.z...@intel.com> Cc: Alexandre Julliard <julli...@winehq.org> Cc: Stas Sergeev <s...@list.ru> Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.

[PATCH v7 17/26] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode

2017-05-05 Thread Ricardo Neri
: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c index c7c1239..9822061 100644 --- a/arch/x86/lib

[PATCH v7 16/26] x86/insn-eval: Support both signed 32-bit and 64-bit effective addresses

2017-05-05 Thread Ricardo Neri
Carvalho de Melo Cc: Masami Hiramatsu Cc: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/lib/insn-eval.c | 99

[PATCH v7 23/26] x86/traps: Fixup general protection faults caused by UMIP

2017-05-05 Thread Ricardo Neri
kar Cc: Shuah Khan Cc: Vlastimil Babka Cc: Tony Luck Cc: Paolo Bonzini Cc: Liang Z. Li Cc: Alexandre Julliard Cc: Stas Sergeev Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Reviewed-by: Andy Lutomirski Signed-off-by: Ricardo Neri --- arch/x86/kernel/traps.c | 4 1 file changed

[PATCH v7 20/26] x86/cpufeature: Add User-Mode Instruction Prevention definitions

2017-05-05 Thread Ricardo Neri
aul Gortmaker Cc: Peter Zijlstra Cc: Ravi V. Shankar Cc: Shuah Khan Cc: Vlastimil Babka Cc: Tony Luck Cc: Paolo Bonzini Cc: Liang Z. Li Cc: Alexandre Julliard Cc: Stas Sergeev Cc: x...@kernel.org Cc: linux-ms...@vger.kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/cpufeature

[PATCH v7 03/26] x86/mpx: Use signed variables to compute effective addresses

2017-05-05 Thread Ricardo Neri
t;liverl...@gmail.com> Cc: Adan Hawthorn <adanhawth...@gmail.com> Cc: Joe Perches <j...@perches.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Signed-off-by: Ricardo Neri <ricardo.neri-calde...@linux.intel.com> --- arch/x86/mm/mpx.c | 15 +---

[PATCH v7 01/26] ptrace,x86: Make user_64bit_mode() available to 32-bit builds

2017-05-05 Thread Ricardo Neri
: Kees Cook <keesc...@chromium.org> Cc: Thomas Garnier <thgar...@google.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Borislav Petkov <b...@suse.de> Cc: Dmitry Vyukov <dvyu...@google.com> Cc: Ravi V. Shankar <ravi.v.shan...@intel.com> Cc: x...@kernel.org Sig

[PATCH v7 03/26] x86/mpx: Use signed variables to compute effective addresses

2017-05-05 Thread Ricardo Neri
: Lorenzo Stoakes Cc: Qiaowei Ren Cc: Peter Zijlstra Cc: Nathan Howard Cc: Adan Hawthorn Cc: Joe Perches Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/mm/mpx.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/x86/mm/mpx.c b

[PATCH v7 01/26] ptrace,x86: Make user_64bit_mode() available to 32-bit builds

2017-05-05 Thread Ricardo Neri
: Masami Hiramatsu Cc: Adrian Hunter Cc: Kees Cook Cc: Thomas Garnier Cc: Peter Zijlstra Cc: Borislav Petkov Cc: Dmitry Vyukov Cc: Ravi V. Shankar Cc: x...@kernel.org Signed-off-by: Ricardo Neri --- arch/x86/include/asm/ptrace.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff

Re: [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0

2017-04-27 Thread Ricardo Neri
On Wed, 2017-04-26 at 10:05 +0200, Borislav Petkov wrote: > On Tue, Apr 25, 2017 at 07:04:20PM -0700, Ricardo Neri wrote: > > For the specific case of ModRM.mod being 0, I feel I need to clarify > > that REX.B is not decoded and if SIB.base is %r13 the base is also 0. > > W

Re: [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0

2017-04-27 Thread Ricardo Neri
On Wed, 2017-04-26 at 10:05 +0200, Borislav Petkov wrote: > On Tue, Apr 25, 2017 at 07:04:20PM -0700, Ricardo Neri wrote: > > For the specific case of ModRM.mod being 0, I feel I need to clarify > > that REX.B is not decoded and if SIB.base is %r13 the base is also 0. > > W

Re: [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses

2017-04-26 Thread Ricardo Neri
On Tue, 2017-04-25 at 15:51 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:45PM -0800, Ricardo Neri wrote: > > The 32-bit and 64-bit address encodings are identical. This means that we > > can use the same function in both cases. In order to reuse the function for >

Re: [v6 PATCH 12/21] x86/insn: Support both signed 32-bit and 64-bit effective addresses

2017-04-26 Thread Ricardo Neri
On Tue, 2017-04-25 at 15:51 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:45PM -0800, Ricardo Neri wrote: > > The 32-bit and 64-bit address encodings are identical. This means that we > > can use the same function in both cases. In order to reuse the function for >

Re: [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation

2017-04-26 Thread Ricardo Neri
On Fri, 2017-04-21 at 16:55 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:44PM -0800, Ricardo Neri wrote: > > insn_get_addr_ref returns the effective address as defined by the > > Please end function names with parentheses. Will do. > > > section 3.7.5

Re: [v6 PATCH 11/21] insn/eval: Incorporate segment base in address computation

2017-04-26 Thread Ricardo Neri
On Fri, 2017-04-21 at 16:55 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:44PM -0800, Ricardo Neri wrote: > > insn_get_addr_ref returns the effective address as defined by the > > Please end function names with parentheses. Will do. > > > section 3.7.5

Re: [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero

2017-04-26 Thread Ricardo Neri
On Fri, 2017-04-21 at 12:52 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:43PM -0800, Ricardo Neri wrote: > > Section 2.2.1.3 of the Intel 64 and IA-32 Architectures Software > > Developer's Manual volume 2A states that when the mod part of the ModRM > > b

Re: [v6 PATCH 10/21] x86/insn-eval: Do not use R/EBP as base if mod in ModRM is zero

2017-04-26 Thread Ricardo Neri
On Fri, 2017-04-21 at 12:52 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:43PM -0800, Ricardo Neri wrote: > > Section 2.2.1.3 of the Intel 64 and IA-32 Architectures Software > > Developer's Manual volume 2A states that when the mod part of the ModRM > > b

Re: [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 15:06 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:42PM -0800, Ricardo Neri wrote: > > These functions read the default values of the address and operand sizes > > as specified in the segment descriptor. This information is determined >

Re: [v6 PATCH 09/21] x86/insn-eval: Add functions to get default operand and address sizes

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 15:06 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:42PM -0800, Ricardo Neri wrote: > > These functions read the default values of the address and operand sizes > > as specified in the segment descriptor. This information is determined >

Re: [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 10:25 +0200, Borislav Petkov wrote: > > + * insn_get_seg_base() - Obtain base address contained in > descriptor > > + * @regs:Set of registers containing the segment selector > > + * @insn:Instruction structure with selector override prefixes > > + * @regoff: Operand

Re: [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 10:25 +0200, Borislav Petkov wrote: > > + * insn_get_seg_base() - Obtain base address contained in > descriptor > > + * @regs:Set of registers containing the segment selector > > + * @insn:Instruction structure with selector override prefixes > > + * @regoff: Operand

Re: [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 10:25 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:41PM -0800, Ricardo Neri wrote: > > With segmentation, the base address of the segment descriptor is needed > > to compute a linear address. The segment descriptor used in the address > >

Re: [v6 PATCH 08/21] x86/insn-eval: Add utility function to get segment descriptor base address

2017-04-26 Thread Ricardo Neri
On Thu, 2017-04-20 at 10:25 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:41PM -0800, Ricardo Neri wrote: > > With segmentation, the base address of the segment descriptor is needed > > to compute a linear address. The segment descriptor used in the address > >

Re: [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-19 at 12:26 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:40PM -0800, Ricardo Neri wrote: > > The segment descriptor contains information that is relevant to how linear > > address need to be computed. It contains the default size of addres

Re: [v6 PATCH 07/21] x86/insn-eval: Add utility function to get segment descriptor

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-19 at 12:26 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:40PM -0800, Ricardo Neri wrote: > > The segment descriptor contains information that is relevant to how linear > > address need to be computed. It contains the default size of addres

Re: [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-26 at 13:44 -0700, Ricardo Neri wrote: > > > > > +*/ > > > + for (i = 0; i < insn->prefixes.nbytes; i++) { > > > + switch (insn->prefixes.bytes[i]) { > > > + case SEG_CS: > > > +

Re: [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-26 at 13:44 -0700, Ricardo Neri wrote: > > > > > +*/ > > > + for (i = 0; i < insn->prefixes.nbytes; i++) { > > > + switch (insn->prefixes.bytes[i]) { > > > + case SEG_CS: > > > +

Re: [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector

2017-04-26 Thread Ricardo Neri
On Tue, 2017-04-18 at 11:42 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:39PM -0800, Ricardo Neri wrote: > > When computing a linear address and segmentation is used, we need to know > > the base address of the segment involved in the computation. In most o

Re: [v6 PATCH 06/21] x86/insn-eval: Add utility functions to get segment selector

2017-04-26 Thread Ricardo Neri
On Tue, 2017-04-18 at 11:42 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:39PM -0800, Ricardo Neri wrote: > > When computing a linear address and segmentation is used, we need to know > > the base address of the segment involved in the computation. In most o

Re: [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-12 at 18:28 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:38PM -0800, Ricardo Neri wrote: > > The function insn_get_reg_offset takes as argument an enumeration that > > Please end function names with parentheses. Will do! > > And do yo

Re: [v6 PATCH 05/21] x86/insn-eval: Add utility functions to get register offsets

2017-04-26 Thread Ricardo Neri
On Wed, 2017-04-12 at 18:28 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:38PM -0800, Ricardo Neri wrote: > > The function insn_get_reg_offset takes as argument an enumeration that > > Please end function names with parentheses. Will do! > > And do yo

Re: [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel

2017-04-25 Thread Ricardo Neri
On Wed, 2017-04-12 at 12:03 +0200, Borislav Petkov wrote: > > + * If mod is 0 and register R/EBP (regno=5) is > indicated in the > > + * base part of the SIB byte, the value of such > register should > > + * not be used in the address computation. Also, a >

Re: [v6 PATCH 04/21] x86/mpx, x86/insn: Relocate insn util functions to a new insn-kernel

2017-04-25 Thread Ricardo Neri
On Wed, 2017-04-12 at 12:03 +0200, Borislav Petkov wrote: > > + * If mod is 0 and register R/EBP (regno=5) is > indicated in the > > + * base part of the SIB byte, the value of such > register should > > + * not be used in the address computation. Also, a >

Re: [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0

2017-04-25 Thread Ricardo Neri
On Wed, 2017-04-12 at 00:08 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:36PM -0800, Ricardo Neri wrote: > > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > > Developer's Manual volume 2A states that when a SIB byte is used and the > >

Re: [v6 PATCH 03/21] x86/mpx: Do not use R/EBP as base in the SIB byte with Mod = 0

2017-04-25 Thread Ricardo Neri
On Wed, 2017-04-12 at 00:08 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:36PM -0800, Ricardo Neri wrote: > > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > > Developer's Manual volume 2A states that when a SIB byte is used and the > >

Re: [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses

2017-04-25 Thread Ricardo Neri
On Tue, 2017-04-11 at 23:56 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:34PM -0800, Ricardo Neri wrote: > > Even though memory addresses are unsigned. The operands used to compute the > > ... unsigned, the operands ... Oops! I will correct.

Re: [v6 PATCH 01/21] x86/mpx: Use signed variables to compute effective addresses

2017-04-25 Thread Ricardo Neri
On Tue, 2017-04-11 at 23:56 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:34PM -0800, Ricardo Neri wrote: > > Even though memory addresses are unsigned. The operands used to compute the > > ... unsigned, the operands ... Oops! I will correct.

Re: [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP

2017-04-25 Thread Ricardo Neri
Hi Boris, I am sorry I missed your feedback earlier. Thanks for commenting! On Tue, 2017-04-11 at 13:31 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:35PM -0800, Ricardo Neri wrote: > > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > > Developer'

Re: [v6 PATCH 02/21] x86/mpx: Do not use SIB index if index points to R/ESP

2017-04-25 Thread Ricardo Neri
Hi Boris, I am sorry I missed your feedback earlier. Thanks for commenting! On Tue, 2017-04-11 at 13:31 +0200, Borislav Petkov wrote: > On Tue, Mar 07, 2017 at 04:32:35PM -0800, Ricardo Neri wrote: > > Section 2.2.1.2 of the Intel 64 and IA-32 Architectures Software > > Developer'

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-04-03 Thread Ricardo Neri
On Sat, 2017-04-01 at 16:08 +0300, Stas Sergeev wrote: > 30.03.2017 08:14, Ricardo Neri пишет: > >>>>>> You know the wine's > >>>>>> requirements now - they are very small. And > >>>>>> dosemu doesn't need anything at all bu

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-04-03 Thread Ricardo Neri
On Sat, 2017-04-01 at 16:08 +0300, Stas Sergeev wrote: > 30.03.2017 08:14, Ricardo Neri пишет: > >>>>>> You know the wine's > >>>>>> requirements now - they are very small. And > >>>>>> dosemu doesn't need anything at all bu

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-04-03 Thread Ricardo Neri
On Fri, 2017-03-31 at 16:11 +0200, Alexandre Julliard wrote: > Ricardo Neri <ricardo.neri-calde...@linux.intel.com> writes: > > > On Thu, 2017-03-30 at 13:10 +0300, Stas Sergeev wrote: > >> 30.03.2017 08:14, Ricardo Neri пишет: > >> >>>> But at leas

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-04-03 Thread Ricardo Neri
On Fri, 2017-03-31 at 16:11 +0200, Alexandre Julliard wrote: > Ricardo Neri writes: > > > On Thu, 2017-03-30 at 13:10 +0300, Stas Sergeev wrote: > >> 30.03.2017 08:14, Ricardo Neri пишет: > >> >>>> But at least dosemu implements it

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-30 Thread Ricardo Neri
On Thu, 2017-03-30 at 13:10 +0300, Stas Sergeev wrote: > 30.03.2017 08:14, Ricardo Neri пишет: > >>>> But at least dosemu implements it, so probably it is needed. > >>> Right. > >>> > >>>> Of course if it is used by one of 100 DOS prog

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-30 Thread Ricardo Neri
On Thu, 2017-03-30 at 13:10 +0300, Stas Sergeev wrote: > 30.03.2017 08:14, Ricardo Neri пишет: > >>>> But at least dosemu implements it, so probably it is needed. > >>> Right. > >>> > >>>> Of course if it is used by one of 100 DOS prog

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-29 Thread Ricardo Neri
On Wed, 2017-03-29 at 23:55 +0300, Stas Sergeev wrote: > 29.03.2017 07:38, Ricardo Neri пишет: > >> Probably you could also remove > >> the sldt and str emulation for protected mode, because, > >> as I understand from this thread, wine does not > >> need th

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-29 Thread Ricardo Neri
On Wed, 2017-03-29 at 23:55 +0300, Stas Sergeev wrote: > 29.03.2017 07:38, Ricardo Neri пишет: > >> Probably you could also remove > >> the sldt and str emulation for protected mode, because, > >> as I understand from this thread, wine does not > >> need th

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-28 Thread Ricardo Neri
On Tue, 2017-03-28 at 12:38 +0300, Stas Sergeev wrote: > 28.03.2017 02:46, Ricardo Neri пишет: > > On Tue, 2017-03-14 at 00:25 +0300, Stas Sergeev wrote: > >> 11.03.2017 02:59, Ricardo Neri пишет: > >>> On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: >

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-28 Thread Ricardo Neri
On Tue, 2017-03-28 at 12:38 +0300, Stas Sergeev wrote: > 28.03.2017 02:46, Ricardo Neri пишет: > > On Tue, 2017-03-14 at 00:25 +0300, Stas Sergeev wrote: > >> 11.03.2017 02:59, Ricardo Neri пишет: > >>> On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: >

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-27 Thread Ricardo Neri
On Tue, 2017-03-14 at 00:25 +0300, Stas Sergeev wrote: > 11.03.2017 02:59, Ricardo Neri пишет: > > On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: > > > >> Why would you need one? > >> Or do you really want to allow these instructions > >&g

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-27 Thread Ricardo Neri
On Tue, 2017-03-14 at 00:25 +0300, Stas Sergeev wrote: > 11.03.2017 02:59, Ricardo Neri пишет: > > On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: > > > >> Why would you need one? > >> Or do you really want to allow these instructions > >&g

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 06:17 -0800, Andy Lutomirski wrote: > On Fri, Mar 10, 2017 at 3:33 AM, Stas Sergeev <s...@list.ru> wrote: > > 10.03.2017 05:39, Andy Lutomirski пишет: > > > >> On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev <s...@list.ru> wrote: > >>

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 06:17 -0800, Andy Lutomirski wrote: > On Fri, Mar 10, 2017 at 3:33 AM, Stas Sergeev wrote: > > 10.03.2017 05:39, Andy Lutomirski пишет: > > > >> On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev wrote: > >>> > >>> 09.03.2017 04:1

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Sat, 2017-03-11 at 02:58 +0300, Stas Sergeev wrote: > 11.03.2017 02:47, Ricardo Neri пишет: > >> > >>>> It doesn't need to be a matter of this particular > >>>> patch set, i.e. this proposal should not trigger a > >>>> v7 resend of all 21

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Sat, 2017-03-11 at 02:58 +0300, Stas Sergeev wrote: > 11.03.2017 02:47, Ricardo Neri пишет: > >> > >>>> It doesn't need to be a matter of this particular > >>>> patch set, i.e. this proposal should not trigger a > >>>> v7 resend of all 21

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: > 10.03.2017 05:39, Andy Lutomirski пишет: > > On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev <s...@list.ru> wrote: > >> 09.03.2017 04:15, Ricardo Neri пишет: > >> > >>> On Wed, 2017-03-08 at 08:4

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote: > 10.03.2017 05:39, Andy Lutomirski пишет: > > On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev wrote: > >> 09.03.2017 04:15, Ricardo Neri пишет: > >> > >>> On Wed, 2017-03-08 at 08:46 -0800, Andy Lutomirski

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Thu, 2017-03-09 at 18:39 -0800, Andy Lutomirski wrote: > On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev <s...@list.ru> wrote: > > 09.03.2017 04:15, Ricardo Neri пишет: > > > >> On Wed, 2017-03-08 at 08:46 -0800, Andy Lutomirski wrote: > >>> > >&g

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Thu, 2017-03-09 at 18:39 -0800, Andy Lutomirski wrote: > On Thu, Mar 9, 2017 at 2:10 PM, Stas Sergeev wrote: > > 09.03.2017 04:15, Ricardo Neri пишет: > > > >> On Wed, 2017-03-08 at 08:46 -0800, Andy Lutomirski wrote: > >>> > >>> On

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 01:01 +0300, Stas Sergeev wrote: > 09.03.2017 03:46, Ricardo Neri пишет: > > On Wed, 2017-03-08 at 17:08 +0300, Stas Sergeev wrote: > >> 08.03.2017 03:32, Ricardo Neri пишет: > >>> These are the instructions covered by UMIP: > >>&

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Fri, 2017-03-10 at 01:01 +0300, Stas Sergeev wrote: > 09.03.2017 03:46, Ricardo Neri пишет: > > On Wed, 2017-03-08 at 17:08 +0300, Stas Sergeev wrote: > >> 08.03.2017 03:32, Ricardo Neri пишет: > >>> These are the instructions covered by UMIP: > >>&

Re: [v6 PATCH 21/21] selftests/x86: Add tests for User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Wed, 2017-03-08 at 07:56 -0800, Andy Lutomirski wrote: > On Tue, Mar 7, 2017 at 4:32 PM, Ricardo Neri > <ricardo.neri-calde...@linux.intel.com> wrote: > > Certain user space programs that run on virtual-8086 mode may utilize > > instructions protected by the User-Mod

Re: [v6 PATCH 21/21] selftests/x86: Add tests for User-Mode Instruction Prevention

2017-03-10 Thread Ricardo Neri
On Wed, 2017-03-08 at 07:56 -0800, Andy Lutomirski wrote: > On Tue, Mar 7, 2017 at 4:32 PM, Ricardo Neri > wrote: > > Certain user space programs that run on virtual-8086 mode may utilize > > instructions protected by the User-Mode Instruction Prevention (UMIP) > > securit

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 17:08 +0300, Stas Sergeev wrote: > 08.03.2017 03:32, Ricardo Neri пишет: > > These are the instructions covered by UMIP: > > * SGDT - Store Global Descriptor Table > > * SIDT - Store Interrupt Descriptor Table > > * SLDT - Store Local Descript

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 17:08 +0300, Stas Sergeev wrote: > 08.03.2017 03:32, Ricardo Neri пишет: > > These are the instructions covered by UMIP: > > * SGDT - Store Global Descriptor Table > > * SIDT - Store Interrupt Descriptor Table > > * SLDT - Store Local Descript

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 08:46 -0800, Andy Lutomirski wrote: > On Wed, Mar 8, 2017 at 8:29 AM, Stas Sergeev <s...@list.ru> wrote: > > 08.03.2017 19:06, Andy Lutomirski пишет: > >> > >> On Wed, Mar 8, 2017 at 6:08 AM, Stas Sergeev <s...@list.ru> wrote: > >

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 08:46 -0800, Andy Lutomirski wrote: > On Wed, Mar 8, 2017 at 8:29 AM, Stas Sergeev wrote: > > 08.03.2017 19:06, Andy Lutomirski пишет: > >> > >> On Wed, Mar 8, 2017 at 6:08 AM, Stas Sergeev wrote: > >>> >

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 19:53 +0300, Stas Sergeev wrote: > 08.03.2017 19:46, Andy Lutomirski пишет: > >> No no, since I meant prot mode, this is not what I need. > >> I would never need to disable UMIP as to allow the > >> prot mode apps to do SLDT. Instead it would be good > >> to have an ability

Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

2017-03-08 Thread Ricardo Neri
On Wed, 2017-03-08 at 19:53 +0300, Stas Sergeev wrote: > 08.03.2017 19:46, Andy Lutomirski пишет: > >> No no, since I meant prot mode, this is not what I need. > >> I would never need to disable UMIP as to allow the > >> prot mode apps to do SLDT. Instead it would be good > >> to have an ability

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