On Fri, Oct 16, 2015 at 10:43 AM, Peter Zijlstra wrote:
> On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
>> - We're bridging two complex architectures
>>
>> To review this work I think it will be relevant to have a good
>> general fa
On Fri, Oct 16, 2015 at 11:33 AM, Peter Zijlstra wrote:
> On Fri, Oct 16, 2015 at 12:02:28PM +0200, Ingo Molnar wrote:
>>
>> * Peter Zijlstra wrote:
>>
>> > > - We may be making some technical compromises a.t.m for the sake of
>> > > using perf.
>> > >
>> > > perf_event_open() requires even
ff-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_perf.c | 37 -
1 file changed, 28 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index ab82857..5ef7d92 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
Consistent with the kernel.perf_event_paranoid sysctl option that can
allow non-root users to access system wide cpu metrics, this can
optionally allow non-root users to access system wide OA counter metrics
from Gen graphics hardware.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915
Gen graphics hardware can be set up to periodically write snapshots of
performance counters into a circular buffer via its Observation
Architecture and this patch exposes that capability to userspace via the
i915 perf interface.
Cc: Chris Wilson
Signed-off-by: Robert Bragg
Signed-off-by: Zhenyu
OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
drivers/gpu/drm/i915/i915_reg.h| 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git
Adds a static OA unit, MUX + B Counter configuration for basic '3D'
metrics on Haswell. This is autogenerated from an internal XML
description of metric sets.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.h| 5 ++
drive
event types are supported yet so perf_event_open can currently
only get as far as returning EINVAL for an unknown event type.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/Makefile| 3 +
drivers/gpu/drm/i915/i915_dma.c | 7 +
drivers/gpu/drm/i915/i915_drv.h | 74 +++
driver
above would you be open to a non-perf
based driver for the OA unit?
Peter; I wonder if you would tend to agree too that it could make sense
for us to go with our own interface here?
Kind Regards,
Robert
Robert Bragg (6):
drm/i915: Add i915 perf infrastructure
drm/i915: rena
On Wed, May 27, 2015 at 4:39 PM, <> wrote:
> On Thu, May 21, 2015 at 12:17:48AM +0100, Robert Bragg wrote:
>> >
>> > So for me the 'natural' way to represent this in perf would be through
>> > event groups. Create a perf event for every single event
-- >8 ---
To allow for pmus that may have internal buffering (e.g. the hardware
writes out data to a circular buffer which is only periodically
forwarded to userspace via perf) this enables userspace to explicitly
ensure it has received all samples before a point in time.
Signed-off-by: Robe
On Tue, May 19, 2015 at 3:53 PM, Peter Zijlstra wrote:
> On Fri, May 15, 2015 at 02:07:29AM +0100, Robert Bragg wrote:
>> On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra wrote:
>> > On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote:
>> >
>> >> I&
.
Only Haswell is supported currently.
v2:
- fix deadlock in init_oa_buffer error path
- EBADF for bad drm fd, EINVAL for failure to lookup ctx
- mmio write barriers, after OA reconfigure, before unlocks
- use i915_mutex_lock_interruptible within event init
Signed-off-by: Robert Bragg
On Fri, May 8, 2015 at 5:21 PM, Peter Zijlstra wrote:
>
> So I've not yet went through the entire series; but I'm wondering if its
> at all possible to re-use some of this work:
>
> lkml.kernel.org/r/1428453299-19121-1-git-send-email-suka...@linux.vnet.ibm.com
>
> That's for a Power8 HV call that
error status
Signed-off-by: Robert Bragg
---
include/linux/perf_event.h | 7 +++
include/uapi/linux/perf_event.h | 1 +
kernel/events/core.c| 5 +
3 files changed, 13 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index cf1d096
This makes sure we've stopped touching oacontrol before we start
resetting OA, PM and clock gating. Shouldn't strictly be needed since we
know that oacontrol will have been disabled before we start destroying
an event but it seems worth highlighting that update_oacontrol() could
still be running as
On 7 May 2015 15:58, "Chris Wilson" wrote:
>
> On Thu, May 07, 2015 at 03:15:50PM +0100, Robert Bragg wrote:
> > + /* We bypass the default perf core perf_paranoid_cpu() ||
> > + * CAP_SYS_ADMIN check by using the PERF_PMU_CAP_IS_DEVICE
> > + * flag
On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra wrote:
> On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote:
>
>> I've changed the uapi for configuring the i915_oa specific attributes
>> when calling perf_event_open(2) whereby instead of cramming lots o
Consistent with the kernel.perf_event_paranoid sysctl option that can
allow non-root users to access system wide cpu metrics, this can
optionally allow non-root users to access system wide OA counter metrics
from Gen graphics hardware.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915
This adds two driver specific PERF_RECORD_DEVICE event types for
reporting OA buffer overrun and report lost status bits to userspace.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_oa_perf.c | 53 -
include/uapi/drm/i915_drm.h | 27
: Robert Bragg
---
include/linux/perf_event.h | 7 +++
include/uapi/linux/perf_event.h | 1 +
kernel/events/core.c| 5 +
3 files changed, 13 insertions(+)
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 1af35b4..69a0cb9 100644
--- a/include/linux
.
Only Haswell is supported currently.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_dma.c | 6 +
drivers/gpu/drm/i915/i915_drv.h | 53 +++
drivers/gpu/drm/i915/i915_gem_context.c | 45 +-
drivers/gpu/drm/i915
The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare
that they only monitor device specific metrics and since they don't
monitor any cpu metrics then perf should bypass any cpu centric security
checks, as well as disallow cpu centric attributes.
Signed-off-by: Robert
This exports enough api to allow drivers to output their own
PERF_RECORD_DEVICE events.
Signed-off-by: Robert Bragg
---
include/linux/perf_event.h | 7 +++
kernel/events/core.c| 2 ++
kernel/events/internal.h| 9 -
kernel/events/ring_buffer.c | 3 +++
4 files changed
To support pmu drivers in loadable modules, such as the i915 driver
Signed-off-by: Robert Bragg
---
kernel/events/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 2fabc06..38c240c 100644
--- a/kernel/events/core.c
+++ b/kernel/events
w more details about this hardware, this PRM
is a good starting point:
https://01.org/sites/default/files/documentation/
observability_performance_counters_haswell.pdf
Kind regards,
- Robert
Robert Bragg (11):
perf: export perf_event_overflow
perf: Add PERF_PMU_CAP_IS_DEVICE flag
perf: Add PERF_EVENT_IOC_FLUSH ioctl
perf
We are still investigating the detailed requirements here, but there are
some constraints we need to apply on unit level clock gating for
reliable metrics (in particular for a reliable sampling period).
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_oa_perf.c | 70
OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
drivers/gpu/drm/i915/i915_reg.h| 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git
This enables access to some additional counters beyond the aggregating A
counters, adding a '3D' metric set configuration useful while profiling
3D rendering workloads.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_drv.h | 7 +
drivers/gpu/drm/i915/i915_oa_pe
To allow for more extensible, device specific, perf record types this
adds a generic PERF_RECORD_DEVICE type that can be used by device
drivers. Driver developers can then document some driver-specific header
to further detail such a record's type.
Signed-off-by: Robert Bragg
---
include
On Mon, Nov 10, 2014 at 11:13 AM, Ingo Molnar wrote:
>
> * Robert Bragg wrote:
>
>> On Haswell there are 8 different report layouts that basically trade
>> off how many counters to include from 13 to 61 32bit counters plus 1
>> 64bit timestamp. I exposed this
On Wed, Nov 5, 2014 at 12:33 PM, Peter Zijlstra wrote:
> On Mon, Nov 03, 2014 at 09:47:17PM +0000, Robert Bragg wrote:
>
>> > And do I take it right that if you're able/allowed/etc.. to open/have
>> > the fd to the GPU/DRM/DRI whatever context you have the right
>
On Thu, Oct 30, 2014 at 7:08 PM, Peter Zijlstra wrote:
> On Wed, Oct 22, 2014 at 04:28:48PM +0100, Robert Bragg wrote:
>> Our desired permission model seems consistent with perf's current model
>> whereby you would need privileges if you want to profile across all gpu
>
On Thu, Oct 23, 2014 at 6:58 AM, Ingo Molnar wrote:
>
> * Robert Bragg wrote:
>
>> [...]
>>
>> I'd be interested to hear whether is sounds reasonable to
>> others for us to expose gpu device metrics via a perf pmu and
>> whether adding the PERF_PMU_CA
On Thu, Oct 23, 2014 at 8:47 AM, Chris Wilson wrote:
> On Wed, Oct 22, 2014 at 04:28:51PM +0100, Robert Bragg wrote:
>> + /* XXX: Not sure that this is really acceptable...
>> + *
>> + * i915_gem_context.c currently owns pinning/unpinning legacy
>> +
Gen graphics hardware can be set up to periodically write snapshots of
performance counters into a circular buffer and this patch exposes that
capability to userspace via the perf interface.
Only Haswell is supported currently.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/Makefile
The PERF_PMU_CAP_IS_DEVICE flag provides pmu drivers a way to declare
that they only monitor device specific metrics and since they don't
monitor any cpu metrics then perf should bypass any cpu centric security
checks, as well as disallow cpu centric attributes.
Signed-off-by: Robert
To support pmu drivers in loadable modules, such as the i915 driver
Signed-off-by: Robert Bragg
---
kernel/events/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 1cf24b3..9449180 100644
--- a/kernel/events/core.c
+++ b/kernel/events
Although I haven't seen any precedent for drivers using perf pmus to
expose device metrics, I've been experimenting with exposing some of the
performance counters of Intel Gen graphics hardware recently and looking
to see if it makes sense to build on the perf infrastructure for our use
cases.
I'v
system was left with
the remainder
of the first 16M of space to vmalloc/ioremap within.
Signed-off-by: Robert Bragg <[EMAIL PROTECTED]>
---
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index af77e17..06a7f3a 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -216,6 +216,10 @@ static struct vm_
40 matches
Mail list logo
