On 8/1/20 2:56 PM, Borislav Petkov wrote:
On Sat, Aug 01, 2020 at 01:24:29PM +0200, Saheed O. Bolarinwa wrote:
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two
On 7/17/20 4:58 PM, Jean Delvare wrote:
Which PCI specification are you talking about here. In my "PCI Local
Bus Revision 2.3" specification (March 29, 2002), chapter 2 is about
Signal Definition and has nothing to do with the BIOS.
Hello Larry,
On 7/13/20 7:16 PM, Larry Finger wrote:
On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa"
On 7/13/20 6:42 PM, Rajashekar, Revanth wrote:
Hi,
On 7/13/2020 6:22 AM, Saheed O. Bolarinwa wrote:
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa"
Thank you for the review.
On 7/13/20 3:45 PM, Heiner Kallweit wrote:
Patches 11 and 12 are both trivial, wouldn't it make sense to merge them?
Apart from that: Acked-by: Heiner Kallweit
I separated them for easy review, I will merge them in the next version.
- Saheed
On 7/10/20 2:14 AM, Bjorn Helgaas wrote:
On Mon, Jul 06, 2020 at 11:31:15AM +0200, Saheed Olayemi Bolarinwa wrote:
From: Bolarinwa Olayemi Saheed
The default case of the switch statement is redundant since
PCI_EXP_SLTCTL_PCC is only a single bit. pcie_capability_read_word()
currently causes
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