[PATCH v6 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 473 +++ include/linux

[PATCH v6 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC uncore PMU driver perf: hisi: Add support for HiSilicon SoC L3C PMU driver perf: hisi: Add support for HiSilicon SoC HHA PMU driver

[PATCH v6 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC uncore PMU driver perf: hisi: Add support for HiSilicon SoC L3C PMU driver perf: hisi: Add support for HiSilicon SoC HHA PMU driver

[PATCH] perf vendor events arm64: Add hip08 implementation defined PMU core events

Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Cc: Peter Zijlstra <pet...@infradead.org> Cc: Ingo Molnar <mi...@redhat.com> Cc: Arnaldo Carvalho de Melo <a...@kernel.org> Cc: Alexander Shishkin <alexander.shish...@linux.intel.com> Cc: Will Deacon <wi

[PATCH] perf vendor events arm64: Add hip08 implementation defined PMU core events

Signed-off-by: Shaokun Zhang Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Alexander Shishkin Cc: Will Deacon Cc: Ganapatrao Kulkarni Cc: John Garry --- .../arch/arm64/hisilicon/hip08-imp-def.json| 176 + tools/perf/pmu-events/arch/arm64

[PATCH v5 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- driv

[PATCH v5 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 477 +++ include/linux

[PATCH v5 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC uncore PMU driver

[PATCH v5 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC uncore PMU driver

[PATCH v5 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 1c3feff..9d1ad57 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6147,6 +6147,1

[PATCH v5 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- Documentation/perf

[PATCH v5 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 1c3feff..9d1ad57 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6147,6 +6147,13 @@ S: Maintained F

[PATCH v5 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- Documentation/perf/hisi-pmu.txt | 53 + 1 file changed, 53 insertions(+) create mode 100644

[PATCH v5 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/

[PATCH v5 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 467

[PATCH v5 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_unco

[PATCH v5 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 482 +++ include/linux/cpuhotplug.h | 1 + 3 files changed, 484

[PATCH v5 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/Kconfig

[PATCH v5 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile| 1 + drivers/perf/hisilicon

[PATCH v4 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- driv

[PATCH v4 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 538 +++ include/linux/cpuhotplug.h

[PATCH v4 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

comments Changes in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC

[PATCH v4 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

comments Changes in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver perf: hisi: Add support for HiSilicon SoC

[PATCH v4 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/Kconfig

[PATCH v4 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile| 1 + drivers/perf/hisilicon

[PATCH v4 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- Documentation/perf

[PATCH v4 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- Documentation/perf/hisi-pmu.txt | 52 + 1 file changed, 52 insertions(+) create mode 100644

[PATCH v4 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/

[PATCH v4 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 436

[PATCH v4 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 205d397..649b144 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6197,6 +6197,1

[PATCH v4 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 205d397..649b144 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6197,6 +6197,13 @@ S: Maintained F

[PATCH v4 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/

[PATCH v4 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Reviewed-by: Jonathan Cameron Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 420

[PATCH v3 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertion

[PATCH v3 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertions(+) create mode 100644 Documentation/perf/hisi-pmu.txt

[PATCH v3 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile

[PATCH v3 2/6] perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile| 1 + drivers/perf/hisilicon/Makefile | 1

[PATCH v3 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 205d397..649b144 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6197,6 +6197,1

[PATCH v3 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 205d397..649b144 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6197,6 +6197,13 @@ S: Maintained F

[PATCH v3 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH v3 4/6] perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 453 +++ 2 files

[PATCH v3 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH v3 5/6] perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 437 ++ 2 files

[PATCH v3 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 556 +++ i

[PATCH v3 3/6] perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 556 +++ include/linux/cpuhotplug.h | 1 + 3 files

[PATCH v3 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It includes L3C, Hydra Home Agent (HHA) and DDRC. Changes in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6

[PATCH v3 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It includes L3C, Hydra Home Agent (HHA) and DDRC. Changes in v3: * rebase to 4.13-rc1 * add dev_err if ioremap fails for PMUs Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6

[PATCH v2 4/6] drivers: perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH v2 4/6] drivers: perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 451 +++ 2 files

[PATCH v2 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It include L3C, Hydra Home Agent (HHA) and DDRC. Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver drivers: perf

[PATCH v2 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It include L3C, Hydra Home Agent (HHA) and DDRC. Changes in v2: * fix kbuild test robot error * make hisi_uncore_ops static Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver drivers: perf

[PATCH v2 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..fbd664b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6072,6 +6072,1

[PATCH v2 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..fbd664b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6072,6 +6072,13 @@ S: Maintained F

[PATCH v2 2/6] drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile

[PATCH v2 2/6] drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile| 1 + drivers/perf/hisilicon/Makefile | 1

[PATCH v2 5/6] drivers: perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH v2 3/6] drivers: perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 554

[PATCH v2 3/6] drivers: perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 554 +++ include/linux/cpuhotplug.h | 1 + 3

[PATCH v2 5/6] drivers: perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 435 ++ 2 files

[PATCH v2 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertion

[PATCH v2 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertions(+) create mode 100644 Documentation/perf/hisi-pmu.txt

[PATCH 3/6] drivers: perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 554

[PATCH 3/6] drivers: perf: hisi: Add support for HiSilicon SoC L3C PMU driver

is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 554 +++ include/linux/cpuhotplug.h | 1 + 3

[PATCH 5/6] drivers: perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertion

[PATCH 5/6] drivers: perf: hisi: Add support for HiSilicon SoC DDRC PMU driver

code (0 - 7) in DDRC PMU driver. Interrupt is supported to handle counter (32-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 435 ++ 2 files

[PATCH 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver

This patch adds documentation for the uncore PMUs on HiSilicon SoC. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- Documentation/perf/hisi-pmu.txt | 51 + 1 file changed, 51 insertions(+) create mode 100644 Documentation/perf/hisi-pmu.txt

[PATCH 2/6] drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile

[PATCH 2/6] drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver

This patch adds support HiSilicon SoC uncore PMU driver framework and interfaces. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/Kconfig | 7 + drivers/perf/Makefile| 1 + drivers/perf/hisilicon/Makefile | 1

[PATCH 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..fbd664b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6072,6 +6072,1

[PATCH 6/6] arm64: MAINTAINERS: hisi: Add HiSilicon SoC PMU support

Add support HiSilicon SoC uncore PMU driver. Signed-off-by: Shaokun Zhang --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..fbd664b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6072,6 +6072,13 @@ S: Maintained F

[PATCH 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It includes L3C, Hydra Home Agent (HHA) and DDRC. Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver drivers: perf

[PATCH 0/6] Add HiSilicon SoC uncore Performance Monitoring Unit driver

This patchset adds support for HiSilicon SoC uncore PMUs driver. It includes L3C, Hydra Home Agent (HHA) and DDRC. Shaokun Zhang (6): Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver drivers: perf: hisi: Add support for HiSilicon SoC uncore PMU driver drivers: perf

[PATCH 4/6] drivers: perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/pe

[PATCH 4/6] drivers: perf: hisi: Add support for HiSilicon SoC HHA PMU driver

and every counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 451 +++ 2 files

[PATCH v8 8/9] drivers: perf: hisi: Miscellanous node(MN) event counting in perf

ot support counter overflow IRQ in HiP05/06/07, So use hrtimer to poll and avoid counter overflow. 4. The driver supports DT and ACPI mode. Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: Anurup M <anuru...@huawei.com> --- drivers/perf/hisilicon/Makefile

[PATCH v8 8/9] drivers: perf: hisi: Miscellanous node(MN) event counting in perf

ot support counter overflow IRQ in HiP05/06/07, So use hrtimer to poll and avoid counter overflow. 4. The driver supports DT and ACPI mode. Signed-off-by: Shaokun Zhang Signed-off-by: Anurup M --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_

[PATCH v8 3/9] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU

From: Anurup M <anuru...@huawei.com> 1) Device tree bindings for Hisilicon SoC PMU. 2) Add example for Hisilicon L3 cache and MN PMU. 3) Add child nodes of L3C and MN in djtag bindings example. Signed-off-by: Anurup M <anuru...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao..

[PATCH v8 3/9] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU

From: Anurup M 1) Device tree bindings for Hisilicon SoC PMU. 2) Add example for Hisilicon L3 cache and MN PMU. 3) Add child nodes of L3C and MN in djtag bindings example. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang Acked-by: Rob Herring --- .../devicetree/bindings/arm/hisilicon

[PATCH v8 7/9] drivers: perf: hisi: Add support for Hisilicon SoC event counters

avoid overflow. 7. The driver supports DT and ACPI mode. Signed-off-by: Anurup M <anuru...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: John Garry <john.ga...@huawei.com> --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/his

[PATCH v8 7/9] drivers: perf: hisi: Add support for Hisilicon SoC event counters

supports DT and ACPI mode. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang Signed-off-by: John Garry --- drivers/perf/hisilicon/Makefile | 2 +- drivers/perf/hisilicon/hisi_uncore_l3c.c | 594 +++ drivers/perf/hisilicon/hisi_uncore_pmu.c | 451

[PATCH v8 9/9] dts: arm64: hip07: Add Hisilicon SoC PMU support

From: Anurup M <anuru...@huawei.com> Add nodes for djtag, L3 cache and MN to support uncore events. Signed-off-by: Anurup M <anuru...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- arch/arm64/boot/dts/hisilicon/hip07.dtsi | 87 ++

[PATCH v8 9/9] dts: arm64: hip07: Add Hisilicon SoC PMU support

From: Anurup M Add nodes for djtag, L3 cache and MN to support uncore events. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang --- arch/arm64/boot/dts/hisilicon/hip07.dtsi | 87 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon

[PATCH v8 2/9] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

From: Tan Xiaojun Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die Signed-off-by: Tan Xiaojun Signed-off-by: Anurup M Acked-by: Rob Herring --- .../devicetree/bindings/arm/hisilicon/djtag.txt

[PATCH v8 1/9] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support

From: Anurup M <anuru...@huawei.com> Add support for Hisilicon SoC hardware event counters for HiP05/06/07 chip versions. Signed-off-by: Anurup M <anuru...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- MAINTAINERS | 10 ++ 1 file chan

[PATCH v8 4/9] Documentation: perf: hisi: Documentation for HiP05/06/07 PMU event counting.

; Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> --- Documentation/perf/hisi-pmu.txt | 75 + 1 file changed, 75 insertions(+) create mode 100644 Documentation/perf/hisi-pmu.txt diff --git a/Documentation/perf/hisi-pmu.txt b/Documentation/perf/hisi-pmu

[PATCH v8 2/9] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

From: Tan Xiaojun Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die Signed-off-by: Tan Xiaojun Signed-off-by: Anurup M Acked-by: Rob Herring --- .../devicetree/bindings/arm/hisilicon/djtag.txt| 51 ++ 1 file changed, 51 insertions(+) create mode 100644

[PATCH v8 1/9] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support

From: Anurup M Add support for Hisilicon SoC hardware event counters for HiP05/06/07 chip versions. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..ac5a64e 100644

[PATCH v8 4/9] Documentation: perf: hisi: Documentation for HiP05/06/07 PMU event counting.

From: Anurup M Documentation for perf usage and Hisilicon SoC PMU uncore events. The Hisilicon SOC has event counters for hardware modules like L3 cache, Miscellaneous node etc. These events are all uncore. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang --- Documentation/perf/hisi

[PATCH v8 5/9] drivers: perf: hisi: Update Kconfig for Hisilicon PMU support

From: Anurup M <anuru...@huawei.com> Update Kconfig for HiP05/06/07 PMU support. Signed-off-by: Anurup M <anuru...@huawei.com> Signed-off-by: Shaokun Zhang <zhangshao...@hisilicon.com> Signed-off-by: John Garry <john.ga...@huawei.com> --- drivers/perf/Kconfig | 8 +++

[PATCH v8 6/9] drivers: perf: hisi: Add support for Hisilicon Djtag driver

From: Tan Xiaojun The Hisilicon Djtag is an independent component which connects with some other components in the SoC by Debug Bus. This driver can be configured to access the registers of connecting components (like L3 cache) during real time debugging and it supports DT

[PATCH v8 5/9] drivers: perf: hisi: Update Kconfig for Hisilicon PMU support

From: Anurup M Update Kconfig for HiP05/06/07 PMU support. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang Signed-off-by: John Garry --- drivers/perf/Kconfig | 8 1 file changed, 8 insertions(+) diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index aa587ed..4bc1f09

[PATCH v8 6/9] drivers: perf: hisi: Add support for Hisilicon Djtag driver

From: Tan Xiaojun The Hisilicon Djtag is an independent component which connects with some other components in the SoC by Debug Bus. This driver can be configured to access the registers of connecting components (like L3 cache) during real time debugging and it supports DT and ACPI mode.

[PATCH v8 0/9] perf: arm64: Support for Hisilicon SoC Hardware event counters

Documentation: perf: hisi: Documentation for HiP05/06/07 PMU event counting. drivers: perf: hisi: Update Kconfig for Hisilicon PMU support drivers: perf: hisi: Add support for Hisilicon SoC event counters dts: arm64: hip07: Add Hisilicon SoC PMU support Shaokun Zhang (1): drivers: perf: hisi

[PATCH v8 0/9] perf: arm64: Support for Hisilicon SoC Hardware event counters

Documentation: perf: hisi: Documentation for HiP05/06/07 PMU event counting. drivers: perf: hisi: Update Kconfig for Hisilicon PMU support drivers: perf: hisi: Add support for Hisilicon SoC event counters dts: arm64: hip07: Add Hisilicon SoC PMU support Shaokun Zhang (1): drivers: perf: hisi

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