On 2019/10/11 22:16, Soeren Moch wrote:
On 11.10.19 15:00, Robin Murphy wrote:
On 11/10/2019 12:40, Soeren Moch wrote:
On 11.10.19 10:22, Jonas Karlman wrote:
On 2019-10-04 19:24, Sören Moch wrote:
On 04.10.19 17:33, Shawn Lin wrote:
On 2019/10/4 22:20, Robin Murphy wrote:
On 04/10/2019
On 2019/10/4 22:20, Robin Murphy wrote:
On 04/10/2019 04:39, Soeren Moch wrote:
On 04.10.19 04:13, Shawn Lin wrote:
On 2019/10/4 8:53, Soeren Moch wrote:
On 04.10.19 02:01, Robin Murphy wrote:
On 2019-10-03 10:50 pm, Soeren Moch wrote:
According to the RockPro64 schematic [1] the rk3399
adead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
___
Linux-rockchip mailing list
linux-rockc...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
--
Best Regards
Shawn Lin
mably
this is the same problem that was solved by that patch.
[1] https://lkml.kernel.org/r/20190404040106.40519-1-diand...@chromium.org
[2] https://crrev.com/c/230765
Sorry for late, but FWIW:
Reviewed-by: Shawn Lin
Cc: # 4.14.x
Signed-off-by: Douglas Anderson
---
I didn't put any
file changed, 1 insertion(+), 1 deletion(-)
Shawn,
I need your ACK on this patch, thanks.
Acked-by: Shawn Lin
Lorenzo
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c
b/drivers/pci/controller/pcie-rockchip-ep.c
index a5d799e2dff2..d743b0a48988 100644
--- a/drivers/pci/controller/pcie-r
+ Caesar Wang
On 2019/3/21 1:48, Alexander Kochetkov wrote:
I've found that sometimes dw_mmc in my rk3188 based board stop transfer
any data with error:
kernel: dwmmc_rockchip 1021c000.dwmmc: Unexpected command timeout, state 3
Further digging into problem showed that sometimes one of EDMA-bas
On 2019/3/19 8:19, Aditya Pakki wrote:
of_match_node can fail and return NULL in case no matching structure.
The patches checks for such a scenario and returns -ENXIO.
Signed-off-by: Aditya Pakki
---
drivers/mmc/host/dw_mmc-exynos.c | 2 ++
drivers/mmc/host/dw_mmc-k3.c | 2 ++
drivers/m
399-gru-kevin
CPU arch: arm64
Lab:lab-collabora
Compiler: gcc-7
Config: defconfig
Test suite: boot
Breaking commit found:
---
commit d6a6d722481f357eafe7b798fe6fdadd2f5ac6bd
Author: Shawn Lin
D
On 2019/3/2 0:43, Christoph Muellner wrote:
When using direct commands (DCMDs) on an RK3399, we get spurious
CQE completion interrupts for the DCMD transaction slot (#31):
I didn't see it. Do you try any newer code, for instance, linux-next?
[ 931.196520] [ cut here ]---
idth = <8>;
cap-mmc-highspeed;
- disable-wp;
Reviewed-by: Shawn Lin
no-sd;
no-sdio;
non-removable;
4 platform will be posted shortly.
8<-
drivers/pci/controller/pcie-rockchip-ep.c | 16 +++-
Acked-by: Shawn Lin
On 2018/11/29 17:59, Chunyan Zhang wrote:
Hi Adrian,
On Thu, 29 Nov 2018 at 15:36, Adrian Hunter wrote:
On 29/11/18 8:22 AM, Chunyan Zhang wrote:
On Tue, 20 Nov 2018 at 21:41, Adrian Hunter wrote:
On 12/11/18 9:26 AM, Chunyan Zhang wrote:
Some standard SD host controllers can support bot
On 2018/11/27 7:48, Heiko Stuebner wrote:
Hi Tomeu,
Am Montag, 26. November 2018, 15:47:49 CET schrieb Tomeu Vizoso:
This adds a device tree for the NanoPC-T4 SBC, which is based on the
Rockchip RK3399 SoC and marketed by FriendlyELEC.
Known working:
- Serial
- Ethernet
- HDMI
- USB 2.0
All
On 2018/11/23 23:29, Robin Murphy wrote:
Hi Jan,
[repeating some of the discussion from your other thread for the benefit
of the MMC audience]
On 21/11/2018 07:42, JABLONSKY Jan wrote:
CPU may not see most up-to-date and correct copy of DMA buffer, when
internal DMA controller is in use.
Pro
<4 24 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
--
2.14.4
Could we actually use RK_Pxx for all new pin definitions? Would increase
readability a lot.
Thanks,
Klaus
--
Best Regards
Shawn Lin
t: send the line "unsubscribe linux-mmc" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Best Regards
Shawn Lin
On 2018/6/11 20:20, Ulf Hansson wrote:
+ Shawn Lin, Evgeniy Didin, Doug Andersson
On 29 May 2018 at 12:38, Qing Xia wrote:
From: x00270170
Card write threshold control is supposed to be set since controller
version 2.80a for data write in HS400 mode and data read in
HS200/HS400/SDR104 mode
On 2018/5/17 14:16, Mathieu Malaterre wrote:
On Thu, May 17, 2018 at 4:45 AM, Shawn Lin wrote:
On 2018/5/17 3:20, Mathieu Malaterre wrote:
In commit 97548575bef3 ("mmc: block: Convert RPMB to a character device")
a
new function `mmc_rpmb_ioctl` was added. The final return
about
this. And it's worth backporting to stable.
Reviewed-by: Shawn Lin
Signed-off-by: Mathieu Malaterre
---
drivers/mmc/core/block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index 9e923cd1d80e..38a7586b00cc
Hi David,
On 2018/5/16 11:38, David Wu wrote:
Add constants and callback functions for the dwmac on px30 soc.
s/soc/SoC
The base structure is the same, but registers and the bits in
them moved slightly, and add the clk_mac_speed for the select
s/moved/are moved
of mac speed.
for select
On 2018/5/9 2:46, Liming Sun wrote:
This commit adds extension to the dw_mmc driver for Mellanox BlueField
SoC. It updates the UHS_REG_EXT register to bring up the eMMC card on
this SoC.
Reviewed-by: Shawn Lin
On 2018/5/2 20:45, Liming Sun wrote:
Please see response inline.
Thanks,
Liming
-Original Message-
From: Shawn Lin [mailto:shawn@rock-chips.com]
Sent: Tuesday, May 1, 2018 9:02 PM
To: Liming Sun ; Mark Rutland
; Jaehoon Chung ;
Catalin Marinas ; Will Deacon
Cc: Ulf Hansson ; Rob
On 2018/5/2 2:19, Liming Sun wrote:
This commit adds extension to the dw_mmc driver for Mellanox BlueField
SoC. It updates the UHS_REG_EXT register to bring up the eMMC card on
this SoC.
Cc: sta...@kernel.org
Why?
Signed-off-by: Liming Sun
Reviewed-by: David Woods
---
drivers/mmc/host/Kc
Hi Liming,
On 2018/4/23 23:32, Liming Sun wrote:
This commit adds extension to the dw_mmc driver for Mellanox BlueField
SoC. It updates the UHS_REG_EXT register to bring up the eMMC card on
this SoC.
Signed-off-by: Liming Sun
---
drivers/mmc/host/Kconfig| 9 +
drivers/mmc/h
the driver finally probed fine. But probably it
came from clk_bulk_get,
Reviewed-by: Shawn Lin
Signed-off-by: Jerome Brunet
---
drivers/clk/clk-bulk.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c
index 4c10456f8a32..69
On 2018/4/6 21:41, Ryan Grachek wrote:
On Wed, Apr 4, 2018 at 7:51 PM, Shawn Lin wrote:
[+ Zhangfei Gao who added support for hi6220]
On 2018/4/4 23:31, Ryan Grachek wrote:
On Tue, Apr 3, 2018 at 6:31 AM, Shawn Lin mailto:shawn@rock-chips.com>> wrote:
On 2018/3/3
[+ Zhangfei Gao who added support for hi6220]
On 2018/4/4 23:31, Ryan Grachek wrote:
On Tue, Apr 3, 2018 at 6:31 AM, Shawn Lin <mailto:shawn@rock-chips.com>> wrote:
On 2018/3/30 2:24, oscardagrach wrote:
Need at least one line commit body.
Signed-off-by: osc
On 2018/3/30 2:24, oscardagrach wrote:
Need at least one line commit body.
Signed-off-by: oscardagrach
---
drivers/mmc/host/dw_mmc-k3.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c
index 89cdb3d533
ers/mmc/core/block.c
@@ -3087,6 +3087,7 @@ static void __exit mmc_blk_exit(void)
mmc_unregister_driver(&mmc_driver);
unregister_blkdev(MMC_BLOCK_MAJOR, "mmc");
unregister_chrdev_region(mmc_rpmb_devt, MAX_DEVICES);
+ bus_unregister(&mmc_rpmb_bus_type);
On 2018/3/29 13:48, naraniman...@gmail.com wrote:
From: Manish Narani
This patch adds runtime PM support in Arasan SD driver.
Signed-off-by: Manish Narani
---
drivers/mmc/host/sdhci-of-arasan.c | 83 +-
1 file changed, 81 insertions(+), 2 deletions(-)
d
mdq_en, "%d\n", card->ext_csd.cmdq_en);
Just a nit that I tried to find some convention here, as RCA is a 16-bit
register, so perhaps "0x%04x\n"? Otherwise,
Reviewed-by: Shawn Lin
static ssize_t mmc_fwrev_show(struct device *dev,
@@ -848,6 +849,7 @@ static ssize_t
-by: Harish Jenny K N
---
Changes in v5:
- Added parser logic in kernel by using debugfs_create_file
for caps and caps2 instead of debugfs_create_x32
I'm fine with your method if Ulf likes it, but could you use
DEFINE_SHOW_ATTRIBUTE instead? :)
--
Best Regards
Shawn Lin
On 2018/3/6 0:47, Phil Edworthy wrote:
Hi Shawn,
On 28 February 2018 01:53, Shawn Lin wrote:
On 2018/2/27 23:05, Phil Edworthy wrote:
On 27 February 2018 14:42, Shawn Lin wrote:
On 2018/2/27 22:31, Phil Edworthy wrote:
On 27 February 2018 14:28, Shawn Lin wrote:
在 2018/2/27 21:55, Phil
Reviewed-by: Shawn Lin
r-domain: use clk_bulk APIs")
Reported-by: Shawn Lin
Signed-off-by: Jeffy Chen
Tested-by: Shawn Lin
Hi Heiko,
On 2018/3/2 23:43, Heiko Stuebner wrote:
Hi Jeffy,
Am Mittwoch, 28. Februar 2018, 13:41:43 CET schrieb Jeffy Chen:
Use clk_bulk APIs, and also add error handling for clk enable.
Signed-off-by: Jeffy Chen
[...]
- for (i = 0; i < clk_cnt; i++) {
- clk = of_clk
On 2018/3/5 12:24, Harish Jenny K N wrote:
From: Abbas Raza
This patch exports the host capabilities to debugfs
Signed-off-by: Abbas Raza
Signed-off-by: Andrew Gabbasov
Signed-off-by: Harish Jenny K N
---
Changes in v2:
- Changed Author
drivers/mmc/core/debugfs.c | 3 +++
1 file change
On 2018/2/27 23:05, Phil Edworthy wrote:
Hi Shawn,
On 27 February 2018 14:42, Shawn Lin wrote:
On 2018/2/27 22:31, Phil Edworthy wrote:
Hi Shawn,
On 27 February 2018 14:28, Shawn Lin wrote:
在 2018/2/27 21:55, Phil Edworthy 写道:
Since the controller does not support the end-of-busy IRQ
On 2018/2/27 22:31, Phil Edworthy wrote:
Hi Shawn,
On 27 February 2018 14:28, Shawn Lin wrote:
在 2018/2/27 21:55, Phil Edworthy 写道:
Since the controller does not support the end-of-busy IRQ, don't use it.
Otherwise, on older SD cards you will get lots of these messages:
"mmc0
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+ SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
+ SDHCI_QUIRK2_STOP_WITH_TC,
};
static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask)
--
Best Regards
Shawn Lin
f adding all these two
flags.
/*
* As discussed on lkml, GENHD_FL_REMOVABLE should:
--
Best Regards
Shawn Lin
Tested-by: Vineet Gupta
Fixes: ARC STAR 9001306872 HSDK, sdio: board crashes when copying big files
Signed-off-by: Evgeniy Didin
CC: Alexey Brodkin
CC: Eugeniy Paltsev
CC: Douglas Anderson
CC: Ulf Hansson
CC: linux-kernel@vger.kernel.org
CC: linux-snps-...@lists.infradead.org
Cc: # 9d9
at property
3) remove the functionality of the deprecated property from the driver
but still leave some warning there
4) remove the left warning finally
And for the ABI breakage, we should add something in Documentation/ABI
/obsolete or Documentation/ABI/removed ?
--
Best Regards
Shawn Lin
On 2018/2/23 20:44, Geert Uytterhoeven wrote:
The hs_timing_cfg[] array is indexed using a value derived from the
"mshcN" alias in DT, which may lead to an out-of-bounds access.
Reviewed-by: Shawn Lin
--
Best Regards
Shawn Lin
to it
description, so no one could miss this slightest detail.
Couple of code style fixes as a bonus.
Thanks for updating these.
Reviewed-by: Shawn Lin
Signed-off-by: Alexey Roslyakov
---
drivers/mmc/host/dw_mmc.h | 19 +--
1 file changed, 9 insertions(+), 10 deletions
EV_MASK GENMASK(3, 0)
+#define IPVR_MAJREV_MASK GENMASK(7, 4)
+
+enum stm32_sdmmc_cookie {
+ COOKIE_UNMAPPED,
+ COOKIE_PRE_MAPPED, /* mapped by pre_req() of stm32 */
+ COOKIE_MAPPED, /* mapped by prepare_data() of stm32 */
+};
+
+struct sdmmc_stat {
+ unsigned long n_req;
+ unsigned long n_datareq;
+ unsigned long n_ctimeout;
+ unsigned long n_ccrcfail;
+ unsigned long n_dtimeout;
+ unsigned long n_dcrcfail;
+ unsigned long n_txunderrun;
+ unsigned long n_rxoverrun;
+ unsigned long nb_dma_err;
+};
+
+struct sdmmc_host {
+ void __iomem*base;
+ struct mmc_host *mmc;
+ struct clk *clk;
+ struct reset_control*rst;
+
+ u32 clk_reg_add;
+ u32 pwr_reg_add;
+
+ struct mmc_request *mrq;
+ struct mmc_command *cmd;
+ struct mmc_data *data;
+ struct mmc_command stop_abort;
+ booldpsm_abort;
+
+ /* protect host registers access */
+ spinlock_t lock;
+
+ unsigned intsdmmcclk;
+ unsigned intsdmmc_ck;
+
+ u32 size;
+
+ u32 ip_ver;
+ struct sdmmc_stat stat;
+};
--
Best Regards
Shawn Lin
Just use the API instead of open-coding it, no functional change
intended.
Signed-off-by: Shawn Lin
Reviewed-by: Brian Norris
Tested-by: Caesar Wang
Tested-by: Ziyuan Xu
---
Changes in v2:
- propagate the error and print it
- avoid using busy wait
drivers/phy/rockchip/phy-rockchip-emmc.c
It turns out that 5us isn't enough for all cases, so let's
retry some more times to wait for caldone.
Signed-off-by: Shawn Lin
Reviewed-by: Brian Norris
Tested-by: Caesar Wang
Tested-by: Ziyuan Xu
---
Changes in v2:
- propagate the error and print it
drivers/phy/rockchip/ph
Just use the API instead of open-coding it, no functional change
intended.
Signed-off-by: Shawn Lin
---
drivers/phy/rockchip/phy-rockchip-emmc.c | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-emmc.c
b/drivers/phy
It turns out that 5us isn't enough for all cases, so let's
retry some more times to wait for caldone.
Signed-off-by: Shawn Lin
---
drivers/phy/rockchip/phy-rockchip-emmc.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/ro
Hi Bjorn,
On 2017/11/9 23:05, Bjorn Helgaas wrote:
On Thu, Nov 09, 2017 at 11:28:36AM +0530, Kishon Vijay Abraham I wrote:
Hi Bjorn,
On Thursday 09 November 2017 01:56 AM, Bjorn Helgaas wrote:
On Wed, Nov 08, 2017 at 02:15:10PM -0600, Bjorn Helgaas wrote:
From: Bjorn Helgaas
Add Lorenzo Pi
Hi Ulf,
On 2017/10/30 19:40, Ulf Hansson wrote:
On 12 October 2017 at 22:11, Douglas Anderson wrote:
Recently we landed 03de19212ea3 ("mmc: dw_mmc: introduce timer for
broken command transfer over scheme"). I found a bunch of problems
with that patch, so this series attempts to solve some of
On 2017/10/17 13:05, Doug Anderson wrote:
Hi,
On Mon, Oct 16, 2017 at 6:17 PM, Shawn Lin wrote:
Hi Doug
On 2017/10/13 4:11, Douglas Anderson wrote:
The recent CTO timer introduced in commit 03de19212ea3 ("mmc: dw_mmc:
introduce timer for broken command transfer over scheme") w
On 2017/10/7 3:21, Liming Sun wrote:
This series of commits enables the multi-card support for the dw-mmc
controller. It includes two parts as below.
The first part (patches 1-7) reverts the series of recent commits that
removed the multi-card support with comments saying there was no such
use
Hi Doug
On 2017/10/13 4:11, Douglas Anderson wrote:
The recent CTO timer introduced in commit 03de19212ea3 ("mmc: dw_mmc:
introduce timer for broken command transfer over scheme") was causing
observable problems due to race conditions. Previous patches have
fixed those race conditions.
It can
Hi Doug
On 2017/10/13 12:20, Doug Anderson wrote:
Shawn,
On Thu, Oct 12, 2017 at 6:32 PM, Shawn Lin wrote:
On 2017/10/13 4:11, Douglas Anderson wrote:
This attempts to instill a bit of paranoia to the code dealing with
the CTO timer. It's believed that this will make the CTO timer
On 2017/10/13 4:11, Douglas Anderson wrote:
This attempts to instill a bit of paranoia to the code dealing with
the CTO timer. It's believed that this will make the CTO timer more
robust in the case that we're having very long interrupt latencies.
Ack. It could help fix some problems observe
t tested this anywhere with a DIV other an 0.
AKA: this problem was found simply by code inspection and I have no
failing test cases that are fixed by it. Presumably this could fix
real bugs for someone out there, though.
Fixes: 16a34574c6ca ("mmc: dw_mmc: remove the quirks flags")
Signed-off-
Hi Doug,
On 2017/9/28 4:56, Douglas Anderson wrote:
This attempts to instill a bit of paranoia to the code dealing with
the CTO timer. It's believed that this will make the CTO timer more
robust in the case that we're having very long interrupt latencies.
I have already got reports about the
It used "bus_hz" but, as far as I can
tell, it's supposed to use the card clock. Let's account for the div
value, which is documented as 2x the value stored in the register, or
1 if the register is 0.
Good catch.
Would you mind appending a new patch to fix the drto case?
Re
ing the new CTO timer in
the case that a voltage switch was done. Let's promote the cancel
into the dw_mci_cmd_interrupt() function to fix this.
Reviewed-by: Shawn Lin
Fixes: 03de19212ea3 ("mmc: dw_mmc: introduce timer for broken command transfer over
scheme")
Signed-off-by: Do
On 2017/9/27 2:59, Atul Garg wrote:
The Arasan controller is based on a FPGA platform and has integrated phy
with specific phy registers used during the initialization and
management of different modes. The phy and the controller are integrated
and registers are very specific to Arasan.
Arasan
Signed-off-by: Chanho Min
Reviewed-by: Adrian Hunter
---
Should move changelog out of commit msg and use 12bit SHA-1 ID.
Reviewed-by: Shawn Lin
drivers/mmc/core/mmc.c | 36 +++-
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/mmc/co
On 2017/9/12 17:42, Linus Walleij wrote:
On Fri, Sep 8, 2017 at 4:51 AM, Shawn Lin wrote:
On 2017/9/8 4:02, Linus Walleij wrote:
On Thu, Sep 7, 2017 at 9:18 AM, Ulf Hansson
wrote:
Even if this fixes the problem it seems like we are papering over the
real issue, which earlier fixes also
On 2017/9/8 4:02, Linus Walleij wrote:
On Thu, Sep 7, 2017 at 9:18 AM, Ulf Hansson wrote:
Even if this fixes the problem it seems like we are papering over the
real issue, which earlier fixes also did during the release cycle for
v4.13.
I think this is the real solution to the issue.
Anoth
+ Seraphime
On 2017/9/6 3:47, Pavel Machek wrote:
Hi!
I tried to write to the MMC card; process hung and I got this in the
dmesg.
A similar report for 4.13 cycle was here:
https://lkml.org/lkml/2017/8/10/824
Seems 4.13-rc4 was already broken for that but unfortuantely I didn't
reproduce th
and driver's remove function. And replying
on the devm_add_action_or_reset to fire the clock-disabling and reset
signal at the appropriate time.
Signed-off-by: Shawn Lin
---
Changes in v3:
- include a driver core change to fix the genpd issue.
drive
ies that devm_request_irq shouldn't exist
or at least shouldn't be used for shared irq case. Meanwhile we don't
know how many drivers have this kind of issue and need to fix. So
choice (2) makes more sense to me, and that is the reason for why we
need to fix it like what this patch
r other drivers.
Changes in v3:
- fix the code path for consolidating the attach for both of driver
and bus driver, and then move detach to the error path
- rework the changelog
- include a driver core change to fix the genpd issue.
Shawn Lin (2):
driver core: detach device's pm_domain afte
Hi Greg,
On 2017/8/29 14:42, Greg Kroah-Hartman wrote:
On Tue, Aug 15, 2017 at 04:36:56PM +0800, Shawn Lin wrote:
Move dev_pm_domain_detach after devres_release_all to avoid
accessing device's registers with genpd been powered off.
So, what is this going to break that is working al
On 2017/8/25 10:11, Brian Norris wrote:
On Thu, Aug 24, 2017 at 11:53:54AM -0500, Bjorn Helgaas wrote:
On Tue, Aug 22, 2017 at 11:19:33AM +0800, Jeffy Chen wrote:
Signed-off-by: Jeffy Chen
diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie.txt
b/Documentation/devicetree/bind
On 2017/8/23 16:40, c...@rock-chips.com wrote:
From: Liang Chen
Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.
Signed-off-by: Liang Chen
---
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 74 +
1 file changed, 74
Hi Thierry and Stephen,
commit 67e04d1ab19b0cc6d87ca7c44b058edf678bc3a3
Author: Thierry Reding
Date: Tue Aug 15 15:41:10 2017 +0200
drm/tegra: dc: Trace register accesses
Add tracepoint events for display controller register accesses.
Signed-off-by: Thierry Reding
introduce t
Hi Jeffy
On 2017/8/17 20:04, Jeffy Chen wrote:
Add support for PCIE_WAKE pin in rockchip pcie driver.
Signed-off-by: Jeffy Chen
---
Changes in v2:
Use dev_pm_set_dedicated_wake_irq
-- Suggested by Brian Norris
drivers/pci/host/pcie-rockchip.c | 13 -
1 file changed,
evice") which added an extra check
that would now be redundant.
Fixes: a99b646afa8a ("PCI: Disable PCIe Relaxed Ordering if unsupported")
Fixes: c56d4450eb68 ("PCI: Turn off Request Attributes to avoid Chelsio T5
Completion erratum")
Signed-off-by: Thierry Reding
Tested-by: Sh
already attached to an existing domain
or not, for which the previous behaviour of iommu_get_domain_for_dev()
was ideal, and who now crash if their device does not have an IOMMU.
It works, thanks!
Tested-by: Shawn Lin
With IOMMU groups now serving as a reliable indicator of whether a
device has an
Hi Marc
On 2017/8/17 16:52, Marc Zyngier wrote:
On 17/08/17 09:28, Shawn Lin wrote:
If a PCIe RC use gic-v2m or gic-v3-its as a msi domain but doesn't
have iommu support, we don't need to do iommu_dma_map_msi_msg to
get mapped iommu address as all we need is the physical address.
Ot
ommit mentioned below.
Before this commit, iommu has a work around method to fix this but now
it doesn't. So we could fix this in gic code but maybe still need a fixes
tag here.
Fixes: 05f80300dc8b ("iommu: Finish making iommu_group support mandatory")
Signed-off-by: Shawn Lin
---
dr
Hi Jeffy,
On 2017/8/16 15:52, Jeffy Chen wrote:
Add support for PCIE_WAKE pin in rockchip pcie driver.
Signed-off-by: Jeffy Chen
---
drivers/pci/host/pcie-rockchip.c | 58
1 file changed, 58 insertions(+)
diff --git a/drivers/pci/host/pcie-rockchip
Hi Jeffy
On 2017/8/16 15:52, Jeffy Chen wrote:
Add an optional interrupt for PCIE_WAKE pin.
Signed-off-by: Jeffy Chen
---
Documentation/devicetree/bindings/pci/rockchip-pcie.txt | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/binding
Hi Jeffy,
On 2017/8/16 15:52, Jeffy Chen wrote:
Currently we are handling pcie wake irq in mrvl wifi driver.
Move it to rockchip pcie driver for Gru boards.
Signed-off-by: Jeffy Chen
---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 17 +++--
1 file changed, 11 insertions(+),
Move dev_pm_domain_detach after devres_release_all to avoid
accessing device's registers with genpd been powered off.
Signed-off-by: Shawn Lin
---
Changes in v2: None
drivers/base/dd.c | 35 ++-
drivers/base/platform.c | 18 ++
2
and driver's remove function. And replying
on the devm_add_action_or_reset to fire the clock-disabling and reset
signal at the appropriate time.
Signed-off-by: Shawn Lin
---
Changes in v2:
- include a driver core change to fix the genpd issue.
drive
this's the best way to fix that,
otherwise we may need to fix it everywhere for other drivers.
These patchset was tested by hacking the driver to return a failure for probe
and also by unbinding the driver and all seem to work fine.
Changes in v2:
- include a driver core change to fix the genp
ing called.
LGTM
Reviewed-by: Shawn Lin
Signed-off-by: Wei Li
Signed-off-by: Guodong Xu
Signed-off-by: Chen Jun
---
Hi Heiko
On 2017/8/10 17:27, Heiko Stuebner wrote:
Hi Shawn,
Am Donnerstag, 10. August 2017, 16:21:13 CEST schrieb Shawn Lin:
With CONFIG_DEBUG_SHIRQ enabled, the irq tear down routine
would still access the irq handler registed as a shard irq.
Per the comment within the function of
Hi Jeffy
On 2017/8/10 16:39, jeffy wrote:
Hi shawn,
On 08/10/2017 04:21 PM, Shawn Lin wrote:
With CONFIG_DEBUG_SHIRQ enabled, the irq tear down routine
would still access the irq handler registed as a shard irq.
Per the comment within the function of __free_irq, it says
"It's a
n rockchip_pcie_read, but don't touch rockchip_pcie_write
as no case to trigger that from write routine.
Signed-off-by: Shawn Lin
---
Hi Bjorn, Thomas and Marc,
This fix looks more like a hack, but I don't know the legit way to
deal with that case. Just quick look into the drivers/pci/host
rther wise, please don't top post and inline your answer
in the previous mail so that we could better trace down the issue
we are talking about.
Thank you again and look forward to your reply!
-邮件原件-
发件人: Shawn Lin [mailto:shawn@rock-chips.com]
发送时间: 2017年8月9日 11:48
收件人: liwei (CM
On 2017/8/9 11:25, Li Wei wrote:
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
I did some comment for your v6 but probably you miss them.
And it's still incorrect for your changelog.
--
Major changes
On 2017/8/7 12:00, Shawn Lin wrote:
Hi,
I saw the log at the bottom and bisect the issue to the commits of
065ea0a7afd64d6c ("tty: improve tty_insert_flip_char() slow path")
979990c628481461 ("tty: improve tty_insert_flip_char() fast path")
I nearly could 100% reprodu
Hi,
I saw the log at the bottom and bisect the issue to the commits of
065ea0a7afd64d6c ("tty: improve tty_insert_flip_char() slow path")
979990c628481461 ("tty: improve tty_insert_flip_char() fast path")
I nearly could 100% reproduce this. Any thought?
[ 154.823106] Unable to handle kernel
On 2017/8/2 19:09, Jagan Teki wrote:
Hi,
Did anyone observing error -110 and -84 during boot on rk3288 target?
full log here[1] and used dts node is[2].
-100 is -ETIMEDOUT and -84 is CRC error. So that seems much likely HW
relevant. Have you check the SI of SD slot?
You don't enable UHS mode
In order to silent the 'W=1' compile warning:
drivers/phy/rockchip/phy-rockchip-typec.c: In function 'tcphy_get_mode':
drivers/phy/rockchip/phy-rockchip-typec.c:625:7: warning: variable 'dfp'
set but not used [-Wunused-but-set-variable]
Cc: Chris Zhong
Signed-of
hip-pcie.c would go via pci tree
for 4.14, so is it ok for Bjorn to pick this up if no objection
from Kishon, in case of merge conflict?
Anyway,
Reviewed-by: Shawn Lin
---
drivers/phy/rockchip/phy-rockchip-pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/ro
onvert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Shawn Lin
Cc: Bjorn Helgaas
Cc: Heiko Stuebner
Cc: linux-...@vger.kernel.org
Cc: linux-rockc...@lists.infradead.org
Signed-off-by: Philipp Zabel
Trim the CC list
On 2017/7/6 15:28, liwei wrote:
From: Li Wei
Add sd card support for hi3660 soc
Signed-off-by: Li Wei
Signed-off-by: Chen Jun
Major changes in v3:
- solve review comments from Heiner Kallweit.
*use the GENMASK and FIELD_PREP macros replace the bit shift operation.
);
int mmc_power_restore_host(struct mmc_host *host);
void mmc_detect_change(struct mmc_host *, unsigned long delay);
+
+/* HdG: HACK HACK HACK do not upstream */
+#define MMC_HAS_FORCE_DETECT_CHANGE
+void mmc_force_detect_change(struct mmc_host *host, unsigned long delay,
+ bool keep_power);
void mmc_request_done(struct mmc_host *, struct mmc_request *);
void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
--
Best Regards
Shawn Lin
ll drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Jaehoon Chung
Cc: Ulf Hansson
Cc: linux-...@vger.kernel.org
Signed-off-by: Philipp Zabel
Reviewed-by: Shawn Lin
---
drivers/mmc/host/dw_mmc.c | 2
r. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Shawn Lin
Cc: Bjorn Helgaas
Cc: Heiko Stuebner
Cc: linux-...@vger.kernel.org
Cc: linux-rockc...@lists.infradead.org
Signed-off-by: Phi
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