On Sun, 13 May 2018, Thomas Gleixner wrote:
> On Fri, 20 Apr 2018, Vikas Shivappa wrote:
> > +/*
> > + * Enable or disable the MBA software controller
> > + * which helps user specify bandwidth in MBps.
> > + * MBA software controller is supported only if
> > + * MBM is supported and MBA is in
On Sun, 13 May 2018, Thomas Gleixner wrote:
> On Fri, 20 Apr 2018, Vikas Shivappa wrote:
> > +/*
> > + * Enable or disable the MBA software controller
> > + * which helps user specify bandwidth in MBps.
> > + * MBA software controller is supported only if
> > + * MBM is supported and MBA is in
Hello Thomas,
I have sent a new version trying to address your feedback. Made this
more cleaner also. Would be great if you could let me know any feedback.
Regards,
Vikas
On Fri, 20 Apr 2018, Vikas Shivappa wrote:
> Sending the second version of MBA software controller which addresses
> the
Hello Thomas,
I have sent a new version trying to address your feedback. Made this
more cleaner also. Would be great if you could let me know any feedback.
Regards,
Vikas
On Fri, 20 Apr 2018, Vikas Shivappa wrote:
> Sending the second version of MBA software controller which addresses
> the
On Wed, 4 Apr 2018, Thomas Gleixner wrote:
> On Tue, 3 Apr 2018, Shivappa Vikas wrote:
> > On Tue, 3 Apr 2018, Thomas Gleixner wrote:
> > > On Thu, 29 Mar 2018, Vikas Shivappa wrote:
> > > The L2 external bandwidth is higher than the L3 external bandwidth.
> > &
On Wed, 4 Apr 2018, Thomas Gleixner wrote:
> On Tue, 3 Apr 2018, Shivappa Vikas wrote:
> > On Tue, 3 Apr 2018, Thomas Gleixner wrote:
> > > On Thu, 29 Mar 2018, Vikas Shivappa wrote:
> > > The L2 external bandwidth is higher than the L3 external bandwidth.
> > &
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
+void setup_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm)
+{
+ int i;
+
+ /*
+* Initialize the Control MSRs to having no control.
+* For Cache Allocation: Set all bits in cbm
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
+void setup_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm)
+{
+ int i;
+
+ /*
+* Initialize the Control MSRs to having no control.
+* For Cache Allocation: Set all bits in cbm
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
You said above:
This may lead to confusion in scenarios below:
Reading the blurb after that creates even more confusion than being
helpful.
First of all this
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
You said above:
This may lead to confusion in scenarios below:
Reading the blurb after that creates even more confusion than being
helpful.
First of all this
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
+Memory bandwidth(b/w) in MegaBytes
+--
+
+Memory bandwidth is a core specific mechanism which means that when the
+Memory b/w percentage is specified in the schemata per
On Tue, 3 Apr 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
+Memory bandwidth(b/w) in MegaBytes
+--
+
+Memory bandwidth is a core specific mechanism which means that when the
+Memory b/w percentage is specified in the schemata per
Hello Thomas,
On Fri, 30 Mar 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
Subject: x86/intel_rdt/mba_sc: Add support to enable/disable via mount option
Huch? From Documentation:
The ``summary phrase`` in the email's Subject should concisely
describe the
Hello Thomas,
On Fri, 30 Mar 2018, Thomas Gleixner wrote:
On Thu, 29 Mar 2018, Vikas Shivappa wrote:
Subject: x86/intel_rdt/mba_sc: Add support to enable/disable via mount option
Huch? From Documentation:
The ``summary phrase`` in the email's Subject should concisely
describe the
On Mon, 14 Aug 2017, Shivappa Vikas wrote:
On Mon, 14 Aug 2017, Thomas Gleixner wrote:
On Wed, 9 Aug 2017, Vikas Shivappa wrote:
@@ -426,6 +426,9 @@ static int domain_setup_mon_state(struct rdt_resource
*r, struct rdt_domain *d)
GFP_KERNEL
On Mon, 14 Aug 2017, Shivappa Vikas wrote:
On Mon, 14 Aug 2017, Thomas Gleixner wrote:
On Wed, 9 Aug 2017, Vikas Shivappa wrote:
@@ -426,6 +426,9 @@ static int domain_setup_mon_state(struct rdt_resource
*r, struct rdt_domain *d)
GFP_KERNEL
On Mon, 14 Aug 2017, Thomas Gleixner wrote:
On Wed, 9 Aug 2017, Vikas Shivappa wrote:
@@ -426,6 +426,9 @@ static int domain_setup_mon_state(struct rdt_resource *r,
struct rdt_domain *d)
GFP_KERNEL);
if (!d->rmid_busy_llc)
On Mon, 14 Aug 2017, Thomas Gleixner wrote:
On Wed, 9 Aug 2017, Vikas Shivappa wrote:
@@ -426,6 +426,9 @@ static int domain_setup_mon_state(struct rdt_resource *r,
struct rdt_domain *d)
GFP_KERNEL);
if (!d->rmid_busy_llc)
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
Hardware uses RMID(Resource monitoring ID) to keep track of each of the
RDT events associated with tasks. The number of RMIDs is dependent on
the SKU and is enumerated via CPUID. We add support to manage
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
Hardware uses RMID(Resource monitoring ID) to keep track of each of the
RDT events associated with tasks. The number of RMIDs is dependent on
the SKU and is enumerated via CPUID. We add support to manage
Hello Thomas,
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
Sending the V2 series to address all the feedback that was received in
V1. Apart from that this series adds a patch from Reinette to fix a
global declaration in existing RDT and also fixes
Hello Thomas,
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
Sending the V2 series to address all the feedback that was received in
V1. Apart from that this series adds a patch from Reinette to fix a
global declaration in existing RDT and also fixes
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
/*
* The cached intel_pqr_state is strictly per CPU and can never be
* updated from a remote CPU. Functions which modify the state
@@ -49,6 +47,8 @@
*/
DEFINE_PER_CPU(struct intel_pqr_state,
On Tue, 1 Aug 2017, Thomas Gleixner wrote:
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
/*
* The cached intel_pqr_state is strictly per CPU and can never be
* updated from a remote CPU. Functions which modify the state
@@ -49,6 +47,8 @@
*/
DEFINE_PER_CPU(struct intel_pqr_state,
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
{
+ struct rdtgroup *pr = rdtgrp->parent, *cr;
*pr and *cr really suck.
We used r before rdtgroup. pr would be parent rdtgrp. Wanted to keep them short
as there are more in this function.
prgrp can be used if thats not ok?
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
{
+ struct rdtgroup *pr = rdtgrp->parent, *cr;
*pr and *cr really suck.
We used r before rdtgroup. pr would be parent rdtgrp. Wanted to keep them short
as there are more in this function.
prgrp can be used if thats not ok?
On Thu, 6 Jul 2017, Thomas Gleixner wrote:
On Thu, 6 Jul 2017, Shivappa Vikas wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
+ /* Check whether cpus belong to parent ctrl group */
+ cpumask_andnot(tmpmask, newmask, >cpu_mask);
+ if (cpumask_weight(tmpm
On Thu, 6 Jul 2017, Thomas Gleixner wrote:
On Thu, 6 Jul 2017, Shivappa Vikas wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
+ /* Check whether cpus belong to parent ctrl group */
+ cpumask_andnot(tmpmask, newmask, >cpu_mask);
+ if (cpumask_weight(tmpm
On Mon, 3 Jul 2017, Thomas Gleixner wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
Thinking a bit more about that limbo mechanics.
In case that a RMID was never used on a particular package, the state check
forces an IPI on all packages unconditionally. That's suboptimal at least.
We
On Mon, 3 Jul 2017, Thomas Gleixner wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
Thinking a bit more about that limbo mechanics.
In case that a RMID was never used on a particular package, the state check
forces an IPI on all packages unconditionally. That's suboptimal at least.
We
On Thu, 6 Jul 2017, Thomas Gleixner wrote:
On Thu, 6 Jul 2017, Shivappa Vikas wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
+static bool __mon_event_count(u32 rmid, struct rmid_read *rr)
+{
+ u64 tval;
+
+ tval = __rmid_read(rmid, rr->evtid);
+ if (t
On Thu, 6 Jul 2017, Thomas Gleixner wrote:
On Thu, 6 Jul 2017, Shivappa Vikas wrote:
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
+static bool __mon_event_count(u32 rmid, struct rmid_read *rr)
+{
+ u64 tval;
+
+ tval = __rmid_read(rmid, rr->evtid);
+ if (t
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+static void mbm_update(struct rdt_domain *d, int rmid)
+{
+ struct rmid_read rr;
+
+ rr.first = false;
+ rr.d = d;
+
+ if (is_mbm_total_enabled()) {
+ rr.evtid =
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+static void mbm_update(struct rdt_domain *d, int rmid)
+{
+ struct rmid_read rr;
+
+ rr.first = false;
+ rr.d = d;
+
+ if (is_mbm_total_enabled()) {
+ rr.evtid =
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
INIT_LIST_HEAD(>evt_list);
if (rdt_mon_features & (1 << QOS_L3_OCCUP_EVENT_ID))
list_add_tail(_occupancy_event.list, >evt_list);
+ if (is_mbm_total_enabled())
+ list_add_tail(_total_event.list,
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
INIT_LIST_HEAD(>evt_list);
if (rdt_mon_features & (1 << QOS_L3_OCCUP_EVENT_ID))
list_add_tail(_occupancy_event.list, >evt_list);
+ if (is_mbm_total_enabled())
+ list_add_tail(_total_event.list,
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
DECLARE_PER_CPU_READ_MOSTLY(int, cpu_closid);
+DECLARE_PER_CPU_READ_MOSTLY(int, cpu_rmid);
DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key);
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
DECLARE_PER_CPU_READ_MOSTLY(int, cpu_closid);
+DECLARE_PER_CPU_READ_MOSTLY(int, cpu_rmid);
DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key);
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
list_for_each_entry_safe(rdtgrp, tmp, _all_groups, rdtgroup_list) {
+ /* Free any child rmids */
+ llist = >crdtgrp_list;
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
list_for_each_entry_safe(rdtgrp, tmp, _all_groups, rdtgroup_list) {
+ /* Free any child rmids */
+ llist = >crdtgrp_list;
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
Resource groups (ctrl_mon and monitor groups) are represented by
directories in resctrl fs. Add support to remove the directories.
Again. Please split that patch into two parts; seperate ctrl stuff from
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
Resource groups (ctrl_mon and monitor groups) are represented by
directories in resctrl fs. Add support to remove the directories.
Again. Please split that patch into two parts; seperate ctrl stuff from
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
Add a mon_data directory for the root rdtgroup and all other rdtgroups.
The directory holds all of the monitored data for all domains and events
of all resources being monitored.
Again. This does two
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
Add a mon_data directory for the root rdtgroup and all other rdtgroups.
The directory holds all of the monitored data for all domains and events
of all resources being monitored.
Again. This does two
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
-static ssize_t rdtgroup_cpus_write(struct kernfs_open_file *of,
- char *buf, size_t nbytes, loff_t off)
+static ssize_t cpus_mon_write(struct kernfs_open_file *of,
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
-static ssize_t rdtgroup_cpus_write(struct kernfs_open_file *of,
- char *buf, size_t nbytes, loff_t off)
+static ssize_t cpus_mon_write(struct kernfs_open_file *of,
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h
index fdf3654..fec8ba9 100644
--- a/arch/x86/kernel/cpu/intel_rdt.h
+++ b/arch/x86/kernel/cpu/intel_rdt.h
@@ -37,6 +37,8 @@
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h
index fdf3654..fec8ba9 100644
--- a/arch/x86/kernel/cpu/intel_rdt.h
+++ b/arch/x86/kernel/cpu/intel_rdt.h
@@ -37,6 +37,8 @@
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
@@ -866,6 +866,7 @@ struct task_struct {
#endif
#ifdef CONFIG_INTEL_RDT
int closid;
+ u32 rmid;
Can you please make a preparatory
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
@@ -866,6 +866,7 @@ struct task_struct {
#endif
#ifdef CONFIG_INTEL_RDT
int closid;
+ u32 rmid;
Can you please make a preparatory
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+/*
+ * Common code for ctrl_mon and monitor group mkdir.
+ * The caller needs to unlock the global mutex upon success.
+ */
+static int mkdir_rdt_common(struct kernfs_node *pkn, struct kernfs_node *prkn,
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+/*
+ * Common code for ctrl_mon and monitor group mkdir.
+ * The caller needs to unlock the global mutex upon success.
+ */
+static int mkdir_rdt_common(struct kernfs_node *pkn, struct kernfs_node *prkn,
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
@@ -82,6 +82,7 @@ struct rdt_resource rdt_resources_all[] = {
},
.parse_ctrlval = parse_cbm,
.format_str = "%d=%0*x",
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
@@ -82,6 +82,7 @@ struct rdt_resource rdt_resources_all[] = {
},
.parse_ctrlval = parse_cbm,
.format_str = "%d=%0*x",
+
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+/*
+ * Global boolean for rdt_alloc which is true if any
+ * resource allocation is enabled.
+ */
+bool rdt_alloc_enabled;
That should be rdt_alloc_capable. It's not enabled at probe time. Probing
merily
On Sun, 2 Jul 2017, Thomas Gleixner wrote:
On Mon, 26 Jun 2017, Vikas Shivappa wrote:
+/*
+ * Global boolean for rdt_alloc which is true if any
+ * resource allocation is enabled.
+ */
+bool rdt_alloc_enabled;
That should be rdt_alloc_capable. It's not enabled at probe time. Probing
merily
On Mon, 22 May 2017, Thomas Gleixner wrote:
On Mon, 17 Apr 2017, Shivappa Vikas wrote:
Hello Thomas,
Wanted to know if you had any feedback on the new interface for cqm design
which is based on monitoring the resctrl groups. It tries to address all the
requirements discussed in :
https
On Mon, 22 May 2017, Thomas Gleixner wrote:
On Mon, 17 Apr 2017, Shivappa Vikas wrote:
Hello Thomas,
Wanted to know if you had any feedback on the new interface for cqm design
which is based on monitoring the resctrl groups. It tries to address all the
requirements discussed in :
https
Besides there's another bug that we retry rotating without resetting
nr_needed and start in __intel_cqm_rmid_rotate().
Those bugs combined together led to the following oops.
WARNING: at arch/x86/kernel/cpu/perf_event_intel_cqm.c:186
__put_rmid+0x28/0x80()
...
[] __put_rmid+0x28/0x80
[]
Besides there's another bug that we retry rotating without resetting
nr_needed and start in __intel_cqm_rmid_rotate().
Those bugs combined together led to the following oops.
WARNING: at arch/x86/kernel/cpu/perf_event_intel_cqm.c:186
__put_rmid+0x28/0x80()
...
[] __put_rmid+0x28/0x80
[]
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Thu, 20 Apr 2017, Shivappa Vikas wrote:
Will fix. I went overboard not wanting to add a line
Finish reading the thread before you start :)
Got it :) Had not seen the tip bot emails on my other email..
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Thu, 20 Apr 2017, Shivappa Vikas wrote:
Will fix. I went overboard not wanting to add a line
Finish reading the thread before you start :)
Got it :) Had not seen the tip bot emails on my other email..
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Wed, 19 Apr 2017, Vikas Shivappa wrote:
}
The resulting loop is just horrible to read. We can do better than
that. Patch below.
Thanks,
tglx
8<-
--- a/arch/x86/kernel/cpu/intel_rdt_schemata.c
+++
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Wed, 19 Apr 2017, Vikas Shivappa wrote:
}
The resulting loop is just horrible to read. We can do better than
that. Patch below.
Thanks,
tglx
8<-
--- a/arch/x86/kernel/cpu/intel_rdt_schemata.c
+++
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Wed, 19 Apr 2017, Vikas Shivappa wrote:
Schemata is displayed in tabular format which introduces some whitespace
to show data in a tabular format. If user wants to input the same data
that is displayed, the parsing fails. Trim the leading and
On Thu, 20 Apr 2017, Thomas Gleixner wrote:
On Wed, 19 Apr 2017, Vikas Shivappa wrote:
Schemata is displayed in tabular format which introduces some whitespace
to show data in a tabular format. If user wants to input the same data
that is displayed, the parsing fails. Trim the leading and
Hello Thomas,
Wanted to know if you had any feedback on the new interface for cqm design which
is based on monitoring the resctrl groups. It tries to address all the
requirements discussed in :
https://marc.info/?l=linux-kernel=148891934720489
-basically to monitor resctrl groups / per
Hello Thomas,
Wanted to know if you had any feedback on the new interface for cqm design which
is based on monitoring the resctrl groups. It tries to address all the
requirements discussed in :
https://marc.info/?l=linux-kernel=148891934720489
-basically to monitor resctrl groups / per
On Fri, 14 Apr 2017, Shivappa Vikas wrote:
On Fri, 14 Apr 2017, Thomas Gleixner wrote:
Please do the following:
1) Verify that it still works as I have no hardware to test it. Once you
confirmed, it's going to show up in -next. So please do that ASAP,
i.e. yesterday.
2) Go through
On Fri, 14 Apr 2017, Shivappa Vikas wrote:
On Fri, 14 Apr 2017, Thomas Gleixner wrote:
Please do the following:
1) Verify that it still works as I have no hardware to test it. Once you
confirmed, it's going to show up in -next. So please do that ASAP,
i.e. yesterday.
2) Go through
On Fri, 14 Apr 2017, Thomas Gleixner wrote:
On Thu, 13 Apr 2017, Thomas Gleixner wrote:
On Wed, 12 Apr 2017, Shivappa Vikas wrote:
This series has minor changes with respect to V3 addressing all your comments.
Was wondering if there was any feedback or if we still have a chance for 4.12
On Fri, 14 Apr 2017, Thomas Gleixner wrote:
On Thu, 13 Apr 2017, Thomas Gleixner wrote:
On Wed, 12 Apr 2017, Shivappa Vikas wrote:
This series has minor changes with respect to V3 addressing all your comments.
Was wondering if there was any feedback or if we still have a chance for 4.12
Hello Thomas,
This series has minor changes with respect to V3 addressing all your comments.
Was wondering if there was any feedback or if we still have a chance for 4.12.
Thanks,
Vikas
On Fri, 7 Apr 2017, Vikas Shivappa wrote:
Sending another version of MBA patch series with changes to V3
Hello Thomas,
This series has minor changes with respect to V3 addressing all your comments.
Was wondering if there was any feedback or if we still have a chance for 4.12.
Thanks,
Vikas
On Fri, 7 Apr 2017, Vikas Shivappa wrote:
Sending another version of MBA patch series with changes to V3
On Mon, 10 Apr 2017, Thomas Gleixner wrote:
On Wed, 5 Apr 2017, Luck, Tony wrote:
On Wed, Apr 05, 2017 at 05:20:24PM +0200, Thomas Gleixner wrote:
That's just wrong.
The proper behaviour for a new control group is, that at the time when it
is created it copies the CBM values of the default
On Mon, 10 Apr 2017, Thomas Gleixner wrote:
On Wed, 5 Apr 2017, Luck, Tony wrote:
On Wed, Apr 05, 2017 at 05:20:24PM +0200, Thomas Gleixner wrote:
That's just wrong.
The proper behaviour for a new control group is, that at the time when it
is created it copies the CBM values of the default
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
/**
+ * struct rdt_domain - group of cpus sharing an RDT resource
+ * @list: all instances of this resource
+ * @id:unique id for this instance
+ * @cpu_mask: which cpus share this
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
/**
+ * struct rdt_domain - group of cpus sharing an RDT resource
+ * @list: all instances of this resource
+ * @id:unique id for this instance
+ * @cpu_mask: which cpus share this
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
+Cache resource(L3/L2) subdirectory contains the following files:
-"num_closids": The number of CLOSIDs which are valid for this
- resource. The kernel uses the smallest number of
-
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
+Cache resource(L3/L2) subdirectory contains the following files:
-"num_closids": The number of CLOSIDs which are valid for this
- resource. The kernel uses the smallest number of
-
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
Subject: x86/intel_rdt: Fix issue when mkdir uses a freed CLOSid
This subject line is useless again. It want's to be descriptive.
"Fix issue" Which issue?
Each resctrl directory has one CLOSid
On Wed, 5 Apr 2017, Thomas Gleixner wrote:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
Subject: x86/intel_rdt: Fix issue when mkdir uses a freed CLOSid
This subject line is useless again. It want's to be descriptive.
"Fix issue" Which issue?
Each resctrl directory has one CLOSid
On Mon, 3 Apr 2017, Tracy Smith wrote:
Hi All,
No JTAG available and need to understand why Linux 4.8.3 doesn't boot on a
x86_64 corei7-64. Hangs at the typical "Starting kernel" location after
the last message of the U-boot. The bootcmd is given below.
Do you see the issue when you
On Mon, 3 Apr 2017, Tracy Smith wrote:
Hi All,
No JTAG available and need to understand why Linux 4.8.3 doesn't boot on a
x86_64 corei7-64. Hangs at the typical "Starting kernel" location after
the last message of the U-boot. The bootcmd is given below.
Do you see the issue when you
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
Explains the design for the interface
Explains the design for the new resctrl based cqm interface. A followup
with design document after the requirements for new cqm was reviewed :
https://marc.info/?l=linux-kernel=148891934720489
Signed-off-by:
On Mon, 3 Apr 2017, Vikas Shivappa wrote:
Explains the design for the interface
Explains the design for the new resctrl based cqm interface. A followup
with design document after the requirements for new cqm was reviewed :
https://marc.info/?l=linux-kernel=148891934720489
Signed-off-by:
On Fri, 24 Mar 2017, Luck, Tony wrote:
+++ b/arch/x86/kernel/cpu/intel_rdt_schemata.c
@@ -56,7 +56,7 @@ static bool cbm_validate(unsigned long var, struct
rdt_resource *r)
* Read one cache bit mask (hex). Check that it is valid for the current
* resource type.
*/
-static int
On Fri, 24 Mar 2017, Luck, Tony wrote:
+++ b/arch/x86/kernel/cpu/intel_rdt_schemata.c
@@ -56,7 +56,7 @@ static bool cbm_validate(unsigned long var, struct
rdt_resource *r)
* Read one cache bit mask (hex). Check that it is valid for the current
* resource type.
*/
-static int
On Fri, 31 Mar 2017, Thomas Gleixner wrote:
On Fri, 24 Mar 2017, Luck, Tony wrote:
+Reading/writing the schemata file
+-
+Reading the schemata file will show the state of all resources
+on all domains. When writing you only need to specify those values
+which
On Fri, 31 Mar 2017, Thomas Gleixner wrote:
On Fri, 24 Mar 2017, Luck, Tony wrote:
+Reading/writing the schemata file
+-
+Reading the schemata file will show the state of all resources
+on all domains. When writing you only need to specify those values
+which
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
Subject: x86/intel_rdt: schemata file support for MBA prepare
I have no idea what MBA prepare is. Is that yet another variant aside of
MBE?
Add support to introduce generic APIs for control validation
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
Subject: x86/intel_rdt: schemata file support for MBA prepare
I have no idea what MBA prepare is. Is that yet another variant aside of
MBE?
Add support to introduce generic APIs for control validation
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
WARN_ON(c->x86_cache_occ_scale != cqm_l3_scale);
@@ -1585,12 +1580,17 @@ static int intel_cqm_cpu_starting(unsigned int cpu)
static int intel_cqm_cpu_exit(unsigned int cpu)
{
+ struct intel_pqr_state *state = _cpu(pqr_state, cpu);
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
WARN_ON(c->x86_cache_occ_scale != cqm_l3_scale);
@@ -1585,12 +1580,17 @@ static int intel_cqm_cpu_starting(unsigned int cpu)
static int intel_cqm_cpu_exit(unsigned int cpu)
{
+ struct intel_pqr_state *state = _cpu(pqr_state, cpu);
On Fri, 24 Mar 2017, Fenghua Yu wrote:
On Fri, Mar 24, 2017 at 10:51:58AM -0700, Luck, Tony wrote:
From: Tony Luck
The schemata file can have multiple lines and it is cumbersome to
update from shell scripts.
"from shell scripts" makes people a bit confused. Not just
On Fri, 24 Mar 2017, Fenghua Yu wrote:
On Fri, Mar 24, 2017 at 10:51:58AM -0700, Luck, Tony wrote:
From: Tony Luck
The schemata file can have multiple lines and it is cumbersome to
update from shell scripts.
"from shell scripts" makes people a bit confused. Not just shell scripts,
C or
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
Add files in info directory for MBA.
The files in the info directory are as follows :
- num_closids: max number of closids for MBA which represents the max
class of service user can configure.
- min_bw:
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
Add files in info directory for MBA.
The files in the info directory are as follows :
- num_closids: max number of closids for MBA which represents the max
class of service user can configure.
- min_bw:
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
As a preparatory patch to MBA info file setup, generalize the info file
setup to have the option to choose between different set of files.
Although multiple cache resources have same info files, Memory
On Wed, 1 Mar 2017, Thomas Gleixner wrote:
On Fri, 17 Feb 2017, Vikas Shivappa wrote:
As a preparatory patch to MBA info file setup, generalize the info file
setup to have the option to choose between different set of files.
Although multiple cache resources have same info files, Memory
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