Hi Changman,
On Mon, Nov 24, 2014 at 11:46:46AM +0900, Changman Lee wrote:
> Hi Simon,
> Thanks for your explanation kindly.
>
> On Sun, Nov 23, 2014 at 11:08:54AM +0100, Simon Baatz wrote:
> > Hi Changman, Jaegeuk,
> >
> > On Thu, Nov 20, 2014 at 05:47:29PM +0900
Hi Changman, Jaegeuk,
On Thu, Nov 20, 2014 at 05:47:29PM +0900, Changman Lee wrote:
> On Wed, Nov 19, 2014 at 10:45:33PM -0800, Jaegeuk Kim wrote:
> > On Thu, Nov 20, 2014 at 03:04:10PM +0900, Changman Lee wrote:
> > > Hi Jaegeuk,
> > >
> > > We should call flush_dcache_page before kunmap because
Hi Mikulas,
On Sat, Jan 04, 2014 at 12:45:45PM -0500, Mikulas Patocka wrote:
> The patch 8456a648cf44f14365f1f44de90a3da2526a4776 causes crash in the
> LVM2 testsuite on PA-RISC (the crashing test is fsadm.sh). The testsuite
> doesn't crash on 3.12, crashes on 3.13-rc1 and later.
>
> Bad Address
Hi Helge,
On Sun, Nov 17, 2013 at 10:23:08PM +0100, Helge Deller wrote:
> On 11/16/2013 09:09 PM, Benjamin LaHaise wrote:
> > On Sat, Nov 16, 2013 at 09:07:18PM +0100, Simon Baatz wrote:
> >> On Fri, Nov 15, 2013 at 02:42:05PM -0800, James Bottomley wrote:
> >>> On
On Fri, Nov 15, 2013 at 02:42:05PM -0800, James Bottomley wrote:
> On Fri, 2013-11-15 at 23:05 +0100, Helge Deller wrote:
> > When a user page mapping is released via kunmap*() functions, the D-cache
> > needs
> > to be flushed via flush_dcache_page() to avoid D-cache aliasing issues.
> >
> > Thi
() is triggered.
>
> Aaro Koskinen reported the bug on ARM/kirkwood when DEBUG_VM is enabled,
> and this patch fixes the bug by adding test of '!PageSlab(miter->page)'
> before calling flush_kernel_dcache_page().
>
> Reported-by: Aaro Koskinen
> Cc: Russell K
On Sun, Oct 27, 2013 at 07:51:15PM +0800, Ming Lei wrote:
> diff --git a/lib/scatterlist.c b/lib/scatterlist.c
> index a685c8a..eea8806 100644
> --- a/lib/scatterlist.c
> +++ b/lib/scatterlist.c
> @@ -577,7 +577,7 @@ void sg_miter_stop(struct sg_mapping_iter *miter)
> miter->__offset
Hi Russell,
On Sun, Oct 27, 2013 at 01:53:44PM +, Russell King - ARM Linux wrote:
> On Sun, Oct 27, 2013 at 09:16:53PM +0800, Ming Lei wrote:
> > On Sun, Oct 27, 2013 at 8:50 PM, Aaro Koskinen wrote:
> > >
> So...
>
> flush_kernel_dcache_page() is expected to take a struct page pointer.
> Th
Hi Ben, Luis,
On Wed, Jun 26, 2013 at 10:04:11AM +0100, Luis Henriques wrote:
> Ben Hutchings writes:
>
> > 3.2.48-rc1 review patch. If anyone has any objections, please let me know.
> >
> > ------
> >
> > From: Simon Baatz
> >
> >
Hi Sebastian,
On Tue, May 21, 2013 at 06:41:49PM +0200, Sebastian Hesselbarth wrote:
> With DT support for mv643xx_eth, board specific init for some boards now
> is unneccessary. Remove those board files, Kconfig entries, and
> corresponding entries in kirkwood_defconfig.
>
> Signed-off-by: Sebas
Hi Sebastian,
On Mon, May 06, 2013 at 05:33:39PM +0200, Sebastian Hesselbarth wrote:
> This patch adds mv643xx_eth and mvmdio device tree nodes for DT enabled
> Kirkwood boards. Phy nodes are also added with reg property set on a
> per-board basis.
...
> diff --git a/arch/arm/boot/dts/kirkwood.dts
gt; Cc: Florian Fainelli
> Cc: Arnaud Patard
> Cc: Russell King
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Jean-Francois Moine
> Cc: Thomas Petazzoni
> Cc: Simon Guinot
> Cc: Jamie Lentin
> Cc: Michael Walle
> Cc: Eric Hutter
> Cc: Joshua Coombs
> Cc:
and when loading
> the module, the MAC address is gone.
>
> Proper DT support for the mv643xx_eth driver is expected soon, so we add
> a workaround to always enable ge0/ge1 clocks on kirkwood. This workaround
> is also already used on non-DT kirkwood kernels.
>
> Reported-by
On Thu, Sep 13, 2012 at 01:38:50PM +0100, Catalin Marinas wrote:
> On Wed, Sep 12, 2012 at 10:55:54PM +0100, Simon Baatz wrote:
> > On Wed, Sep 12, 2012 at 10:29:54AM +0100, Catalin Marinas wrote:
> ...
>
> > In case of direct I/O (and probably also in other cases like SG_IO
Hi Catalin,
On Wed, Sep 12, 2012 at 10:29:54AM +0100, Catalin Marinas wrote:
>
> > > +void __flush_dcache_page(struct address_space *mapping, struct page
> > > *page)
> > > +{
> > > + __flush_dcache_area(page_address(page), PAGE_SIZE);
> > > +}
> > > +
> > > +void __sync_icache_dcache(pte_t
Hi Catalin,
On Fri, Sep 07, 2012 at 05:26:44PM +0100, Catalin Marinas wrote:
> The patch adds functionality required for cache maintenance. The AArch64
> architecture mandates non-aliasing VIPT or PIPT D-cache and VIPT (may
> have aliases) or ASID-tagged VIVT I-cache. Cache maintenance operations
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