Re: [PATCH] arm: socfpga: execute cold reboot by default

Am 08.05.2019 um 03:37 schrieb Dinh Nguyen: On 5/3/19 4:15 AM, Simon Goldschmidt wrote: This changes system reboot for socfpga to issue a cold reboot by default instead of a warm reboot. Warm reboot can still be used by setting reboot_mode to REBOOT_WARM (e.g. via kernel command line 'r

Re: [PATCH] mtd: spi-nor: enable 4B opcodes for n25q256a

On Fri, May 3, 2019 at 12:00 PM Marek Vasut wrote: > > On 5/3/19 10:53 AM, Simon Goldschmidt wrote: > > Tested on socfpga cyclone5 where this is required to ensure that the > > boot rom can access this flash after warm reboot. > > Are you sure _all_ variants of the N25

[PATCH] arm: socfpga: execute cold reboot by default

ARD. Also, cold reboot is more fail safe than warm reboot has some issues at least fo CSEL=0 and BSEL=qspi, where the boot rom does not set the qspi clock to a valid range. Signed-off-by: Simon Goldschmidt --- See discussion in this thread on the u-boot ML: https://lists.denx.de/pipermail/u

[PATCH] mtd: spi-nor: enable 4B opcodes for n25q256a

Tested on socfpga cyclone5 where this is required to ensure that the boot rom can access this flash after warm reboot. Signed-off-by: Simon Goldschmidt --- drivers/mtd/spi-nor/spi-nor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers

Re: [PATCH] ARM: socfpga: fix base address of SDR controller

Am 01.02.2019 um 16:13 schrieb Dinh Nguyen: On 1/30/19 12:00 AM, Simon Goldschmidt wrote: + Marek (as I really want to keep the dts in Linux and U-Boot in sync) So can you wait until your patch in U-Boot is in? Well, yes, this could wait. The problem is we wanted to keep Linux and U-Boot

Re: [PATCH] ARM: socfpga: fix base address of SDR controller

Am 30.01.2019 um 16:50 schrieb Dinh Nguyen: On 1/30/19 12:00 AM, Simon Goldschmidt wrote: + Marek (as I really want to keep the dts in Linux and U-Boot in sync) On Wed, Jan 30, 2019 at 1:16 AM Dinh Nguyen wrote: On 1/29/19 2:08 PM, Simon Goldschmidt wrote: From: Simon Goldschmidt The

Re: [PATCH] ARM: socfpga: fix base address of SDR controller

On Tue, Jan 29, 2019 at 11:31 PM Alan Tull wrote: > > On Tue, Jan 29, 2019 at 2:09 PM Simon Goldschmidt > wrote: > > Hi Simon, > > Thanks for submitting. A couple of things... > > > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi

Re: [PATCH] ARM: socfpga: fix base address of SDR controller

+ Marek (as I really want to keep the dts in Linux and U-Boot in sync) On Wed, Jan 30, 2019 at 1:16 AM Dinh Nguyen wrote: > > > > On 1/29/19 2:08 PM, Simon Goldschmidt wrote: > > From: Simon Goldschmidt > > > > The documentation for socfpga gen5 says the base addre

[PATCH] ARM: socfpga: fix base address of SDR controller

From: Simon Goldschmidt The documentation for socfpga gen5 says the base address of the sdram controller is 0xffc2, while the current devicetree says it is at 0xffc25000. While this is not a problem for Linux, as it only accesses the registers above 0xffc25000, it *is* a problem for U-Boot

Re: [PATCH] ARM: dts: socfpga: update more missing reset properties

Am 29.01.2019 um 20:46 schrieb Simon Goldschmidt: Add reset property for dma, can and sdram on socfpga gen5. Signed-off-by: Simon Goldschmidt That should have been: Signed-off-by: Simon Goldschmidt Regards, Simon --- This series applies on top of kernel/git/dinguyen/linux.git, branch

[PATCH] ARM: dts: socfpga: update more missing reset properties

Add reset property for dma, can and sdram on socfpga gen5. Signed-off-by: Simon Goldschmidt --- This series applies on top of kernel/git/dinguyen/linux.git, branch socfpga_for_next_v5.1_dts_v1 arch/arm/boot/dts/socfpga.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm

[PATCH] ARM: dts: socfpga: use tabs for indentation

In two of the gen5 socfpga devicetree files, there are some lines indented using spaces instead of tabs. Fix this by correctly indenting them with tabs. Signed-off-by: Simon Goldschmidt --- arch/arm/boot/dts/socfpga.dtsi | 2 +- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 4

[PATCH RESEND] arm: dts: socfpga*.dts*: use SPDX-License-Identifier

Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt --- Resending this as requested by Dinh. It still applies on top of 4.20-rc1 as it only touches the file headers and nothing has changed

Re: [PATCH] arm: dts: socfpga*.dts*: use SPDX-License-Identifier

On 29.10.2018 16:33, Dinh Nguyen wrote: Hi Simon, On 10/23/2018 02:08 PM, Simon Goldschmidt wrote: Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt --- arch/arm/boot/dts/socfpga.dtsi

[PATCH] arm: dts: socfpga*.dts*: use SPDX-License-Identifier

Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt --- arch/arm/boot/dts/socfpga.dtsi| 16 +-- arch/arm/boot/dts/socfpga_arria10.dtsi| 13 +- arch/arm/boot

Re: [PATCH v3] spi: dw: support 4-16 bits per word

On Thu, Sep 6, 2018 at 3:23 PM Mark Brown wrote: > > On Thu, Sep 06, 2018 at 01:23:34PM +0200, Simon Goldschmidt wrote: > > On Thu, Sep 6, 2018 at 1:09 PM Mark Brown wrote: > > > > Please don't send new patches in reply to old patch serieses, it makes > > >

Re: [PATCH v3] spi: dw: support 4-16 bits per word

On Thu, Sep 6, 2018 at 1:09 PM Mark Brown wrote: > > On Tue, Sep 04, 2018 at 09:49:44PM +0200, Simon Goldschmidt wrote: > > The spi-dw driver currently only supports 8 or 16 bits per word. > > > > Since the hardware supports 4-16 bits per word, adapt the driver

[PATCH v3] spi: dw: support 4-16 bits per word

The spi-dw driver currently only supports 8 or 16 bits per word. Since the hardware supports 4-16 bits per word, adapt the driver to also support this. Tested on socfpga cyclone5 with a 9-bit SPI display. Signed-off-by: Simon Goldschmidt Reviewed-by: Andy Shevchenko --- Changes in v3 - remove

Re: [PATCH v2] spi: dw: support 4-16 bits per word

On Fri, Aug 17, 2018 at 6:32 PM Trent Piepho wrote: > > On Fri, 2018-08-17 at 09:01 +0200, Simon Goldschmidt wrote: > > The spi-dw driver currently only supports 8 or 16 bits per word. > > > > Since the hardware supports 4-16 bits per word, adapt the driver

[PATCH v2] spi: dw: support 4-16 bits per word

The spi-dw driver currently only supports 8 or 16 bits per word. Since the hardware supports 4-16 bits per word, adapt the driver to also support this. Tested on socfpga cyclone5 with a 9-bit SPI display. Signed-off-by: Simon Goldschmidt --- Changes in v2: - use DIV_ROUND_UP to calculate

Re: [PATCH] ARM: dts: socfpga: use stdout-path for chosen node

On Wed, Aug 8, 2018 at 1:32 PM Marek Vasut wrote: > > On 08/08/2018 11:09 AM, Simon Goldschmidt wrote: > > Use stdout-path dts property for kernel console. > > > > There were two socfpga boards left not using stdout-path: > > socrates and vining. Make su

Re: [PATCH] spi: dw: support 4-16 bits per word

On Wed, Aug 8, 2018 at 11:45 AM Andy Shevchenko wrote: > > On Wed, Aug 8, 2018 at 10:14 AM, Simon Goldschmidt > wrote: > > The spi-dw driver currently only supports 8 or 16 bits per word. > > > > Since the hardware supports 4-16 bits per word, adapt the driv

[PATCH] ARM: dts: socfpga: use stdout-path for chosen node

Use stdout-path dts property for kernel console. There were two socfpga boards left not using stdout-path: socrates and vining. Make sure they match the other boards. Signed-off-by: Simon Goldschmidt --- arch/arm/boot/dts/socfpga_cyclone5_socrates.dts| 3 ++- arch/arm/boot/dts

[PATCH] spi: dw: support 4-16 bits per word

The spi-dw driver currently only supports 8 or 16 bits per word. Since the hardware supports 4-16 bits per word, adapt the driver to also support this. Tested on socfpga cyclone5 with a 9-bit SPI display. Signed-off-by: Simon Goldschmidt --- drivers/spi/spi-dw.c | 10 +- 1 file