Re: [PATCH] locking/qrwlock: Fix ordering in queued_write_lock_slowpath

rably annotated a bit like Peter's example to show the READ_ONCE() being speculated. I can confirm that this patch fixes a problem observed in ep_scan_ready_list(.) whereby ovflist appeared to change when the write lock was held. So please feel free to add: Tested-by: Steve Capper Also, I have

Re: "arm64/for-next/core" causes boot panic

On Tue, Aug 13, 2019 at 03:04:52PM +0100, Steve Capper wrote: > Hi Will, > > On Tue, Aug 13, 2019 at 01:06:44PM +0100, Will Deacon wrote: > > [+Steve] > > > > On Tue, Aug 13, 2019 at 11:58:52AM +0100, Will Deacon wrote: > > > On Tue, Aug 13, 2019 at

Re: "arm64/for-next/core" causes boot panic

Hi Will, On Tue, Aug 13, 2019 at 01:06:44PM +0100, Will Deacon wrote: > [+Steve] > > On Tue, Aug 13, 2019 at 11:58:52AM +0100, Will Deacon wrote: > > On Tue, Aug 13, 2019 at 10:02:01AM +0100, Will Deacon wrote: > > > On Mon, Aug 12, 2019 at 05:51:35PM -0400, Qian Cai wrote: > > > > Booting

Re: [PATCH V6 3/3] arm64/mm: Enable memory hot remove

> procedure on X86 architecture. > > Acked-by: David Hildenbrand > Signed-off-by: Anshuman Khandual > --- FWIW: Acked-by: Steve Capper One minor comment below though. > arch/arm64/Kconfig | 3 + > arch/arm64/mm/mmu.c | 290 > ++

Re: [PATCH] arm64: hugetlb: Register hugepages during arch init

gt; return 0; > } > __setup("hugepagesz=", setup_hugepagesz); > - > -#ifdef CONFIG_ARM64_64K_PAGES > -static __init int add_default_hugepagesz(void) > -{ > - if (size_to_hstate(CONT_PTES * PAGE_SIZE) == NULL) > - hugetlb_add_hstate(CONT_PTE_

Re: [PATCH] arm64: hugetlb: Register hugepages during arch init

gt; return 0; > } > __setup("hugepagesz=", setup_hugepagesz); > - > -#ifdef CONFIG_ARM64_64K_PAGES > -static __init int add_default_hugepagesz(void) > -{ > - if (size_to_hstate(CONT_PTES * PAGE_SIZE) == NULL) > - hugetlb_add_hstate(CONT_PTE_

Re: [PATCH V3 5/5] arm64/mm: Enable HugeTLB migration for contiguous bit HugeTLB pages

2M32M 1G > 16K:2M 32M 1G > 64K:2M512M16G > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > arch/arm64/include/asm/hugetlb.h | 5 + > arch/arm64/mm/hugetlbpage.

Re: [PATCH V3 5/5] arm64/mm: Enable HugeTLB migration for contiguous bit HugeTLB pages

2M32M 1G > 16K:2M 32M 1G > 64K:2M512M16G > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > arch/arm64/include/asm/hugetlb.h | 5 + > arch/arm64/mm/hugetlbpage.

Re: [PATCH V3 3/5] mm/hugetlb: Enable arch specific huge page size support for migration

hich checks standard huge page order. > But an architecture can choose to override the default and provide support > for a comprehensive set of huge page sizes. > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > include/l

Re: [PATCH V3 3/5] mm/hugetlb: Enable arch specific huge page size support for migration

hich checks standard huge page order. > But an architecture can choose to override the default and provide support > for a comprehensive set of huge page sizes. > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > include/l

Re: [PATCH V3 4/5] arm64/mm: Enable HugeTLB migration

CONT PTEPMDCONT PMDPUD >------ > 4K: NA 2M NA 1G > 16K:NA32M NA > 64K:NA 512M NA > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by

Re: [PATCH V3 4/5] arm64/mm: Enable HugeTLB migration

CONT PTEPMDCONT PMDPUD >------ > 4K: NA 2M NA 1G > 16K:NA32M NA > 64K:NA 512M NA > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by

Re: [PATCH V3 2/5] mm/hugetlb: Enable PUD level huge page migration

PUD_SHIFT > order based HugeTLB pages during migration. > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > include/linux/hugetlb.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/linux

Re: [PATCH V3 2/5] mm/hugetlb: Enable PUD level huge page migration

PUD_SHIFT > order based HugeTLB pages during migration. > > Reviewed-by: Naoya Horiguchi > Signed-off-by: Anshuman Khandual Reviewed-by: Steve Capper > --- > include/linux/hugetlb.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/linux

Re: [PATCH V3 1/5] mm/hugetlb: Distinguish between migratability and movability

ble to be > placed under a movable zone. At present it just checks for gigantic pages > but going forward it can incorporate other enhanced checks. > > Reviewed-by: Naoya Horiguchi > Suggested-by: Michal Hocko > Signed-off-by: Anshuman Khandual FWIW: Reviewed-by: Steve Capper

Re: [PATCH V3 1/5] mm/hugetlb: Distinguish between migratability and movability

ble to be > placed under a movable zone. At present it just checks for gigantic pages > but going forward it can incorporate other enhanced checks. > > Reviewed-by: Naoya Horiguchi > Suggested-by: Michal Hocko > Signed-off-by: Anshuman Khandual FWIW: Reviewed-by: Steve Capper

Re: [PATCH V2] arm64: hwpoison: add VM_FAULT_HWPOISON[_LARGE] handling

y handled by the generic layer code. >> >> Signed-off-by: Punit Agrawal <punit.agra...@arm.com> >> Cc: Catalin Marinas <catalin.mari...@arm.com> >> Cc: Steve Capper <steve.cap...@arm.com> >> --- >> arch/arm64/mm/hugetlbpage.c | 11 ++-

Re: [PATCH V2] arm64: hwpoison: add VM_FAULT_HWPOISON[_LARGE] handling

elow >> when munmap is called on poisoned hugepages. >> >> [ 344.165544] mm/pgtable-generic.c:33: bad pmd 00083af00074. >> >> Fix huge_pte_offset() to return the poisoned PMD which is then >> appropriately handled by the generic layer code. >> >> Sign

Re: [PATCH v3 0/2] iov_iter: allow iov_iter_get_pages_alloc to allocate more pages per call

On Fri, Feb 03, 2017 at 11:28:48AM -0800, Linus Torvalds wrote: > On Fri, Feb 3, 2017 at 11:08 AM, Al Viro wrote: > > > > On x86 it does. I don't see anything equivalent in mm/gup.c one, and the > > only kinda-sorta similar thing (access_ok() in __get_user_pages_fast() >

Re: [PATCH v3 0/2] iov_iter: allow iov_iter_get_pages_alloc to allocate more pages per call

On Fri, Feb 03, 2017 at 11:28:48AM -0800, Linus Torvalds wrote: > On Fri, Feb 3, 2017 at 11:08 AM, Al Viro wrote: > > > > On x86 it does. I don't see anything equivalent in mm/gup.c one, and the > > only kinda-sorta similar thing (access_ok() in __get_user_pages_fast() > > there) is vulnerable

[PATCH v2] rmap: Fix compound check logic in page_remove_file_rmap

om> Cc: Andrew Morton <a...@linux-foundation.org> Signed-off-by: Steve Capper <steve.cap...@arm.com> --- v2 - switch to PageHead as suggested by Kirill. --- mm/rmap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mm/rmap.c b/mm/rmap.c index 709bc83..1180340 10

[PATCH v2] rmap: Fix compound check logic in page_remove_file_rmap

ransHuge(.) will always return false, provoking BUGs when one runs the libhugetlbfs test suite. This patch replaces PageTransHuge(), with PageHead() which will work for both HugeTLB and THP. Fixes: dd78fedde4b9 ("rmap: support file thp") Cc: Kirill A. Shutemov Cc: Andrew Morton Signed-off-by: Stev

[PATCH] rmap: Fix compound check logic in page_remove_file_rmap

) Fixes: dd78fedde4b9 ("rmap: support file thp") Cc: Kirill A. Shutemov <kirill.shute...@linux.intel.com> Cc: Andrew Morton <a...@linux-foundation.org> Signed-off-by: Steve Capper <steve.cap...@arm.com> --- mm/rmap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH] rmap: Fix compound check logic in page_remove_file_rmap

) Fixes: dd78fedde4b9 ("rmap: support file thp") Cc: Kirill A. Shutemov Cc: Andrew Morton Signed-off-by: Steve Capper --- mm/rmap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mm/rmap.c b/mm/rmap.c index 709bc83..ad8fc51 100644 --- a/mm/rmap.c +++ b/mm/rmap.c

Re: [PATCH] arm64: Add config to limit user space to 47bits

Hi Alex, Thanks for posting this. On Wed, Jul 13, 2016 at 06:14:11PM +0200, Alexander Graf wrote: > On 07/13/2016 05:59 PM, Ard Biesheuvel wrote: > >On 13 July 2016 at 17:42, Alexander Graf wrote: > >>Some user space applications are known to break with 48 bits virtual > >known

Re: [PATCH] arm64: Add config to limit user space to 47bits

Hi Alex, Thanks for posting this. On Wed, Jul 13, 2016 at 06:14:11PM +0200, Alexander Graf wrote: > On 07/13/2016 05:59 PM, Ard Biesheuvel wrote: > >On 13 July 2016 at 17:42, Alexander Graf wrote: > >>Some user space applications are known to break with 48 bits virtual > >known by whom? At

Re: [PATCH v16 1/6] efi: ARM/arm64: ignore DT memory nodes instead of removing them

On Thu, Apr 14, 2016 at 01:10:35PM +0200, Ard Biesheuvel wrote: > On 14 April 2016 at 13:02, Steve Capper <steve.cap...@arm.com> wrote: > > On Fri, Apr 08, 2016 at 03:50:23PM -0700, David Daney wrote: > >> From: Ard Biesheuvel <ard.biesheu...@linaro.org> &g

Re: [PATCH v16 1/6] efi: ARM/arm64: ignore DT memory nodes instead of removing them

On Thu, Apr 14, 2016 at 01:10:35PM +0200, Ard Biesheuvel wrote: > On 14 April 2016 at 13:02, Steve Capper wrote: > > On Fri, Apr 08, 2016 at 03:50:23PM -0700, David Daney wrote: > >> From: Ard Biesheuvel > >> > >> There are two problems with the UEFI stub

Re: [PATCH v16 1/6] efi: ARM/arm64: ignore DT memory nodes instead of removing them

On Fri, Apr 08, 2016 at 03:50:23PM -0700, David Daney wrote: > From: Ard Biesheuvel > > There are two problems with the UEFI stub DT memory node removal > routine: > - it deletes nodes as it traverses the tree, which happens to work > but is not supported, as

Re: [PATCH v16 1/6] efi: ARM/arm64: ignore DT memory nodes instead of removing them

On Fri, Apr 08, 2016 at 03:50:23PM -0700, David Daney wrote: > From: Ard Biesheuvel > > There are two problems with the UEFI stub DT memory node removal > routine: > - it deletes nodes as it traverses the tree, which happens to work > but is not supported, as deletion invalidates the node

Re: [PATCH v16 6/6] arm64, mm, numa: Add NUMA balancing support for arm64.

} > + > +static inline int pmd_protnone(pmd_t pmd) > +{ > + return pte_protnone(pmd_pte(pmd)); > +} > +#endif > + Okay, this looks good to me. If we have a PROT_NONE VMA then this is caught before going into do_numa_page or do_huge_pmd_numa_page (and there is a BUG_ON insi

Re: [PATCH v16 6/6] arm64, mm, numa: Add NUMA balancing support for arm64.

+} > +#endif > + Okay, this looks good to me. If we have a PROT_NONE VMA then this is caught before going into do_numa_page or do_huge_pmd_numa_page (and there is a BUG_ON inside these functions to catch stragglers. I've given this a quick test with a P

Re: [PATCH v15 5/6] arm64, numa: Add NUMA support for arm64 platforms.

On Wed, Apr 13, 2016 at 03:09:08PM +0100, Steve Capper wrote: > On Tue, Mar 08, 2016 at 11:59:46PM +, David Daney wrote: > > From: Ganapatrao Kulkarni <gkulka...@caviumnetworks.com> > > > > Attempt to get the memory and CPU NUMA node via of_numa. If that > &

Re: [PATCH v15 5/6] arm64, numa: Add NUMA support for arm64 platforms.

On Wed, Apr 13, 2016 at 03:09:08PM +0100, Steve Capper wrote: > On Tue, Mar 08, 2016 at 11:59:46PM +, David Daney wrote: > > From: Ganapatrao Kulkarni > > > > Attempt to get the memory and CPU NUMA node via of_numa. If that > > fails, default the dummy NUMA node

Re: [PATCH v15 5/6] arm64, numa: Add NUMA support for arm64 platforms.

gt; Tested-by: Shannon Zhao <shannon.z...@linaro.org> > Reviewed-by: Robert Richter <rrich...@cavium.com> > Signed-off-by: Ganapatrao Kulkarni <gkulka...@caviumnetworks.com> > Signed-off-by: David Daney <david.da...@cavium.com> Hi David, I have one minor commen

Re: [PATCH v15 5/6] arm64, numa: Add NUMA support for arm64 platforms.

iewed-by: Robert Richter > Signed-off-by: Ganapatrao Kulkarni > Signed-off-by: David Daney Hi David, I have one minor comment below, but please feel free to add: Acked-by: Steve Capper Cheers, -- Steve > --- > arch/arm64/Kconfig| 26 +++ > arch/arm64/includ

Re: [PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

Hi Andrew, On Thu, Mar 31, 2016 at 04:06:50PM -0700, Andrew Morton wrote: > On Tue, 29 Mar 2016 17:39:41 +0100 Steve Capper <steve.cap...@arm.com> wrote: > > > HugeTLB pages cannot be split, thus use the compound_mapcount to > > track rmaps. > > > > Currently

Re: [PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

Hi Andrew, On Thu, Mar 31, 2016 at 04:06:50PM -0700, Andrew Morton wrote: > On Tue, 29 Mar 2016 17:39:41 +0100 Steve Capper wrote: > > > HugeTLB pages cannot be split, thus use the compound_mapcount to > > track rmaps. > > > > Currently the page_mapped function wi

Re: [PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

On Tue, Mar 29, 2016 at 07:51:49PM +0300, Kirill A. Shutemov wrote: > On Tue, Mar 29, 2016 at 05:39:41PM +0100, Steve Capper wrote: > > HugeTLB pages cannot be split, thus use the compound_mapcount to > > track rmaps. > > > > Currently the page_mapped function will

Re: [PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

On Tue, Mar 29, 2016 at 07:51:49PM +0300, Kirill A. Shutemov wrote: > On Tue, Mar 29, 2016 at 05:39:41PM +0100, Steve Capper wrote: > > HugeTLB pages cannot be split, thus use the compound_mapcount to > > track rmaps. > > > > Currently the page_mapped function will

[PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

. Shutemov <kirill.shute...@linux.intel.com> Signed-off-by: Steve Capper <steve.cap...@arm.com> --- Hi, This patch is my approach to fixing a problem that unearthed with HugeTLB pages on arm64. We ran with PAGE_SIZE=64KB and placed down 32 contiguous ptes to create 2MB HugeTLB pages.

[PATCH] mm: Exclude HugeTLB pages from THP page_mapped logic

. Shutemov Signed-off-by: Steve Capper --- Hi, This patch is my approach to fixing a problem that unearthed with HugeTLB pages on arm64. We ran with PAGE_SIZE=64KB and placed down 32 contiguous ptes to create 2MB HugeTLB pages. (We can provide hints to the MMU that page table entries are conti

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On 25 February 2016 at 16:01, Kirill A. Shutemov <kir...@shutemov.name> wrote: > On Thu, Feb 25, 2016 at 03:49:33PM +0000, Steve Capper wrote: >> On 23 February 2016 at 18:47, Will Deacon <will.dea...@arm.com> wrote: >> > [adding Steve, since he worked on THP for 32-b

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On 25 February 2016 at 16:01, Kirill A. Shutemov wrote: > On Thu, Feb 25, 2016 at 03:49:33PM +0000, Steve Capper wrote: >> On 23 February 2016 at 18:47, Will Deacon wrote: >> > [adding Steve, since he worked on THP for 32-bit ARM] >> >> Apologies for my late reply.

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On 23 February 2016 at 18:47, Will Deacon wrote: > [adding Steve, since he worked on THP for 32-bit ARM] Apologies for my late reply... > > On Tue, Feb 23, 2016 at 07:19:07PM +0100, Gerald Schaefer wrote: >> On Tue, 23 Feb 2016 13:32:21 +0300 >> "Kirill A. Shutemov"

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On 23 February 2016 at 18:47, Will Deacon wrote: > [adding Steve, since he worked on THP for 32-bit ARM] Apologies for my late reply... > > On Tue, Feb 23, 2016 at 07:19:07PM +0100, Gerald Schaefer wrote: >> On Tue, 23 Feb 2016 13:32:21 +0300 >> "Kirill A. Shutemov" wrote: >> > The theory is

Re: [PATCH v5] arm64: Add support for PTE contiguous bit.

32 pages at the PMD level. > > If the base page size is set to 64KB then 2MB pages are enabled by > default. It is possible in the future to make 2MB the default huge > page size for both 4KB and 64KB granules. > > Signed-off-by: David Woods > Reviewed-by: Chris Metcalf Tha

Re: [PATCH v5] arm64: Add support for PTE contiguous bit.

.@ezchip.com> > Reviewed-by: Chris Metcalf <cmetc...@ezchip.com> Thanks for this David, this looks great to me. Please add: Reviewed-by: Steve Capper <steve.cap...@linaro.org> ...and have a great Christmas break. > --- > > Version 5 cleans up issues building with STRICT_MM_T

Re: [PATCH v4] arm64: Add support for PTE contiguous bit.

On 11 December 2015 at 21:02, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set of huge page sizes

Re: [PATCH v4] arm64: Add support for PTE contiguous bit.

On 11 December 2015 at 21:02, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set

Re: [RFC] kprobe'ing conditionally executed instructions

predicate and > are not (technically) executed are also not treated as a hit kprobe. Steve > Capper has suggested that the probe handling should still take place because > we stepped through the instruction even if it was effectively a nop. This > would be a significant change in how it currentl

Re: [RFC] kprobe'ing conditionally executed instructions

their predicate and > are not (technically) executed are also not treated as a hit kprobe. Steve > Capper has suggested that the probe handling should still take place because > we stepped through the instruction even if it was effectively a nop. This > would be a significant chang

Re: [PATCH v2] arm64: Add support for PTE contiguous bit.

On Mon, Oct 19, 2015 at 04:09:09PM -0400, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set of huge

Re: [PATCH v2] arm64: Add support for PTE contiguous bit.

On Mon, Oct 19, 2015 at 04:09:09PM -0400, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set of huge

Re: [PATCHv3 10/11] arm64: Add 16K page size support

default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) >>> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) >>> default "11" >> >> >> I'm a little lost here. How are these numbers deri

Re: [PATCHv3 10/11] arm64: Add 16K page size support

int >>> default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) >>> + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) >>> default "11" >> >> >> I'm a little lost h

Re: [PATCH v2 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

On 6 October 2015 at 11:25, Mark Rutland wrote: > On Tue, Oct 06, 2015 at 11:18:42AM +0100, Steve Capper wrote: >> On 6 October 2015 at 10:09, Russell King - ARM Linux >> wrote: >> > On Mon, Oct 05, 2015 at 06:02:10PM +0100, Suzuki K. Poulose wrote: >> >>

Re: [PATCH v2 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

On 6 October 2015 at 10:09, Russell King - ARM Linux wrote: > On Mon, Oct 05, 2015 at 06:02:10PM +0100, Suzuki K. Poulose wrote: >> +static int __init cpuinfo_regs_init(void) >> +{ >> + int cpu, ret; >> + >> + for_each_present_cpu(cpu) { >> + struct device *dev =

Re: [PATCH v2 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

On 6 October 2015 at 10:09, Russell King - ARM Linux wrote: > On Mon, Oct 05, 2015 at 06:02:10PM +0100, Suzuki K. Poulose wrote: >> +static int __init cpuinfo_regs_init(void) >> +{ >> + int cpu, ret; >> + >> + for_each_present_cpu(cpu) { >> + struct

Re: [PATCH v2 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

On 6 October 2015 at 11:25, Mark Rutland <mark.rutl...@arm.com> wrote: > On Tue, Oct 06, 2015 at 11:18:42AM +0100, Steve Capper wrote: >> On 6 October 2015 at 10:09, Russell King - ARM Linux >> <li...@arm.linux.org.uk> wrote: >> > On Mon, Oct 05, 2015 at 06:02

Re: [PATCH] arm64: Add support for PTE contiguous bit.

On 21 September 2015 at 09:44, David Woods wrote: > > Steve, Hi Dave, > > Thanks for your review and comments. I take your points about the 16k > granule - it's helpful to know that support is in the works. However, I'm > not sure I agree with your reading of section 4.4.2. It's clear that for

Re: [PATCH] arm64: Add support for PTE contiguous bit.

On 21 September 2015 at 09:44, David Woods wrote: > > Steve, Hi Dave, > > Thanks for your review and comments. I take your points about the 16k > granule - it's helpful to know that support is in the works. However, I'm > not sure I agree with your reading of section 4.4.2.

Re: [PATCH 7/7] arm64: Mark kernel page ranges contiguous

Hi Jeremy, One quick comment for now below. I ran into a problem testing this on my Seattle board, and needed the fix below. Cheers, -- Steve On 16 September 2015 at 20:03, Jeremy Linton wrote: > With 64k pages, the next larger segment size is 512M. The linux > kernel also uses different

Re: [PATCH 7/7] arm64: Mark kernel page ranges contiguous

Hi Jeremy, One quick comment for now below. I ran into a problem testing this on my Seattle board, and needed the fix below. Cheers, -- Steve On 16 September 2015 at 20:03, Jeremy Linton wrote: > With 64k pages, the next larger segment size is 512M. The linux > kernel

Re: [PATCH] arm64: Add support for PTE contiguous bit.

Hi David, Some initial comments below. Cheers, -- Steve On Tue, Sep 15, 2015 at 02:01:57PM -0400, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit

Re: [PATCH] arm64: Add support for PTE contiguous bit.

On 15 September 2015 at 19:01, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set of huge page sizes

Re: [PATCH] arm64: Add support for PTE contiguous bit.

On 15 September 2015 at 19:01, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set

Re: [PATCH] arm64: Add support for PTE contiguous bit.

Hi David, Some initial comments below. Cheers, -- Steve On Tue, Sep 15, 2015 at 02:01:57PM -0400, David Woods wrote: > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit

Re: [PATCH 12/14] arm64: Check for selected granule support

On 13 August 2015 at 12:34, Suzuki K. Poulose wrote: > From: "Suzuki K. Poulose" > > Ensure that the selected page size is supported by the > CPU(s). > > Cc: Mark Rutland > Cc: Catalin Marinas > Cc: Will Deacon > Signed-off-by: Suzuki K. Poulose > --- > arch/arm64/include/asm/sysreg.h |

Re: [PATCH v8 3/7] arm64: Kprobes with single stepping support

Monitor are rejected too. > > System instructions are mostly enabled for stepping, except MSR/MRS > accesses to "DAIF" flags in PSTATE, which are not safe for > probing. > > Thanks to Steve Capper and Pratyush Anand for several suggested > Changes. > > Signed-off-b

Re: [PATCH v8 3/7] arm64: Kprobes with single stepping support

accesses to DAIF flags in PSTATE, which are not safe for probing. Thanks to Steve Capper and Pratyush Anand for several suggested Changes. Signed-off-by: Sandeepa Prabhu sandeepa.s.pra...@gmail.com Signed-off-by: Steve Capper steve.cap...@linaro.org Please remove my SoB, we can replace

Re: [PATCH 12/14] arm64: Check for selected granule support

On 13 August 2015 at 12:34, Suzuki K. Poulose suzuki.poul...@arm.com wrote: From: Suzuki K. Poulose suzuki.poul...@arm.com Ensure that the selected page size is supported by the CPU(s). Cc: Mark Rutland mark.rutl...@arm.com Cc: Catalin Marinas catalin.mari...@arm.com Cc: Will Deacon

[PATCH] kprobes: Update examples to target _do_fork

his commit updates the kprobe example code s.t. _do_fork is targeted instead, and the examples work as expected. Signed-off-by: Steve Capper --- samples/kprobes/jprobe_example.c| 8 samples/kprobes/kprobe_example.c| 2 +- samples/kprobes/kretprobe_example.c | 2 +- 3 files

Re: [PATCH v8 7/7] kprobes: Add arm64 case in kprobe example module

On 11 August 2015 at 01:52, David Long wrote: > From: Sandeepa Prabhu > > Add info prints in sample kprobe handlers for ARM64 > > Signed-off-by: Sandeepa Prabhu > --- > samples/kprobes/kprobe_example.c | 8 > 1 file changed, 8 insertions(+) I'm not going through this series

[PATCH] kprobes: Update examples to target _do_fork

updates the kprobe example code s.t. _do_fork is targeted instead, and the examples work as expected. Signed-off-by: Steve Capper steve.cap...@linaro.org --- samples/kprobes/jprobe_example.c| 8 samples/kprobes/kprobe_example.c| 2 +- samples/kprobes/kretprobe_example.c | 2 +- 3

Re: [PATCH v8 7/7] kprobes: Add arm64 case in kprobe example module

On 11 August 2015 at 01:52, David Long dave.l...@linaro.org wrote: From: Sandeepa Prabhu sandeepa.s.pra...@gmail.com Add info prints in sample kprobe handlers for ARM64 Signed-off-by: Sandeepa Prabhu sandeepa.s.pra...@gmail.com --- samples/kprobes/kprobe_example.c | 8 1 file

[RFC PATCH] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

-by: Steve Capper --- Hello, This RFC is meant to sit on top of Suzuki's set at: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/358990.html On systems with different core types (for instance big.LITTLE systems), we need to be *very* careful that the REVIDR and MIDR are both read from

[RFC PATCH] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs

-by: Steve Capper steve.cap...@linaro.org --- Hello, This RFC is meant to sit on top of Suzuki's set at: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/358990.html On systems with different core types (for instance big.LITTLE systems), we need to be *very* careful that the REVIDR

Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes

On 29 June 2015 at 19:16, William Cohen wrote: > On 06/29/2015 01:25 PM, Steve Capper wrote: >> On 15 June 2015 at 20:07, David Long wrote: >>> From: William Cohen >>> >>> The trampoline code is used by kretprobes to capture a return from a probed &

Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature

On 29 June 2015 at 19:36, David Long wrote: > On 06/29/15 13:23, Steve Capper wrote: >> >> On 15 June 2015 at 20:07, David Long wrote: >>> >>> From: "David A. Long" >>> >>> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. &

Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature

On 29 June 2015 at 19:36, David Long dave.l...@linaro.org wrote: On 06/29/15 13:23, Steve Capper wrote: On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: David A. Long dave.l...@linaro.org Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. Signed-off-by: David

Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes

On 29 June 2015 at 19:16, William Cohen wco...@redhat.com wrote: On 06/29/2015 01:25 PM, Steve Capper wrote: On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: William Cohen wco...@redhat.com The trampoline code is used by kretprobes to capture a return from a probed

Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes

On 15 June 2015 at 20:07, David Long wrote: > From: William Cohen > > The trampoline code is used by kretprobes to capture a return from a probed > function. This is done by saving the registers, calling the handler, and > restoring the registers. The code then returns to the roginal saved

Re: [PATCH v7 4/7] arm64: kprobes instruction simulation support

On 15 June 2015 at 20:07, David Long wrote: > From: Sandeepa Prabhu > > Kprobes needs simulation of instructions that cannot be stepped > from different memory location, e.g.: those instructions > that uses PC-relative addressing. In simulation, the behaviour > of the instruction is implemented

Re: [PATCH v7 2/7] arm64: Add more test functions to insn.c

Hi David, Some comments below. On 15 June 2015 at 20:07, David Long wrote: > From: "David A. Long" > > Certain instructions are hard to execute correctly out-of-line (as in > kprobes). Test functions are added to insn.[hc] to identify these. The > instructions include any that use PC-relative

Re: [PATCH v7 3/7] arm64: Kprobes with single stepping support

cted too. > > System instructions are mostly enabled for stepping, except MSR/MRS > accesses to "DAIF" flags in PSTATE, which are not safe for > probing. > > Thanks to Steve Capper and Pratyush Anand for several suggested > Changes. > > Signed-off-by: Sande

Re: [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support

est functions in insn.c. > 2) I removed the addition of orig_x0 to ptrace.h. > 3) Reorder the patches. > 4) Replace the previous interrupt disabling (from Will Cohen) with > an improved solution (from Steve Capper). > > Changes since v4 include: > > 1) Added insn.c functions to

Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature

On 15 June 2015 at 20:07, David Long wrote: > From: "David A. Long" > > Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. > > Signed-off-by: David A. Long > --- > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/ptrace.h | 25 + > arch/arm64/kernel/ptrace.c

Re: [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support

the previous interrupt disabling (from Will Cohen) with an improved solution (from Steve Capper). Changes since v4 include: 1) Added insn.c functions to detect exception instructions and DAIF read/write instructions, and use them to reject probing same. 2) Changed adr detect function to also

Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature

On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: David A. Long dave.l...@linaro.org Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. Signed-off-by: David A. Long dave.l...@linaro.org --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/ptrace.h |

Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes

On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: William Cohen wco...@redhat.com The trampoline code is used by kretprobes to capture a return from a probed function. This is done by saving the registers, calling the handler, and restoring the registers. The code then

Re: [PATCH v7 3/7] arm64: Kprobes with single stepping support

flags in PSTATE, which are not safe for probing. Thanks to Steve Capper and Pratyush Anand for several suggested Changes. Signed-off-by: Sandeepa Prabhu sandeepa.pra...@linaro.org Signed-off-by: Steve Capper steve.cap...@linaro.org Signed-off-by: David A. Long dave.l...@linaro.org

Re: [PATCH v7 4/7] arm64: kprobes instruction simulation support

On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: Sandeepa Prabhu sandeepa.pra...@linaro.org Kprobes needs simulation of instructions that cannot be stepped from different memory location, e.g.: those instructions that uses PC-relative addressing. In simulation, the

Re: [PATCH v7 2/7] arm64: Add more test functions to insn.c

Hi David, Some comments below. On 15 June 2015 at 20:07, David Long dave.l...@linaro.org wrote: From: David A. Long dave.l...@linaro.org Certain instructions are hard to execute correctly out-of-line (as in kprobes). Test functions are added to insn.[hc] to identify these. The instructions

Re: [PATCH] ARM: pgtable: Fix typo in the comment

On 9 June 2015 at 07:52, Hyuk Myeong wrote: > This patch fix a spelling typo in the comment in pgtable-2level.h. > Hi Hyuk, > Signed-off-by: Hyuk Myeong > --- > arch/arm/include/asm/pgtable-2level.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

Re: [PATCH] ARM: pgtable: Fix typo in the comment

On 9 June 2015 at 07:52, Hyuk Myeong hyuk.mye...@lge.com wrote: This patch fix a spelling typo in the comment in pgtable-2level.h. Hi Hyuk, Signed-off-by: Hyuk Myeong hyuk.mye...@lge.com --- arch/arm/include/asm/pgtable-2level.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

Re: [BUG] Read-Only THP causes stalls (commit 10359213d)

On 26 May 2015 at 15:35, Christoffer Dall wrote: > Hi Steve, > > On Tue, May 26, 2015 at 03:24:20PM +0100, Steve Capper wrote: >> >> On Sun, May 24, 2015 at 09:34:04PM +0200, Christoffer Dall wrote: >> >> > Hi all, >> >> > >> >>

Re: [BUG] Read-Only THP causes stalls (commit 10359213d)

On 26 May 2015 at 09:08, Christoffer Dall wrote: > Hi Andrea, > > On Mon, May 25, 2015 at 04:15:25PM +0200, Andrea Arcangeli wrote: >> Hello Christoffer, >> >> On Sun, May 24, 2015 at 09:34:04PM +0200, Christoffer Dall wrote: >> > Hi all, >> > >> > I noticed a regression on my arm64 APM X-Gene

Re: [BUG] Read-Only THP causes stalls (commit 10359213d)

On 26 May 2015 at 09:08, Christoffer Dall christoffer.d...@linaro.org wrote: Hi Andrea, On Mon, May 25, 2015 at 04:15:25PM +0200, Andrea Arcangeli wrote: Hello Christoffer, On Sun, May 24, 2015 at 09:34:04PM +0200, Christoffer Dall wrote: Hi all, I noticed a regression on my arm64 APM

Re: [BUG] Read-Only THP causes stalls (commit 10359213d)

On 26 May 2015 at 15:35, Christoffer Dall christoffer.d...@linaro.org wrote: Hi Steve, On Tue, May 26, 2015 at 03:24:20PM +0100, Steve Capper wrote: On Sun, May 24, 2015 at 09:34:04PM +0200, Christoffer Dall wrote: Hi all, I noticed a regression on my arm64 APM X-Gene system a couple

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