I will like to replace the device tree that pushed to arm-soc.git with
this patch set.
Please review it, sorry if it cause more work after pushing
NPCM750 device tree.
Thanks a lot,
Tomer
Tomer Maimon (1):
arm: dts: add Nuvoton NPCM750 device tree
arch/arm/boot/dts/Makefile
Add a common device tree for all Nuvoton NPCM7xx BMCs and a board
specific device tree for the NPCM750 (Poleg) evaluation board.
Signed-off-by: Tomer Maimon
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 187
Modify configuration and MakeFile
for the Nuvoton NPCM and NPCM7xx BMC.
Signed-off-by: Tomer Maimon
---
arch/arm/mach-npcm/Kconfig | 40 +++-
arch/arm/mach-npcm/Makefile | 4 +++-
2 files changed, 14 insertions(+), 30 deletions(-)
diff --git a/arch/arm
Enable L2 Cache in Nuvoton NPCM7xx BMC.
Signed-off-by: Tomer Maimon
---
arch/arm/mach-npcm/npcm7xx.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-npcm/npcm7xx.c b/arch/arm/mach-npcm/npcm7xx.c
index 5f7cd88103ef..c5f77d854c4f 100644
--- a/arch/arm/mach-npcm/npcm7xx.c
+++ b
.
Tomer Maimon (2):
arm: npcm: modify configuration for the NPCM7xx BMC.
arm: npcm: Enable L2 Cache in NPCM7xx
arch/arm/mach-npcm/Kconfig | 40 +++-
arch/arm/mach-npcm/Makefile | 4 +++-
arch/arm/mach-npcm/npcm7xx.c | 2 ++
3 files changed, 16 insertions
Hi Arnd,
I sent now Full patch for the NPCM BMC's V12,
Is it O.K.? or do you want me to send the same patch to ARM: npcm:
drop extraneous 'select' statements as well?
Thanks
Tomer
On 12 March 2018 at 17:15, Tomer Maimon wrote:
> Hi Arnd,
>
> I will send tomorr
L2 Cache.
All changes tested on Nuvoton NPCM750 EVB.
Tomer Maimon (3):
arm: npcm: add basic support for Nuvoton BMCs
arm: dts: add Nuvoton NPCM750 device tree
MAINTAINERS: Add entry for the Nuvoton NPCM architecture
.../arm/cpu-enable-method/nuvoton,npcm750-smp | 42
Add maintainers and reviewers for the Nuvoton NPCM architecture.
Signed-off-by: Tomer Maimon
Reviewed-by: Avi Fishman
---
MAINTAINERS | 14 ++
1 file changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 93a12af4f180..71cccfd9e26f 100644
--- a/MAINTAINERS
+++ b
Add a common device tree for all Nuvoton NPCM750 BMCs and a board
specific device tree for the NPCM750 (Poleg) evaluation board.
Signed-off-by: Tomer Maimon
Reviewed-by: Avi Fishman
Reviewed-by: Joel Stanley
Reviewed-by: Rob Herring
Tested-by: Avi Fishman
Tested-by: Joel Stanley
Adds basic support for the Nuvoton NPCM750 BMC.
Signed-off-by: Tomer Maimon
Reviewed-by: Avi Fishman
Tested-by: Avi Fishman
---
arch/arm/Kconfig | 2 ++
arch/arm/Makefile| 1 +
arch/arm/mach-npcm/Kconfig | 30
arch/arm/mach-npcm/Makefile | 6
On 16 February 2018 at 04:40, Brendan Higgins wrote:
> Add a common device tree for all Nuvoton NPCM750 BMCs and a board
> specific device tree for the NPCM750 (Poleg) evaluation board.
>
> Signed-off-by: Brendan Higgins
> Reviewed-by: Tomer Maimon
> Reviewed-by: Avi Fish
Hi Arnd,
I will send tomorrow new version with some modification we need to do
once we use NPCM7XX and not NPCM750.
Brendan,
Is it O.K.?
On 12 March 2018 at 15:37, Arnd Bergmann wrote:
> On Mon, Mar 12, 2018 at 2:28 PM, Tomer Maimon wrote:
>> Hi Brendan,
>>
>> Accordi
Hi Brendan,
According to the last mail I have with Arnd can you modify the Kconfig
as follow:
+menuconfig ARCH_NPCM
+ bool "Nuvoton NPCM Architecture"
+ depends on ARCH_MULTI_V7
+ select PINCTRL
+
+if ARCH_NPCM
+
+config ARCH_NPCM7XX
+ bool "Support for NPCM7xx BMC (Poleg)
_defconfig and npcm730_defconfig.
Which approach should be adopt ? We will appreciate your advise.
Thanks a lot,
Tomer
On 12 March 2018 at 12:16, Tomer Maimon wrote:
> Hi Amd,
>
> Sorry for the delayed reply,
>
> the NPCM7xx is a family of BMC's that include NPCM750, NPC
Hi Amd,
Sorry for the delayed reply,
the NPCM7xx is a family of BMC's that include NPCM750, NPCM730 and more
All of the NPCM7xx BMC's have the same basic modules like Cortex-A9,
WDT, timers and more
can we reflacte the NPCM7xx as follow in the Kconfig:
menuconfig ARCH_NPCM
bool "Nuvoto
On 8 March 2018 at 17:33, Daniel Lezcano wrote:
> On 08/03/2018 16:24, Tomer Maimon wrote:
>> Add Nuvoton BMC NPCM7xx timer driver.
>>
>> The clocksource Enable 24-bit TIMER0 and TIMER1 counters,
>> while TIMER0 serve as clockevent and TIMER1 serve as clocksource.
Add Nuvoton BMC NPCM7xx timer driver.
The clocksource Enable 24-bit TIMER0 and TIMER1 counters,
while TIMER0 serve as clockevent and TIMER1 serve as clocksource.
Signed-off-by: Tomer Maimon
Reviewed-by: Brendan Higgins
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource
in configuration
- Adding prefix to the macros
- No changes to dt-binding documentation since v1
Modified driver have been tested on the NPCM750 evaluation board.
Tomer Maimon (2):
dt-binding: timer: document NPCM7xx timer DT bindings
clocksource/drivers/npcm: Add NPCM7xx timer driver
Added device tree binding documentation for Nuvoton NPCM7xx timer.
Signed-off-by: Tomer Maimon
Acked-by: Rob Herring
Reviewed-by: Brendan Higgins
---
.../bindings/timer/nuvoton,npcm7xx-timer.txt| 21 +
1 file changed, 21 insertions(+)
create mode 100644
On 5 March 2018 at 13:45, Joel Stanley wrote:
> These bindings describe the watchdog IP as used by the Nuvoton NPCM750
> (Poleg) BMC SoC.
>
> Signed-off-by: Joel Stanley
> ---
> V2: Add optional timeout property
> ---
> .../bindings/watchdog/nuvoton,npcm-wdt.txt | 28
> +
Sorry for the late response
On 2 March 2018 at 03:51, Joel Stanley wrote:
> Hi Tomer,
>
> On Tue, Feb 27, 2018 at 1:06 AM, Tomer Maimon wrote:
>> Added device tree binding documentation for Nuvoton NPCM7xx timer.
>>
>> Signed-off-by: Tomer Maimon
>> Acke
Add Nuvoton BMC NPCM7xx timer driver.
the clocksource Enable 24-bit TIMER0 and TIMER1 counters,
while TIMER0 serve as clockevent and TIMER1 serve as clocksource.
Signed-off-by: Tomer Maimon
Reviewed-by: Brendan Higgins
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource
- No changes to dt-binding documentation since v1
Modified driver have been tested on the NPCM750 evaluation board.
Tomer Maimon (2):
dt-binding: timer: document NPCM7xx timer DT bindings
clocksource: npcm: add NPCM7xx timer driver
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25
Added device tree binding documentation for Nuvoton NPCM7xx timer.
Signed-off-by: Tomer Maimon
Acked-by: Rob Herring
Reviewed-by: Brendan Higgins
---
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
Add Nuvoton BMC NPCM7xx clock driver.
Nuvoton BMC NPCM7xx contain integrated clock controller which
generates and supplies clock to all modules within the NPCM7xx BMC.
Signed-off-by: Tomer Maimon
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-npcm7xx.c | 751
Added device tree binding documentation for Nuvoton NPCM7xx clocks.
Signed-off-by: Tomer Maimon
---
.../bindings/clock/nuvoton,npcm7xx-clk.txt | 84 ++
1 file changed, 84 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/nuvoton,npcm7xx
from either PLL or the external clock input.
Several clock signals have a configurable divide from the clock source
Tomer Maimon (2):
dt-binding: clock: document NPCM7xx clock DT bindings
clk: npcm: add NPCM7xx clock driver
.../bindings/clock/nuvoton,npcm7xx-clk.txt | 84 +++
drivers
Add Nuvoton BMC NPCM7xx timer driver.
the clocksource Enable 24-bit TIMER0 and TIMER1 counters,
while TIMER0 serves as clockevent and TIMER1 serves as clocksource.
Signed-off-by: Tomer Maimon
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource/Makefile| 1 +
drivers
Added device tree binding documentation for Nuvoton NPCM7xx timer.
Signed-off-by: Tomer Maimon
---
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/nuvoton,npcm7xx
/lkml/2017/11/6/335
Changes have been tested on the NPCM750 evaluation board.
Tomer Maimon (2):
clocksource: npcm: add NPCM7xx timer driver
dt-binding: timer: document NPCM7xx timer DT bindings
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 +++
drivers/clocksource/Kconfig
On 4 November 2017 at 02:49, Brendan Higgins wrote:
> On Thu, Oct 26, 2017 at 4:45 AM, Tomer Maimon wrote:
>> Hi Brendan,
>>
>> Sorry for the delay,
>>
>> On 21 October 2017 at 00:08, Russell King - ARM Linux
>> wrote:
>>> On Fri, Oct 20, 2017 at
at 5:16 AM, Tomer Maimon wrote:
>> Add Nuvoton BMC NPCM7xx timer driver.
>>
>> the clocksource Enable 24-bit TIMER0 and TIMER1 counters,
>> while TIMER0 serves as clockevent and TIMER1 serves as clocksource.
>>
>> Signed-off-by: Tomer Maimon
>> ---
On 4 November 2017 at 02:28, Brendan Higgins wrote:
> On Wed, Nov 1, 2017 at 5:16 AM, Tomer Maimon wrote:
>> Addressed comments from:
>> - Daniel Lezcano: https://www.spinics.net/lists/devicetree/msg196683.html
>>
>> Changes since version 1:
>> - Rename drive
to modify NPCM7xx device tree for support NPCM7xx timer driver
https://www.spinics.net/lists/arm-kernel/msg614424.html
Changes have been tested on the NPCM750 evaluation board.
Tomer Maimon (2):
clocksource: npcm: add NPCM7xx timer driver
dt-binding: timer: document NPCM7xx timer DT bindings
Add Nuvoton BMC NPCM7xx timer driver.
the clocksource Enable 24-bit TIMER0 and TIMER1 counters,
while TIMER0 serves as clockevent and TIMER1 serves as clocksource.
Signed-off-by: Tomer Maimon
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource/Makefile| 1 +
drivers
Added device tree binding documentation for Nuvoton NPCM7xx timer.
Signed-off-by: Tomer Maimon
---
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/nuvoton,npcm7xx
Sorry for the delay,
On 10 October 2017 at 17:57, Rob Herring wrote:
> On Sun, Oct 01, 2017 at 12:11:38PM +0300, Tomer Maimon wrote:
>> Added device tree binding documentation for Nuvoton NPCM7xx timer.
>>
>> Signed-off-by: Tomer Maimon
>> ---
>> .../binding
On 20 September 2017 at 00:40, Brendan Higgins
wrote:
> Add a common device tree for all Nuvoton NPCM750 BMCs and a board
> specific device tree for the NPCM750 (Poleg) evaluation board.
>
> Signed-off-by: Brendan Higgins
> Reviewed-by: Tomer Maimon
> Reviewed-by: Avi Fish
M -0700, Brendan Higgins wrote:
>> >> Adds basic support for the Nuvoton NPCM750 BMC.
>> >>
>> >> Signed-off-by: Brendan Higgins
>> >> Reviewed-by: Tomer Maimon
>> >> Reviewed-by: Avi Fishman
>> >> Tested-by: Tomer Maimon
&g
basic support for Nuvoton BMCs
and Nuvoton NPCM750 device tree patches.
https://patchwork.kernel.org/bundle/brendanhiggins/arm:%20npcm:%20add%20basic%20support%20for%20Nuvoton%20BMCs/
Tomer Maimon (2):
clocksource: npcm: add NPCM7xx timer driver
dt-binding: timer: document NPCM7xx timer DT bindings
Added device tree binding documentation for Nuvoton NPCM7xx timer.
Signed-off-by: Tomer Maimon
---
.../bindings/timer/nuvoton,npcm7xx-timer.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/nuvoton,npcm7xx
Add Nuvoton BMC NPCM7xx timer driver.
Signed-off-by: Tomer Maimon
---
drivers/clocksource/Kconfig | 9 ++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/npcm7xx_timer.c | 205
3 files changed, 215 insertions(+)
create mode 100644
mb();
> +
> + iounmap(gcr_base);
> +out:
> + return ret;
> +}
> +
> +static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + struct device_node *scu_np;
> + void __iomem *scu_base;
> +
> + scu_np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
> + if (!scu_np) {
> + pr_err("no scu device node\n");
> + return;
> + }
> + scu_base = of_iomap(scu_np, 0);
> + if (!scu_base) {
> + pr_err("could not iomap scu at: 0x%p\n", scu_base);
> + return;
> + }
> +
> + scu_enable(scu_base);
> +
> + iounmap(scu_base);
> +}
> +
> +static struct smp_operations npcm7xx_smp_ops __initdata = {
> + .smp_prepare_cpus = npcm7xx_smp_prepare_cpus,
> + .smp_boot_secondary = npcm7xx_smp_boot_secondary,
> +};
> +
> +CPU_METHOD_OF_DECLARE(npcm7xx_smp, "nuvoton,npcm7xx-smp", &npcm7xx_smp_ops);
> --
> 2.14.1.581.gf28d330327-goog
>
Reviewed-by: Tomer Maimon
Reviewed-by: Avi Fishman
Tested-by: Tomer Maimon
Tested-by: Avi Fishman
+ /* make sure write buffer is drained */
> + mb();
> +
> +out:
> + iounmap(gcr_base);
> + return ret;
> +}
> +
> +static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + struct device_node *scu_np;
> + void __iomem *scu_base;
> +
> + scu_np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
> + if (!scu_np) {
> + pr_err("no scu device node\n");
> + return;
> + }
> + scu_base = of_iomap(scu_np, 0);
> + if (!scu_base) {
> + pr_err("could not iomap scu at: 0x%llx\n", scu_base);
> + return;
> + }
> +
> + scu_enable(scu_base);
> +
> +out:
> + iounmap(scu_base);
> +}
> +
> +static struct smp_operations npcm7xx_smp_ops __initdata = {
> + .smp_prepare_cpus = npcm7xx_smp_prepare_cpus,
> + .smp_boot_secondary = npcm7xx_smp_boot_secondary,
> +};
> +
> +CPU_METHOD_OF_DECLARE(npcm7xx_smp, "nuvoton,npcm7xx-smp", &npcm7xx_smp_ops);
> --
> 2.14.1.581.gf28d330327-goog
>
Reviewed-by: Tomer Maimon
Reviewed-by: Avi Fishman
Tested-by: Tomer Maimon
Tested-by: Avi Fishman
;
> +ARM/NUVOTON NPCM ARCHITECTURE
> +M: Avi Fishman
> +M: Tomer Maimon
> +R: Brendan Higgins
> +R: Rick Altherr
> +L: open...@lists.ozlabs.org (moderated for non-subscribers)
> +S: Maintained
> +F: arch/arm/mach-npcm/
> +F: arch/arm
t; + status = "okay";
> + };
> +
> + serial1: serial1@f0002000 {
> + status = "okay";
> + };
> +
> + serial2: serial2@f0003000 {
> + status =
_to_phys(npcm7xx_secondary_startup), gcr_base +
> + NPCM7XX_SCRPAD_REG);
> + /* make sure npcm7xx_secondary_startup is seen by all observers. */
> + smp_wmb();
> + dsb_sev();
> +
> + /* make sure write buffer is drained */
> + mb();
> +}
> +
> +static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus)
> +{
> + struct device_node *gcr_np, *scu_np;
> +
> + gcr_np = of_find_compatible_node(NULL, NULL, "nuvoton,npcm750-gcr");
> + if (!gcr_np) {
> + pr_err("no gcr device node\n");
> + return;
> + }
> + gcr_base = of_iomap(gcr_np, 0);
> + if (!gcr_base) {
> + pr_err("could not iomap gcr at: 0x%llx\n", gcr_base);
> + return;
> + }
> +
> + scu_np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
> + if (!scu_np) {
> + pr_err("no scu device node\n");
> + return;
> + }
> + scu_base = of_iomap(scu_np, 0);
> + if (!scu_base) {
> + pr_err("could not iomap gcr at: 0x%llx\n", scu_base);
> + return;
> + }
> +
> + scu_enable(scu_base);
> + npcm7xx_wakeup_secondary();
> +}
> +
> +static struct smp_operations npcm7xx_smp_ops __initdata = {
> + .smp_prepare_cpus = npcm7xx_smp_prepare_cpus,
> + .smp_boot_secondary = npcm7xx_smp_boot_secondary,
> + .smp_secondary_init = npcm7xx_smp_secondary_init,
> +};
> +
> +CPU_METHOD_OF_DECLARE(npcm7xx_smp, "nuvoton,npcm7xx-smp", &npcm7xx_smp_ops);
> --
> 2.14.1.581.gf28d330327-goog
>
Reviewed-by: Tomer Maimon
Tested-by: Tomer Maimon
Reviewed-by: Avi Fishman
Tested-by: Avi Fishman
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