On Fri, 2 Apr 2021 11:20:29 +0300, Tudor Ambarus wrote:
> mx25l51245g and mx66l51235l have the same flash ID. The flash
> detection returns the first entry in the flash_info array that
> matches the flash ID that was read, thus for the 0xc2201a ID,
> mx25l51245g was always hit, i
nctrl: at91-pio4: add support for slew-rate")
Signed-off-by: Tudor Ambarus
---
drivers/pinctrl/pinctrl-at91-pio4.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c
b/drivers/pinctrl/pinctrl-at91-pio4.c
index a5d328808e4c..4c
function prototype that is used for both reads
and writes. mtd_dataflash and SPI NOR will benefit of the const buffer
because they are using different paths for writes and reads.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/chips/cfi_cmdset_0001.c | 7 ---
drivers/mtd/chips/cfi_cmdset_0002
According to macronix website, there is no mx66l51235l part number.
The chip detected as such is actually mx66l51235f. Rename the flash.
Do not update the mx66l51235l name from the spi_nor_dev_ids[], since
there are dt that are using this compatible.
Signed-off-by: Tudor Ambarus
---
drivers/mtd
ronix: Add support for mx25l51245g")
Cc: sta...@vger.kernel.org
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/macronix.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 6c2680b4cdad..42c2cf31702e 100644
--- a/drive
erase should be discovered when parsing BFPT, so there's
no need to set the explicit SECT_4K flag.
Tudor Ambarus (2):
Revert "mtd: spi-nor: macronix: Add support for mx25l51245g"
mtd: spi-nor: macronix: Fix name for mx66l51235f
drivers/mtd/spi-nor/macronix.c | 5 +
1 file chang
On Mon, 22 Mar 2021 09:51:29 +0200, Tudor Ambarus wrote:
> Various cleanup patches done while reviewing contributions.
>
> Tudor Ambarus (2):
> mtd: spi-nor: Move Software Write Protection logic out of the core
> mtd: spi-nor: swp: Improve code around spi_nor_check
r: winbond: add OTP support to w25q32fw/jw
https://git.kernel.org/mtd/c/5909dde2bc53
Best regards,
--
Tudor Ambarus
From: "Kai Stuhlemmer (ebee Engineering)"
Update MTD ECC statistics with the number of corrected bits.
Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver")
Cc: sta...@vger.kernel.org
Signed-off-by: Kai Stuhlemmer (ebee Engineering)
Signed-off-by: Tudor A
- bool return value for spi_nor_check_lock_status_sr(), gets rid of
the return 1,
- introduce temporary variables for better readability.
Suggested-by: Joe Perches
Signed-off-by: Tudor Ambarus
---
v3: new patch
drivers/mtd/spi-nor/swp.c | 27 +++
1 file changed, 15
Various cleanup patches done while reviewing contributions.
Tudor Ambarus (2):
mtd: spi-nor: Move Software Write Protection logic out of the core
mtd: spi-nor: swp: Improve code around spi_nor_check_lock_status_sr()
drivers/mtd/spi-nor/Makefile | 2 +-
drivers/mtd/spi-nor/core.c | 406
It makes the core file a bit smaller and provides better separation
between the Software Write Protection features and the core logic.
All the next generic software write protection features (e.g. Individual
Block Protection) will reside in swp.c.
Signed-off-by: Tudor Ambarus
---
v3:
- Add
On Sat, 6 Mar 2021 11:49:57 +0200, Tudor Ambarus wrote:
> Various cleanup patches done while reviewing contributions.
>
> Tudor Ambarus (5):
> mtd: spi-nor: core: Advance erase after the erase cmd has been
> completed
> mtd: spi-nor: core: Add vdbg msg for spi_nor_e
On Mon, 15 Mar 2021 07:56:34 +0200, Tudor Ambarus wrote:
> s/legacy/default. spi_nor_info_init_params initializes some default
> flash parameters and settings that can be overwritten when parsing
> SFDP, or by fixup hooks. There's nothing legacy about them, they are
> just some
s/legacy/default. spi_nor_info_init_params initializes some default
flash parameters and settings that can be overwritten when parsing
SFDP, or by fixup hooks. There's nothing legacy about them, they are
just some default settings, if not otherwise discovered or specified.
Signed-off-by:
On Mon, 8 Mar 2021 11:23:33 +0200, Tudor Ambarus wrote:
> It's already been the case for some time that Michael and Pratyush
> are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality.
Applied to spi-nor/next, thanks!
[1/1] MAINTAINERS: Add Michael and Pratyush as
It's already been the case for some time that Michael and Pratyush
are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality.
Signed-off-by: Tudor Ambarus
---
Michael, Pratyush, please send your Acked-by tags if you agree.
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
It's already been the case for some time that Michael and Pratyush
are reviewing SPI NOR patches. Update MAINTAINERS to reflect reality.
Signed-off-by: Tudor Ambarus
---
Michael, Pratyush, please send your Acked-by tags if you agree.
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
: spi-nor: intel-spi: Move platform data header to x85 subfolder
https://git.kernel.org/mtd/c/ae2177cf318d
Best regards,
--
Tudor Ambarus
On Sat, 6 Mar 2021 00:45:52 +0100, Michael Walle wrote:
> There is already a function to check if an integer is a power of 2. Use
> it.
Applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: use is_power_of_2()
https://git.kernel.org/mtd/c/04fc298c7d08
Best regards,
--
Tudor Ambarus
or
> read/write respectly, and flash_erase for erasing the flash.
Applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: winbond: Add support for w25q512jvq
https://git.kernel.org/mtd/c/ff013330fbdb
Best regards,
--
Tudor Ambarus
else is not generally useful after a break or return.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/swp.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c
index 75b9bb53d584..c35cb3becb41 100644
--- a
It makes the core file a bit smaller and provides better separation
between the Software Write Protection features and the core logic.
All the next generic software write protection features (e.g. Individual
Block Protection) will reside in swp.c.
Signed-off-by: Tudor Ambarus
---
drivers/mtd
n't copy self-pointing struct around")'
Signed-off-by: Tudor Ambarus
---
v2: Add params local variable in spi_nor_parse_4bait(), because
params is used in multiple locations.
drivers/mtd/spi-nor/core.c | 10 ++---
drivers/mtd/spi-nor/core.h | 6 +--
drivers/mtd/spi-nor/issi.c
Useful when debugging non-uniform erase.
Signed-off-by: Tudor Ambarus
---
v2:
- s/dev_dbg/dev_vdb
- move vdbg message the first thing in the while
drivers/mtd/spi-nor/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index
addr and len were gratuitously updated even when spi_nor_wait_till_ready()
failed. Wait for the erase cmd to complete and then advance the erase.
Signed-off-by: Tudor Ambarus
Reviewed-by: Pratyush Yadav
---
v2:
- update commit message
- Add R-b tag
drivers/mtd/spi-nor/core.c | 12
Various cleanup patches done while reviewing contributions.
Tudor Ambarus (5):
mtd: spi-nor: core: Advance erase after the erase cmd has been
completed
mtd: spi-nor: core: Add vdbg msg for spi_nor_erase_multi_sectors()
mtd: spi-nor: Get rid of duplicated argument in spi_nor_parse_sfdp
The DMA cap mask is no longer used since:
commit 7758e390699f ("spi: atmel: remove compat for non DT board when
requesting dma chan")
Drop it now.
Signed-off-by: Tudor Ambarus
---
drivers/spi/spi-atmel.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/spi/spi-atmel.c
Release the RX channel and free the dma coherent memory when
devm_spi_register_master() fails.
Fixes: 5720ec0a6d26 ("spi: spi-ti-qspi: Add DMA support for QSPI mmap read")
Cc: sta...@vger.kernel.org
Signed-off-by: Tudor Ambarus
---
v2: Add Fixes tag and Cc stable.
drivers/spi/spi
Release the RX channel and free the dma coherent memory when
devm_spi_register_master() fails
Signed-off-by: Tudor Ambarus
---
drivers/spi/spi-ti-qspi.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti
It is safer to disable the QSPI IP at suspend, in order to avoid
possible impact of glitches on the internal FSMs. This is a theoretical
fix, there were no problems seen as of now. Tested on sama5d2 and
sam9x60 versions of the IP.
Signed-off-by: Tudor Ambarus
---
drivers/spi/atmel-quadspi.c | 1
This is a follow-up for:
commit 3c9ea42802a1 ("clk: Mark fwnodes when their clock provider is
added/removed")
The above commit updated the deprecated of_clk_add_provider(),
but missed to update the preferred of_clk_add_hw_provider().
Update it now.
Signed-off-by: Tudor Ambarus
---
d
This is a follow-up for:
commit 3c9ea42802a1 ("clk: Mark fwnodes when their clock provider is
added/removed")
The above commit updated the deprecated of_clk_add_provider(),
but missed to update the preferred of_clk_add_hw_provider().
Update it now.
Signed-off-by: Tudor Ambarus
---
d
Wait for the erase cmd to complete and then advance the erase.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0522304f52fa..bcaa161bc7db
Useful when debugging non-uniform erase.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index bcaa161bc7db..7401c60b53e6 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b
On Thu, 21 Jan 2021 13:05:45 +0200, Tudor Ambarus wrote:
> The Global Block Unlock command has different names depending
> on the manufacturer, but always the same command value: 0x98.
> Macronix's MX25U12835F names it Gang Block Unlock, Winbond's
> W25Q128FV names it G
n't copy self-pointing struct around")'
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 10 ++--
drivers/mtd/spi-nor/core.h | 6 +--
drivers/mtd/spi-nor/issi.c | 3 +-
drivers/mtd/spi-nor/macronix.c | 3 +-
drivers/mtd/spi-nor/sfdp.c | 87 +--
he
timers caused the fail at boot.
Signed-off-by: Tudor Ambarus
---
Tested on sama5d2_xplained.
drivers/clk/at91/at91rm9200.c | 3 +--
drivers/clk/at91/at91sam9260.c | 16
drivers/clk/at91/at91sam9g45.c | 3 +--
drivers/clk/at91/at91sam9n12.c | 3 +--
drivers/clk/at9
again.
Fixes: e590474768f1cc04 ("driver core: Set fw_devlink=on by default")
Signed-off-by: Tudor Ambarus
---
I'll be out of office, will check the rest of the at91 SoCs
at the begining of next week.
drivers/clk/at91/sama5d2.c | 2 ++
1 file changed, 2 insertions(+)
diff --gi
On Thu, 21 Jan 2021 01:18:47 -0800, Pan Bian wrote:
> Put the child node np when it fails to get or register device.
Applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: hisi-sfc: Put child node np on error path
https://git.kernel.org/mtd/c/fe6653460ee7
Best regards,
--
Tudor Ambarus
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y.
Signed-off-by: Tudor Ambarus
---
v3:
- s/Winbound/Winbond/
- read CR.BPNV and check if we can really unlock the entire flash array
- sst26vf_unlock: return -EINVAL instead of -EOPNOTSUPP when caller
asks to unlock a range/granularity that we can't unlock
v2:
n Unlock.
Used in the Individual Block Protection mode, which is mutually
exclusive with the Block Protection mode (BP0-3).
Signed-off-by: Tudor Ambarus
Reviewed-by: Pratyush Yadav
Reviewed-by: Michael Walle
---
v3:
- s/Winbound/Winbond
- Add Michael's R-b tag
v2:
- s/mutual/mutually/
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y.
Signed-off-by: Tudor Ambarus
---
v2: s/!ofs/ofs == 0/
drivers/mtd/spi-nor/sst.c | 38 --
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c
index 00e48da
otection Unlock.
Used in the Individual Block Protection mode, which is mutually
exclusive with the Block Protection mode (BP0-3).
Signed-off-by: Tudor Ambarus
Reviewed-by: Pratyush Yadav
---
v2:
- s/mutual/mutually/
- set the GBULK cmd buswidth to 0 and call spi_nor_spimem_setup_op()
to update the
otection Unlock.
Used in the Individual Block Protection mode, which is mutual
exclusive with the Block Protection mode (BP0-3).
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 35 +++
drivers/mtd/spi-nor/core.h | 1 +
include/linux/mtd/spi-nor.h
when MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/sst.c | 38 --
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c
index 00e48da0744a..1cd2a360c41e 100644
id a superfluous init to zero when both spi->max_speed_hz
and spi->controller->max_speed_hz are zero.
Fixes: 9326e4f1e5dd ("spi: Limit the spi device max speed to controller's max
speed")
Reported-by: Geert Uytterhoeven
Suggested-by: Geert Uytterhoeven
Signed-off-by: Tudor A
Make sure the max_speed_hz of spi_device does not override
the max_speed_hz of controller.
Signed-off-by: Tudor Ambarus
---
drivers/spi/spi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index cd3c395b4e90..51d7c004fbab 100644
--- a
The address must be written in QSPI_IAR only when we have
a instruction frame with address but no data.
Signed-off-by: Tudor Ambarus
---
drivers/spi/atmel-quadspi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel
QSPI_IFR is set as the last QSPI Instruction Frame register
regardless of the sama5d2 or sam9x60 version of the IP. Move
the writing of QSPI_IFR outside of the IP specific code.
Signed-off-by: Tudor Ambarus
---
drivers/spi/atmel-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
.
Tested on both sama5d2 and sam9x60.
Tudor Ambarus (4):
spi: atmel-quadspi: Fix AHB memory accesses
spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRTYP_READ
spi: atmel-quadspi: Write QSPI_IAR only when needed
spi: atmel-quadspi: Move common code outside of if else
drivers/spi
That bit describes the APB transfer type. We are writing
serial memory registers via AHB acesses, that bit does not
make sense in the current context.
Signed-off-by: Tudor Ambarus
---
drivers/spi/atmel-quadspi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/spi/atmel-quadspi.c b
r sama5d2 and to '1' for sam9x60.
Fix the setting of the QSPI_IFR.TFRTYP field.
Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for
atmel-quadspi driver")
Cc: # v5.0+
Reported-by: Tom Burkart
Signed-off-by: Tudor Ambarus
---
drivers/spi/atmel-q
flash from a stateful
mode in kernel, entering the stateful mode is still dangerous if one's
bootloader can't handle it. We need a way to pass the responsibility
to the user and let him decide conciously about the risks of allowing
stateful modes.
Signed-off-by: Tudor Ambarus
---
My biggest concern with Pratyush's patches is that the stateful modes case
(X-X-X modes that are entered via a non-volatile bit) is not handled.
This is an attempt to tackle this problem. Reasons and explanations in
the commit messages.
Tudor Ambarus (3):
mtd: spi-nor: Intr
avoid this way polluting the flash flags when declaring
one.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/sfdp.c | 52 ++
1 file changed, 52 insertions(+)
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index f192710aca31..7bca64cbba
t are set via a non-volatile bit.
SPI_NOR_IO_MODE_EN_VOLATILE should be set just for the flashes that
don't define the optional SFDP SCCR Map, so that we don't pollute the
flash info flags.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 6 ++
drivers/mtd/spi-nor/core.
The error code received from nand_set_ecc_soft_ops() was overwritten,
drop this redundant assignment and use the error code received from
the callee.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/nand/raw/nand_base.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers
ot;switch (ecc->mode)" statement, and when a fallback to SW ECC is
needed, we fallthrough "case NAND_ECC_SOFT".
Fixes: d3f8ec8e979b ("mtd: rawnand: Separate the ECC engine type and the ECC
byte placement")
Reported-by: Santiago Esteban
Signed-off-by: Tudor Ambarus
---
There were too many levels of indentation and the code was
hard to read. Introduce a new function, similar to
nand_set_ecc_soft_ops().
Signed-off-by: Tudor Ambarus
---
drivers/mtd/nand/raw/nand_base.c | 114 +--
1 file changed, 61 insertions(+), 53 deletions(-)
diff
: NAND scan failed: -22
atmel-nand-controller: probe of 1000.ebi:nand-controller failed with error
-22
Tudor Ambarus (3):
mtd: rawnand: Fix wrongful fallthrough NAND_ECC_SOFT
mtd: rawnand: Introduce nand_set_ecc_on_host_ops()
mtd: rawnand: Don't overwrite the error code
00)
> [ 544.351528] intel_spi_read(from=200, len=40)
> [ 544.351528] intel_spi_read(from=200, len=40)
> End MTD read
>
> [...]
Applied to spi-nor/next, thanks!
[1/1] mtd: revert "spi-nor: intel: provide a range for poll_timout"
https://git.kernel.org/mtd/c/e93a977367b2
Best regards,
--
Tudor Ambarus
WRDI command
https://git.kernel.org/mtd/c/44a80df4bfce
Best regards,
--
Tudor Ambarus
mtd: spi-nor: update read capabilities for w25q64 and s25fl064k
https://git.kernel.org/mtd/c/99eae48fd4c5
Best regards,
--
Tudor Ambarus
The industry refers to these flash types as "SPI NOR" and
"SPI NAND". Be consistent and use the same acronyms.
Signed-off-by: Tudor Ambarus
---
drivers/spi/Kconfig| 10 +-
drivers/spi/spi-fsl-qspi.c | 2 +-
drivers/spi/spi-orion.c| 2 +-
3 files changed
write speed is 4524 KiB/s
mtd_speedtest: eraseblock read speed is 21186 KiB/s
Signed-off-by: Tudor Ambarus
---
drivers/spi/Kconfig | 2 +-
drivers/spi/atmel-quadspi.c | 8
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi
nd to the mtd device and
> the 'flash_erase' command.
Applied to spi-nor/next, thanks!
[1/1] mtd: spi-nor: macronix: Add support for MX25R1635F
https://git.kernel.org/mtd/c/482dcb2a04
Best regards,
--
Tudor Ambarus
nd: Add support for w25q64jvm
https://git.kernel.org/mtd/c/0ee2872f10
Best regards,
--
Tudor Ambarus
Hi,
Please amend this as well. Thanks!
---
drivers/mtd/spi-nor/spi-nor.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 3a9b69e9ba6d..3019708696cd 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++
Hi, Yogesh,
On 10/17/2018 10:46 AM, Yogesh Narayan Gaur wrote:
> Hi Boris,
>
>> -Original Message-
>> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
>> Sent: Wednesday, October 17, 2018 1:00 PM
>> To: Yogesh Narayan Gaur
>> Cc: Cyrille P
ards
> Yogesh Gaur
>
>> -Original Message-
>> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
>> Tudor Ambarus
>> Sent: Tuesday, September 11, 2018 9:10 PM
>> To: marek.va...@gmail.com; dw...@infradead.org;
>&g
_4K | USE_FSR | SPI_NOR_4B_OPCODES) },
> +
The style is slightly different from what Brian proposed back in
9648388fc7737365be7a8092e77df78ccc2cd1a4. For consistency reasons, I think we
should use the same style in all entries.
Since I verified the correctness of the patch and my comment targets just a
cosmetic change, I'll let the maintainers decide:
Reviewed-by: Tudor Ambarus
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Some MICRON related macros in spi-nor domain were ST.
> Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
>
> Added entry of MFR Id for Micron flashes, 0x002C.
>
> Signed-off-by: Yogesh Gaur
Reviewed
sama5d4_xplained, ssam9x5cm, sama5d2_ptc_ek and sama5d3_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our NAND flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
sama5d3_xplained, sam9x5cm, sama5d2_ptc_ek and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
sam9x5cm, sama5d2_ptc_ek, sama5d3_xplained and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor
The offsets for the bootloader environment and its redundant partition
were inverted. Fix the addresses to match our nand flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Signed-off-by: Tudor Ambarus
---
arch/arm/boot/dts
sam9x5cm, sama5d2_ptc_ek, sama5d3_xplained and sama5d4_xplained nand
flashes have a common memory map. Even the nand memory partitions to
match our NAND flash map available at:
http://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections//demo_nandflash_map_lnx4sam5x.png
Tudor Ambarus (4):
ARM
at91sam9x5cm comes with a 2Gb NAND flash. Fix the rootfs size to
match this limit.
Signed-off-by: Tudor Ambarus
Acked-by: Ludovic Desroches
---
v2:
- collect Ludovic's Acked-by
arch/arm/boot/dts/at91sam9x5cm.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arc
sama5d4_xplained comes with a 4Gb NAND flash. Increase the rootfs
size to match this limit.
Signed-off-by: Tudor Ambarus
Acked-by: Ludovic Desroches
---
v2:
- fix typo in subject line
- collect Ludovic's Acked-by
arch/arm/boot/dts/at91-sama5d4_xplained.dts | 2 +-
1 file changed, 1 inse
sama5d4_xplained comes with a 4Gb NAND flash. Increase the rootfs
size to match this limit.
Signed-off-by: Tudor Ambarus
---
arch/arm/boot/dts/at91-sama5d4_xplained.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
b/arch/arm
at91sam9x5cm comes with a 2Gb NAND flash. Fix the rootfs size to
match this limit.
Signed-off-by: Tudor Ambarus
---
arch/arm/boot/dts/at91sam9x5cm.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi
b/arch/arm/boot/dts/at91sam9x5cm.dtsi
On 09/25/2018 10:34 AM, Nathan Chancellor wrote:
> On Tue, Sep 25, 2018 at 10:24:04AM +0300, Tudor Ambarus wrote:
>> Hi, Nathan,
>>
>> On 09/21/2018 01:29 PM, Nathan Chancellor wrote:
>>> Clang warns when one enumerated type is converted implicitly to anothe
Hi, Nathan,
On 09/21/2018 01:29 PM, Nathan Chancellor wrote:
> Clang warns when one enumerated type is converted implicitly to another.
>
> drivers/mtd/spi-nor/cadence-quadspi.c:962:47: warning: implicit
> conversion from enumeration type 'enum dma_transfer_direction' to
> different enumeration t
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -271,6 +271,7 @@ static inline int set_4byte(struct spi_nor *nor, const
>> struct flash_info *info,
>>> u8 cmd;
>>>
>>> switch (JEDEC_MFR(info)) {
>>> + case SNOR_MFR_ST:
>>
>> We should mark switch cases where we are expecting to fa
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Some MICRON related macros in spi-nor domain were ST.
> Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
>
> Added entry of MFR Id for Micron flashes, 0x002C.
>
> Signed-off-by: Yogesh Gaur
> ---
> drivers/mtd/spi-nor/spi-no
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Add entry for mt35xu512aba Micron NOR flash.
> This flash is having uniform sector erase size of 128KB, have
> support of FSR(flag status register), flash size is 64MB and
> supports 4-byte commands.
>
Seems that the datasheet for mt35xu512aba is
o, we better don't take any chances and fix this by null
> checking pointer *nfc_np* before calling of_clk_get().
>
> Addresses-Coverity-ID: 1473052 ("Dereference null return value")
> Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver")
Hi, Boris,
On 09/11/2018 06:40 PM, Tudor Ambarus wrote:
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
[cut]
> /*
I missed to use the opening comment mark for kernel-doc comments: "/**". This
observation applies to all newly introduced function
command is found.
- determine at init if there are erase types that can erase the entire
memory
- fix support for overlaid regions.
Tudor Ambarus (2):
mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories
mtd: spi-nor: parse SFDP Sector Map Parameter Table
drivers/mtd/spi-nor/sp
come back to the uniform case.
The 'erase with the best command, move forward and repeat' approach was
suggested by Cristian Birsan in a brainstorm session, so:
Suggested-by: Cristian Birsan
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/
: Tudor Ambarus
---
drivers/mtd/spi-nor/spi-nor.c | 316 +++---
include/linux/mtd/spi-nor.h | 12 ++
2 files changed, 312 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 4687345..fbefcdb 100644
To avoid inadvertent writes during power-up, sst26vf064b is
write-protected by default after a power-on reset cycle.
Unlock the serial flash memory by using the Global Block Protection
Unlock command - it offers a single command cycle that unlocks
the entire memory array.
Signed-off-by: Tudor
Cyrille's reviewed-by tag
- add cover letter
- fix link to initial work done by Anurag Kumar Vulisha
Tudor Ambarus (3):
mtd: spi-nor: add Global Block Unlock support
mtd: spi-nor: unlock global block protection on sst26vf064b
mtd: spi-nor: add support for Microchip SST26 QSPI flash mem
Macronix's MX25U12835F names it Gang Block Unlock,
Winbound's W25Q128FV names it Global Block Unlock and
Microchip's SST26VF064B names it Global Block Protection Unlock.
Based on initial work done by Anurag Kumar Vulisha:
https://lkml.org/lkml/2015/11/13/307
Signed-off-by: Tudor Amba
The flash memories are write-protected by default at power-on and
must be unlocked first, before being erased, then programmed.
The erase block sizes are not uniform. The memory layout is uniform
just for the 4K sector blocks.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/spi-nor/spi-nor.c | 20
Marek,
On 09/07/2018 11:31 PM, Marek Vasut wrote:
> On 09/07/2018 10:51 AM, Tudor Ambarus wrote:
>> Thanks Marek,
>>
>> On 09/03/2018 08:37 PM, Marek Vasut wrote:
>>> On 08/27/2018 12:26 PM, Tudor Ambarus wrote:
>>> [...]
>>>
>>>> +/*
On 09/03/2018 08:40 PM, Marek Vasut wrote:
> On 08/27/2018 12:26 PM, Tudor Ambarus wrote:
> [...]
>> +static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32
>> *smpt)
>> +{
>> +const u32 *ret = NULL;
>> +u32 i, addr;
>> +i
Thanks Marek,
On 09/03/2018 08:37 PM, Marek Vasut wrote:
> On 08/27/2018 12:26 PM, Tudor Ambarus wrote:
> [...]
>
>> +/* JEDEC JESD216B Standard imposes erase sizes to be power of 2. */
>> +static inline u64
>> +spi_nor_div_by_erase_size(const struc
: Tudor Ambarus
---
drivers/mtd/spi-nor/spi-nor.c | 269 +++---
include/linux/mtd/spi-nor.h | 11 ++
2 files changed, 264 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index c1e8169..522d5aa 100644
1 - 100 of 140 matches
Mail list logo
