.
Although currently hwmod overwrites resources, I have validated this
patch series by changing the omap_device layer to respect DT resources
and boot Tested on BeagleBone platform.
I will be submitting the changes for omap_device layer as well, still
needs to fix on certain things.
Vaibhav Hiremath (2
ndle.
Now, when using device tree, the format of the device name created
by OF layer is different, ".",
assuming that the device-tree "reg" property is specified.
This causes the look-up failure for clock node in dcan driver
To fix this add new dcan clock alias for using device
-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring robherri...@gmail.com
---
arch/arm/mach-omap2/clock33xx_data.c |2 ++
1 files changed, 2
.
Although currently hwmod overwrites resources, I have validated this
patch series by changing the omap_device layer to respect DT resources
and boot Tested on BeagleBone platform.
I will be submitting the changes for omap_device layer as well, still
needs to fix on certain things.
Vaibhav Hiremath (2
To make it consistent, convert all hex number presentation
to lower-case from all am33xx specific nodes.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/am335x-bone.dts |2 +-
arch/arm/boot/dts/am335x-evm.dts |2 +-
arch/arm/boot
and for only specific things.
Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode,
so this patch is preparation for the future where we supposed to get
rid of hwmod dependency anyway.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Benoit
Add missing soc_is_am33xx() check for DPLL common control & clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: Vaibhav Hiremath
Cc: Rajendra Nayak
Cc: Paul Walmsley
---
Not sure whether this should go as a fix in
Add missing soc_is_am33xx() check for DPLL common control clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
Not sure
rted as part of Bone and EVM dts support, so care
to add entry "status = "okay"" while adding support for any
module.
Signed-off-by: Vaibhav Hiremath
Acked-by: Arnd Bergmann
Cc: Benoit Cousson
Cc: Grant Likely
Cc: Tony Lindgren
---
Changes from V1:
- Fixed indentation
dts support, so care
to add entry status = okay while adding support for any
module.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Acked-by: Arnd Bergmann a...@arndb.de
Cc: Benoit Cousson b-cous...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Tony Lindgren t...@atomide.com
---
Changes
On 8/3/2012 3:50 AM, Omar Ramirez Luna wrote:
> Hi.
>
> On 2 August 2012 02:52, Paul Walmsley wrote:
>> On Mon, 16 Jul 2012, Omar Ramirez Luna wrote:
>>
>>> For a reset sequence to complete cleanly, a module needs its
>>> associated clocks to be enabled, otherwise the timeout check
>>> in prcm
On 8/3/2012 3:50 AM, Omar Ramirez Luna wrote:
Hi.
On 2 August 2012 02:52, Paul Walmsley p...@pwsan.com wrote:
On Mon, 16 Jul 2012, Omar Ramirez Luna wrote:
For a reset sequence to complete cleanly, a module needs its
associated clocks to be enabled, otherwise the timeout check
in prcm
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