bug.cgi?id=208911
Signed-off-by: Vinod Koul
---
Changes in v3:
- drop additional firmware versions and remove the check
Greg, this fixes regression for folks with preprogrammed controllers
please mark as stable material
drivers/usb/host/xhci-pci-renesas.c | 19 +--
1 file
On 18-08-20, 01:47, Bard Liao wrote:
> From: Pierre-Louis Bossart
>
> The existing code allocates memory for the total number of ports.
> This only works if the ports are contiguous, but will break if e.g. a
> Devices uses port0, 1, and 14. The port_ready[] array would contain 3
> elements,
On 18-08-20, 01:47, Bard Liao wrote:
> From: Pierre-Louis Bossart
>
> A Device may have at most 15 physical ports (DP0, DP1..DP14).
>
> Signed-off-by: Pierre-Louis Bossart
> Reviewed-by: Rander Wang
> Reviewed-by: Guennadi Liakhovetski
> Signed-off-by: Bard Liao
> ---
>
On 17-08-20, 23:29, Bard Liao wrote:
> This series adds power management support for Intel soundwire links.
Applied all, thanks
>
> Changes in v2:
> - Move "#include " to the first required patch.
> - Fit debug log in single line.
>
> Bard Liao (1):
> soundwire: intel: reinitialize IP+DSP
On 17-08-20, 11:10, Pierre-Louis Bossart wrote:
>
>
> > > I had applied except 3 & 9 (few skipped in middle due to conflict while
> > > applying), BUT I get a build failure on patch 2 onwards :(
> > >
> > > drivers/soundwire/intel_init.c: In function ‘sdw_intel_cleanup’:
> > >
On 17-08-20, 09:30, Pierre-Louis Bossart wrote:
>
>
>
> > > + } else if (clock_stop_quirks & SDW_INTEL_CLK_STOP_BUS_RESET) {
> > > + ret = sdw_cdns_clock_stop(cdns, true);
> > > + if (ret < 0) {
> > > + dev_err(dev, "cannot enable clock stop on suspend\n");
> > >
On 17-08-20, 04:10, Bard Liao wrote:
> From: Pierre-Louis Bossart
>
> The upcoming SDCA (SoundWire Device Class Audio) specification defines
> a hiearchical encoding to interface with Class-defined capabilities,
typo hiearchical
> based on which audio function, entity, control and channel
On 22-07-20, 04:37, Bard Liao wrote:
> This series adds power management support for Intel soundwire links.
I had applied except 3 & 9 (few skipped in middle due to conflict while
applying), BUT I get a build failure on patch 2 onwards :(
drivers/soundwire/intel_init.c: In function
On 22-07-20, 04:37, Bard Liao wrote:
> From: Rander Wang
>
> Move existing pm_runtime suspend under the CLK_STOP_TEARDOWN case.
>
> In this mode the Master IP will lose all context but in-band wakes are
> supported.
>
> On pm_runtime resume a complete re-enumeration will be performed after
> a
On 22-07-20, 04:37, Bard Liao wrote:
> From: Pierre-Louis Bossart
>
> The system resume does the entire bus re-initialization and brings it
> to full-power. If the device was pm_runtime suspended, there is no
> need to run the pm_runtime resume sequence after the system runtime.
>
> Follow the
On 27-07-20, 05:59, Bard Liao wrote:
> The hierarchy of soundwire devices is platform device -> M device -> S
> device. A S device is physically attached on the platform device. So the
> platform device should be resumed when a S device is resumed. As the
> bridge of platform device and S device,
On 31-07-20, 23:08, Serge Semin wrote:
> After a lot of tests and thorough DW DMAC databook studying we've
> discovered that the driver can be optimized especially when it comes to
> working with non-memory peripherals.
>
> First of all we've found out that since each DW DMAC channel can
> be
On 06-08-20, 13:49, Peter Ujfalusi wrote:
> of_dma_xlate callback can return ERR_PTR as well NULL in case of failure.
>
> If error code is returned (not NULL) then the route should be released and
> the router should not be registered for the channel.
Applied, thanks
--
~Vinod
On 03-08-20, 15:57, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v1:
> - Drop unrelated empty line change in patch 1 (k3-psil.c)
>
> j7200 uses the same DMA hardware but have different set of peripherals,
> needing
> different PSI-L thread map compared to j721e.
>
> To simplify the runtime
On 29-07-20, 20:49, Yu Kuai wrote:
> if of_find_device_by_node() succeed, sba_probe() doesn't have a
> corresponding put_device(). Thus add a jump target to fix the
> exception handling for this function implementation.
Applied, thanks
--
~Vinod
On 29-07-20, 20:29, Yu Kuai wrote:
> Do several things for exception handing:
>
> a. check return value of of_find_device_by_node().
> b. call put_device() if memory allocation for 'atslave' failed.
> c. if dma_request_channel() failed, call put_device() and kfree().
One patch per change please
On 28-07-20, 19:09, Krzysztof Kozlowski wrote:
> The of_device_id is included unconditionally by of.h header and used
> in the driver as well. Remove of_match_ptr to fix W=1 compile test
> warning with !CONFIG_OF:
>
> drivers/dma/ti/omap-dma.c:1892:34: warning: 'omap_dma_match' defined but
On 27-07-20, 14:19, Andy Shevchenko wrote:
> On Mon, Jul 27, 2020 at 1:16 PM Vinod Koul wrote:
> > On 20-07-20, 17:07, Vaibhav Gupta wrote:
> > > Drivers using legacy PM have to manage PCI states and device's PM states
> > > themselves. They also need to take care
On 22-07-20, 17:54, Hanjun Guo wrote:
> The acpi_get_table() should be coupled with acpi_put_table() if
> the mapped table is not used at runtime to release the table
> mapping, put the CSRT table buf after using it.
Applied, thanks
--
~Vinod
?id=208911
Signed-off-by: Vinod Koul
---
Greg, this fixes regression for folks with preprogrammed controllers with
firmware version 0x2020 and 0x2011, please mark as stable material
drivers/usb/host/xhci-pci-renesas.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/driver
Signed-off-by: Vinod Koul
---
Greg, this fixes regression for folks with preprogrammed controllers with
firmware version 0x2020, please mark as stable material
drivers/usb/host/xhci-pci-renesas.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci-pci-re
HI Laurent,
On 12-08-20, 01:50, Laurent Pinchart wrote:
> On Wed, Aug 12, 2020 at 06:37:59AM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > master
> > head: c636eef2ee3696f261a35f34989842701a107895
> > commit:
o Park 2013-08-09 2822
> f6f2421c0a1cb6 Lars-Peter Clausen 2014-07-06 2823
> list_move_tail(>node, >desc_pool);
> 52a9d179109c50 Chanho Park 2013-08-09 2824
> f6f2421c0a1cb6 Lars-Peter Clausen 2014-07-06 2825
> spin_unlock_irqrestore(>pool_
dt-bindings: dma: pl330: Document the quirk 'arm,pl330-periph-burst'
dmaengine: pl330: Add quirk 'arm,pl330-periph-burst'
Vinod Koul (5):
MAINTAINERS: switch dmaengine tree to kernel.org
dmaengine: xilinx: dpdma: remove comparison of unsigned expression
dmaengine: xilinx
On 23-07-20, 22:33, Takashi Iwai wrote:
> On Thu, 23 Jul 2020 17:56:12 +0200,
> Vinod Koul wrote:
> >
> > On 23-07-20, 15:17, Takashi Iwai wrote:
> > > On Thu, 23 Jul 2020 15:05:22 +0200,
> > > Vinod Koul wrote:
> > > >
> > > > On 2
On 05-08-20, 14:27, Peter Ujfalusi wrote:
> The original commit mixed up the forward and completion ring IDs for the
> rx flow configuration.
Acked-By: Vinod Koul
>
> Fixes: 4927b1ab2047 ("dmaengine: ti: k3-udma: Switch to
> k3_ringacc_request_rings_pair")
> S
On 03-08-20, 22:10, YueHaibing wrote:
> drivers/dma/iop-adma.c:447:13: warning: cast to pointer from integer of
> different size [-Wint-to-pointer-cast]
> drivers/dma/iop-adma.c:449:4: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
>
On 27-07-20, 15:34, Gustavo A. R. Silva wrote:
> diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
> index 2c508ee672b9..9b69716172a4 100644
> --- a/drivers/dma/pl330.c
> +++ b/drivers/dma/pl330.c
> @@ -1061,16 +1061,16 @@ static bool _start(struct pl330_thread *thrd)
>
> if
On 04-08-20, 22:14, Mark Brown wrote:
> On Fri, Jul 31, 2020 at 03:59:54PM +0300, Serge Semin wrote:
> > On Fri, Jul 31, 2020 at 12:26:12PM +0300, Andy Shevchenko wrote:
> > > On Fri, Jul 31, 2020 at 10:59:45AM +0300, Serge Semin wrote:
>
> > > > Note since the DMA-engine subsystem in kernel
Hello Liam,
On 03-08-20, 20:08, Liam Beguin wrote:
> Hi Vinod,
>
> On Sat, Jul 18, 2020 at 4:18 PM Liam Beguin wrote:
> >
> >
> > Hi,
> >
> > I sent another patch[1] to try to address this.
> >
> > The issue seems to come from the fact that the parisc architecture
> > doesn't support cmpxchg on
On 03-08-20, 09:06, Rob Clark wrote:
> On Mon, Aug 3, 2020 at 4:00 AM Vinod Koul wrote:
> >
> > On 26-07-20, 13:12, Konrad Dybcio wrote:
> > > These SoCs make use of the 14nm phy, but at different
> > > addresses than other 14nm units.
> &g
On 03-08-20, 13:11, Peter Ujfalusi wrote:
> Instead of separate of_machine_is_compatible() it is better to use
> soc_device_match() and soc_device_attribute struct to get the PSI-L map
> for the booted device.
>
> By using soc_device_match() it is easier to add support for new devices.
>
>
Hi Sivaprakash,
On 29-07-20, 12:15, Sivaprakash Murugesan wrote:
>
> On 7/13/2020 11:25 AM, Vinod Koul wrote:
> > On 05-07-20, 14:47, Sivaprakash Murugesan wrote:
> > > There were some problem in ipq8074 gen2 pcie phy init sequence, fix
> > Can you please describe th
On 26-07-20, 13:12, Konrad Dybcio wrote:
> These SoCs make use of the 14nm phy, but at different
> addresses than other 14nm units.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../devicetree/bindings/display/msm/dsi.txt| 1 +
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
>
On 30-07-20, 20:13, Serge Semin wrote:
> On Thu, Jul 30, 2020 at 07:47:03PM +0300, Andy Shevchenko wrote:
> > On Thu, Jul 30, 2020 at 07:31:54PM +0300, Serge Semin wrote:
> > > On Thu, Jul 30, 2020 at 07:24:28PM +0300, Andy Shevchenko wrote:
> > > > On Thu, Jul 30, 2020 at 06:45:42PM +0300, Serge
less however QDSP can also
> support switching decoders on a single stream. Patches to support such feature
> are send in different patchset which involves adding generic interfaces.
The lgtm so:
Reviewed-by: Vinod Koul
tested on Dragon Board RB3:
Tested-by: Vinod Koul
--
~Vinod
Hi Sekhar,
On 26-07-20, 01:24, Sekhar Nori wrote:
> Hi Vinod,
>
> On 7/17/20 12:20 PM, Swapnil Jakhade wrote:
> > This patch series adds a new pair of PHY APIs that can be used to get/set
> > all the PHY attributes. It also adds a new PHY attribute max_link_rate.
> >
> > It includes following
On 25-07-20, 15:34, Zhou Yanjie wrote:
> Hi Felipe,
>
> 在 2020/7/25 下午2:16, Felipe Balbi 写道:
> > Hi,
> >
> > 周琰杰 (Zhou Yanjie) writes:
> > > Add support for probing the phy-jz4770 driver on the JZ4780 SoC,
> > > the X1000 SoC and the X1830 SoC from Ingenic.
> > >
> > > Tested-by: 周正 (Zhou
On 25-07-20, 09:16, Felipe Balbi wrote:
>
> Hi,
>
> 周琰杰 (Zhou Yanjie) writes:
> > Add support for probing the phy-jz4770 driver on the JZ4780 SoC,
> > the X1000 SoC and the X1830 SoC from Ingenic.
> >
> > Tested-by: 周正 (Zhou Zheng)
> > Co-developed-by: 漆鹏振 (Qi Pengzhen)
> > Signed-off-by: 漆鹏振
On 23-07-20, 10:34, EastL wrote:
> On Wed, 2020-07-15 at 11:49 +0530, Vinod Koul wrote:
> > On 02-07-20, 15:06, EastL Lee wrote:
> >
> > > static enum dma_status mtk_cqdma_tx_status(struct dma_chan *c,
> > >
On 19-07-20, 23:11, Amit Singh Tomar wrote:
> At the moment, Driver uses bit fields to describe registers of the DMA
> descriptor structure that makes it less portable and maintainable, and
> Andre suugested(and even sketched important bits for it) to make use of
> array to describe this DMA
On 19-07-20, 23:12, Amit Singh Tomar wrote:
> DMA controller present on S700 SoC is compatible with the one on S900
> (as most of registers are same), but it has different DMA descriptor
> structure where registers "fcnt" and "ctrlb" uses different encoding.
>
> For instance, on S900 "fcnt"
On 19-07-20, 23:11, Amit Singh Tomar wrote:
> Converts the device tree bindings for the Actions Semi Owl SoCs DMA
> Controller over to YAML schemas.
>
> It also adds new compatible string "actions,s700-dma".
Applied, thanks
--
~Vinod
On 20-07-20, 12:04, Rajesh Gumasta wrote:
> v4 changes: Removed pending dma desc list and other unused
> data structures
>
> v3 changes: Removed free list for dma_desc and sg
This is v1 patch and we have v3/v4 stuff! Anyway this can go after the
marker succeeding sob line or cover!
>
> Adding
On 23-07-20, 03:58, Serge Semin wrote:
> In the previous patchset I've written the next message:
>
> > Folks, note I've removed the next patches from the series:
> > [PATCH v7 04/11] dmaengine: Introduce max SG list entries capability
> > [PATCH v7 11/11] dmaengine: dw: Initialize max_sg_nents
Hi Vaibhav,
On 20-07-20, 17:07, Vaibhav Gupta wrote:
> Drivers using legacy PM have to manage PCI states and device's PM states
> themselves. They also need to take care of configuration registers.
>
> With improved and powerful support of generic PM, PCI Core takes care of
> above mentioned,
Lontium LT9611 HDMI bridge can be found in Dragon Board RB3 for
converting DSI to HDMI. Enable this driver to get display working on RB3
Signed-off-by: Vinod Koul
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64
From: Bjorn Andersson
Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI
audio nodes.
Signed-off-by: Bjorn Andersson
Co-developed-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 118
On 24-07-20, 04:30, Laurent Pinchart wrote:
> Hi Vinod,
>
> Thank you for the patch.
>
> On Thu, Jul 23, 2020 at 04:15:23PM +0530, Vinod Koul wrote:
> > Add bridge type as DRM_MODE_CONNECTOR_HDMIA
> >
> > Signed-off-by: Vinod Koul
>
> Th
the
> > ADV
> > driver has been changed accordingly. However, the 'type' field of the bridge
> > structure was left unset, which makes the helper function always return
> > -EINVAL.
> >
> > Signed-off-by: Laurentiu Palcu
>
> Reviewed-by: Laurent Pinc
-by: Vinod Koul
---
drivers/gpu/drm/bridge/Kconfig | 13 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/lontium-lt9611.c | 1229 +++
3 files changed, 1243 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/lontium-lt9611.c
diff --git
Add prefix for Lontium Semiconductor Corporation
Acked-by: Rob Herring
Tested-by: John Stultz
Signed-off-by: Vinod Koul
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b
Lontium LT9611 is a DSI to HDMI bridge which supports 2 DSI ports
and I2S port as input and one HDMI port as output
Reviewed-by: Rob Herring
Tested-by: John Stultz
Signed-off-by: Vinod Koul
---
.../display/bridge/lontium,lt9611.yaml| 176 ++
1 file changed, 176
- Add HDMI audio support
Vinod Koul (3):
dt-bindings: vendor-prefixes: Add Lontium vendor prefix
dt-bindings: display: bridge: Add documentation for LT9611
drm/bridge: Introduce LT9611 DSI to HDMI bridge
.../display/bridge/lontium,lt9611.yaml| 176 +++
.../devicetree/bindings
On 23-07-20, 15:17, Takashi Iwai wrote:
> On Thu, 23 Jul 2020 15:05:22 +0200,
> Vinod Koul wrote:
> >
> > On 23-07-20, 14:38, Takashi Iwai wrote:
> > > On Tue, 21 Jul 2020 19:00:01 +0200,
> > > Srinivas Kandagatla wrote:
> > > >
> > >
On 23-07-20, 14:38, Takashi Iwai wrote:
> On Tue, 21 Jul 2020 19:00:01 +0200,
> Srinivas Kandagatla wrote:
> >
> > For gapless playback it is possible that each track can have different
> > codec profile with same decoder, for example we have WMA album,
> > we may have different tracks as WMA v9,
On 23-07-20, 13:39, Sam Ravnborg wrote:
> On Thu, Jul 23, 2020 at 04:11:51PM +0530, Vinod Koul wrote:
> > Hi Sam, Laurent,
> >
> > On 22-07-20, 16:14, Laurent Pinchart wrote:
> > > > > +static int lt9611_bridge_attach(struct drm_bridge *bridge,
> >
Add bridge type as DRM_MODE_CONNECTOR_HDMIA
Signed-off-by: Vinod Koul
---
I found this when testing Dragon-board 410c which uses this bridge
[6.671913] msm 1a0.mdss: [drm:msm_dsi_manager_ext_bridge_init [msm]]
*ERROR* drm_bridge_connector_init failed: -22
[6.678879] msm 1a0
Hi Sam, Laurent,
On 22-07-20, 16:14, Laurent Pinchart wrote:
> > > +static int lt9611_bridge_attach(struct drm_bridge *bridge,
> > > + enum drm_bridge_attach_flags flags)
> > > +{
> > > + struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
> > > + int ret;
> > > +
> > > + if
On 23-07-20, 09:20, Greg KH wrote:
> On Thu, Jul 23, 2020 at 12:38:13PM +0530, Vinod Koul wrote:
> > Hey Greg,
> >
> > Here are the updates for soundwire subsystem for 5.9. Please pull.
> >
> >
> > The following changes since commit b3a9e3b9622ae10064826dc
for related subdir in Makefile
phy: allwinner: Make PHY_SUN6I_MIPI_DPHY depend on COMMON_CLK
Tobias Klauser (1):
phy: zynqmp: Fix unused-function compiler warning
Vinod Koul (13):
phy: qcom: remove ufs qmp phy driver
phy: core: fix code style in devm_of_phy_provider_unregister
: qcom: Constify static structs
Sanyog Kale (1):
MAINTAINERS: change SoundWire maintainer
Vinod Koul (2):
soundwire: Replace 'objs' by 'y'
soundwire: fix the kernel-doc comment
Documentation/driver-api/soundwire/stream.rst | 11 +-
MAINTAINERS
On 22-07-20, 10:36, Pierre-Louis Bossart wrote:
>
> > > > * and the stream properties
> > > > + * @set_codec_params: Sets the compressed stream codec
> > > > parameters, Optional
> > > > + * This can be called in during gapless next track codec change
> > > > only to set
> > > > + * codec
On 21-07-20, 16:06, Colin King wrote:
> From: Colin Ian King
>
> Currently when reading of the device property for "qcom,tx-deamp_3_5db"
> fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This
> looks like a copy-n-paste error and in fact should be assigning the
> default
On 20-07-20, 15:12, Álvaro Fernández Rojas wrote:
> Add BCM63xx USBH PHY driver for BMIPS.
>
> v8: readd Simon as author and remove his email address from the source code.
> v7: remove Simon from authors and introduce changes suggested by Rob:
> - Move clock conditions to the main section.
>
On 20-07-20, 08:27, Gustavo A. R. Silva wrote:
> Fix IS_ERR argument in samsung_ufs_phy_symbol_clk_init(). The proper
> argument to be passed to IS_ERR() is phy->rx1_symbol_clk.
>
> This bug was detected with the help of Coccinelle.
Applied, thanks
--
~Vinod
On 16-07-20, 23:09, Bard Liao wrote:
> This series does some cleanup, revisits SHIM programming sequences,
> and merges Soundwire interrupt handlers/threads.
Applied, thanks
--
~Vinod
Hi Stephen,
On 21-07-20, 16:17, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the dmaengine tree got a conflict in:
>
> MAINTAINERS
>
> between commit:
>
> 4a33bea00314 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit
> Transceiver")
>
> from the phy-next
On 20-07-20, 14:25, ansuels...@gmail.com wrote:
>
>
> > -Messaggio originale-----
> > Da: Vinod Koul
> > Inviato: lunedì 20 luglio 2020 08:26
> > A: Ansuel Smith
> > Cc: Andy Gross ; Jonathan McDowell
> > ; Andy Gross ; Bjorn Andersson
> > ;
On 16-07-20, 18:18, Lad Prabhakar wrote:
> Add binding for R8A774E1 SoC (RZ/G2H).
Applied, thanks
--
~Vinod
On 16-07-20, 18:18, Lad Prabhakar wrote:
> Document RZ/G2H (R8A774E1) SoC bindings.
Applied, thanks
--
~Vinod
On 16-07-20, 18:18, Lad Prabhakar wrote:
> Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
Applied, thanks
--
~Vinod
On 17-07-20, 20:44, Yoshihiro Shimoda wrote:
> The patch 1 can fix an issue which SError happen if CONFIG_DEBUG_SHIRQ
> is enabled.
> The patch 2 is a incremental patch from patch 1. It's better to avoid
> unexpected behaviors if request_irq() failed.
Applied, thanks
--
~Vinod
On 17-07-20, 15:16, Ansuel Smith wrote:
> This has lost in the original push for the dwc3 qcom driver.
> This is needed for ipq806x SoC as without this the usb ports
> doesn't work at all.
Applied both, thanks
My script found below errors with W=1, can you please send fixes for
these
Hi Sam,
On 19-07-20, 19:18, Sam Ravnborg wrote:
> Hi Vinod.
>
> Three trivial points below.
> The rest looks good.
>
> With these fixed you can add:
> Reviewed-by: Sam Ravnborg
Thanks, I will send an update with nits fixed
--
~Vinod
Hello,
On 08-07-20, 16:05, Vinod Koul wrote:
> Hi,
>
> This series adds driver and bindings for Lontium LT9611 bridge chip which
> takes MIPI DSI as input and HDMI as output.
>
> This chip can be found in 96boards RB3 platform [1] commonly called DB845c.
Any feedback on thi
On 17-07-20, 19:51, Randy Dunlap wrote:
> From: Randy Dunlap
>
> Drop the doubled word "has" in a comment.
Applied, thanks
--
~Vinod
On 17-07-20, 08:16, Yoshihiro Shimoda wrote:
> Hello Vinod,
>
> > From: Vinod Koul, Sent: Friday, July 17, 2020 3:39 PM
> >
> > hello Yoshihiro,
> >
> > On 13-07-20, 21:11, Yoshihiro Shimoda wrote:
> >
> > Please consider revising patch
On 15-07-20, 20:08, Serge Semin wrote:
> On Wed, Jul 15, 2020 at 04:43:15PM +0530, Vinod Koul wrote:
> > On 10-07-20, 19:14, Serge Semin wrote:
> > > On Fri, Jul 10, 2020 at 02:51:33PM +0300, Peter Ujfalusi wrote:
> >
> > > > Since we should be able to
On 17-07-20, 00:52, Alim Akhtar wrote:
> This patch documents Samsung UFS PHY device tree bindings
Applied both, thanks
--
~Vinod
On 16-07-20, 14:48, Thierry Reding wrote:
> Hi Kishon, Vinod,
>
> did you have any further comments on this series or is it good to go
> into v5.9?
I dont have this series in my inbox, can you please rebase and resend
--
~Vinod
On 16-07-20, 13:55, Ansuel Smith wrote:
> +static int qcom_ipq806x_usb_ss_phy_init(struct phy *phy)
> +{
> + struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
> + int ret;
> + u32 data;
> +
> + ret = clk_prepare_enable(phy_dwc3->xo_clk);
> + if (ret)
> + return ret;
hello Yoshihiro,
On 13-07-20, 21:11, Yoshihiro Shimoda wrote:
Please consider revising patch subject. It tell me you are fixing an
error but it doesnt tell me what this patch is about :)
Perhpas :move irq registration to init" maybe a better title which
describes the changes this patch brings
On 16-07-20, 11:43, Kunihiko Hayashi wrote:
> +static int uniphier_ahciphy_pxs3_init(struct uniphier_ahciphy_priv *priv)
> +{
> + int i;
> + u32 val;
> +
> + /* setup port parameter */
> + val = readl(priv->base + TXCTRL0);
> + val &= ~TXCTRL0_AMP_G3_MASK;
> + val |=
in this function); did you mean ‘GPIOF_IN’?
drivers/phy/allwinner/phy-sun4i-usb.c:815:21: error: implicit
declaration of function ‘gpiod_to_irq’; did you mean ‘gpio_to_irq’?
[-Werror=implicit-function-declaration]
Reported-by: Randy Dunlap
Signed-off-by: Vinod Koul
---
drivers/phy/allwinner/phy
On 15-07-20, 08:18, Randy Dunlap wrote:
> On 7/15/20 1:05 AM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20200714:
> >
>
> on x86_64:
> # CONFIG_GPIOLIB is not set
>
> ../drivers/phy/allwinner/phy-sun4i-usb.c: In function
> ‘sun4i_usb_phy0_get_id_det’:
>
On 13-07-20, 15:23, Ansuel Smith wrote:
> +static inline void usb_phy_write_readback(struct usb_phy *phy_dwc3,
> + u32 offset,
> + const u32 mask, u32 val)
> +{
> + u32 write_val, tmp = readl(phy_dwc3->base + offset);
On 13-07-20, 07:42, Anand Moon wrote:
> Instead of a busy waiting while loop using udelay
> use readl_poll_timeout function to check the condition
> is met or timeout occurs in crport_handshake function.
> readl_poll_timeout is called in non atomic context so
> it safe to sleep until the condition
Hi Alim,
On 16-07-20, 06:47, Alim Akhtar wrote:
> > > +static int samsung_ufs_phy_symbol_clk_init(struct samsung_ufs_phy
> > > +*phy) {
> > > + int ret = 0;
> >
> > superfluous init, am sure I flagged it before as well
> >
> Yes, you did, but 0-DAY CI kernel test gave warning [1], so I kept
Hi Lee,
On 14-07-20, 12:15, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> After these patches are applied, the build system no longer
> complains about any W=0 nor
Hi Fabio,
On 15-07-20, 10:16, Fabio Estevam wrote:
> Hi Vinod,
>
> On Wed, Jul 15, 2020 at 10:01 AM Vinod Koul wrote:
> >
> > sdmac->event_id0 is of type unsigned int and hence can never be less
> > than zero. Driver compares this at couple of places with gre
s true [-Wtype-limits]
drivers/dma/imx-sdma.c:1637:23: warning: comparison of unsigned expression >= 0
is always true [-Wtype-limits]
Signed-off-by: Vinod Koul
---
drivers/dma/imx-sdma.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/dr
On 10-07-20, 12:45, Serge Semin wrote:
> On Fri, Jul 10, 2020 at 11:51:23AM +0300, Andy Shevchenko wrote:
> > On Fri, Jul 10, 2020 at 01:45:47AM +0300, Serge Semin wrote:
> > > Since some DW DMA controllers (like one installed on Baikal-T1 SoC) may
> > > have non-uniform DMA capabilities per
On 10-07-20, 19:14, Serge Semin wrote:
> On Fri, Jul 10, 2020 at 02:51:33PM +0300, Peter Ujfalusi wrote:
> > Since we should be able to handle longer lists and this is kind of a
> > hint for clients that above this number of nents the list will be broken
> > up to smaller 'bursts', which when
On 13-07-20, 22:35, Lad Prabhakar wrote:
> Renesas RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible
> DMA controllers, therefore document RZ/G2H specific bindings.
Applied, thanks
--
~Vinod
On 15-07-20, 05:37, Bard Liao wrote:
> Fix PRBS/Static_1 swapped definitions and indentation in sdw.h
Applied both, thanks
--
~Vinod
-udma: Fix the running channel handling in
alloc_chan_resources
dmaengine: ti: k3-udma: Fix delayed_work usage for tx drain workaround
dmaengine: dmatest: stop completed threads when running without set
channel
Robin Gong (1):
dmaengine: fsl-edma-common: correct DSIZE_32BYTE
Vin
On 10-07-20, 13:25, Gustavo A. R. Silva wrote:
> Hi all,
>
> Friendly ping: who can take this, please?
Applied now
--
~Vinod
On 02-07-20, 15:06, EastL Lee wrote:
> static enum dma_status mtk_cqdma_tx_status(struct dma_chan *c,
> dma_cookie_t cookie,
> struct dma_tx_state *txstate)
> {
> - struct mtk_cqdma_vchan *cvc =
> > Signed-off-by: Randy Dunlap
> > Cc: Dave Jiang
> > Cc: dmaeng...@vger.kernel.org
> > Cc: Vinod Koul
>
> Vinod, I submitted this fix patch last week:
> https://patchwork.kernel.org/patch/11649231/
>
> But I think maybe Randy's patch may be more preferable? You can apply this
> one and ignore my submission.
Ok, Applied this one, thanks
--
~Vinod
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