Sean Christopherson writes:
> On Fri, Aug 07, 2020 at 04:12:30PM +0200, Vitaly Kuznetsov wrote:
>> No functional change intended. Slot flags will need to be analyzed
>> prior to try_async_pf() when KVM_MEM_PCI_HOLE is implemented.
>
(Sorry it took me so long to reply. N
Peter Xu writes:
> On Fri, Aug 07, 2020 at 04:12:29PM +0200, Vitaly Kuznetsov wrote:
>> When testing Linux kernel boot with QEMU q35 VM and direct kernel boot
>> I observed 8193 accesses to PCI hole memory. When such exit is handled
>> in KVM without exiting to usersp
Sean Christopherson writes:
> On Fri, Aug 07, 2020 at 04:12:31PM +0200, Vitaly Kuznetsov wrote:
>> PCIe config space can (depending on the configuration) be quite big but
>> usually is sparsely populated. Guest may scan it by accessing individual
>> device's page which, w
Sean Christopherson writes:
> On Mon, Aug 24, 2020 at 03:45:26PM -0700, Jim Mattson wrote:
>> On Mon, Aug 24, 2020 at 11:57 AM Jim Mattson wrote:
>> >
>> > On Fri, Aug 21, 2020 at 8:40 PM Sean Christopherson
>> > wrote:
>> > > I agree the code is a mess (kvm_init() and kvm_exit() included),
Chenyi Qiang writes:
> Virtual Machine can exploit bus locks to degrade the performance of
> system. Bus lock can be caused by split locked access to writeback(WB)
> memory or by using locks on uncacheable(UC) memory. The bus lock is
> typically >1000 cycles slower than an atomic operation
Lai Jiangshan writes:
> On Mon, Aug 31, 2020 at 9:09 PM Vitaly Kuznetsov wrote:
>>
>> Lai Jiangshan writes:
>>
>> > Ping @Sean Christopherson
>> >
>>
>> Let's try 'Beetlejuice' instead :-)
>>
>> > On Mon, Aug 24, 2020 at 5
Lai Jiangshan writes:
> Ping @Sean Christopherson
>
Let's try 'Beetlejuice' instead :-)
> On Mon, Aug 24, 2020 at 5:18 PM Lai Jiangshan wrote:
>>
>> From: Lai Jiangshan
>>
>> 8c8560b83390("KVM: x86/mmu: Use KVM_REQ_TLB_FLUSH_CURRENT for MMU specific
>> flushes)
>> changed it without giving
Wanpeng Li writes:
> From: Wanpeng Li
>
> per-vCPU timer_advance_ns should be set to 0 if timer mode is not tscdeadline
> otherwise we waste cpu cycles in the function lapic_timer_int_injected(),
lapic_timer_int_injected is just a test, kvm_wait_lapic_expire()
(__kvm_wait_lapic_expire())
syzbot writes:
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:47ec5303 Merge git://git.kernel.org/pub/scm/linux/kernel/g..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=17228c6290
> kernel config:
Test the newly introduced KVM_MEM_PCI_HOLE memslots:
- Reads from all pages return '0xff'
- Writes to all pages cause KVM_EXIT_MMIO
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/Makefile | 1 +
.../testing/selftests/kvm/include/kvm_util.h | 1 +
tools/testing
to the already existing KVM_MEM_READONLY, VMM doesn't need to allocate
real memory and stuff it with '0xff'.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/api.rst | 18 ++-
arch/x86/include/uapi/asm/kvm.h | 1 +
arch/x86/kvm/mmu/mmu.c
ge stuffed with
0xff. This is omitted in this submission as the benefits are unclear:
KVM will have to allocate SPTEs (either on demand or aggressively) and
this also consumes time/memory. We can always take a look at possible
optimizations later.
Vitaly Kuznetsov (3):
KVM: x86: move kvm_vcpu_gfn_to_memslot()
No functional change intended. Slot flags will need to be analyzed
prior to try_async_pf() when KVM_MEM_PCI_HOLE is implemented.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 14 --
arch/x86/kvm/mmu/paging_tmpl.h | 7 +--
2 files changed, 13 insertions
Don't notify Hyper-V if the die event is other than oops */
> + if (val != DIE_OOPS)
> + return NOTIFY_DONE;
> +
Looking at die_val enum, DIE_PANIC also sounds like something we would
want to report but it doesn't get emitted anywhere and honestly I don't
quite underst
KVM_GET_SUPPORTED_HV_CPUID is now supported as both vCPU and VM ioctl,
test that.
Signed-off-by: Vitaly Kuznetsov
---
.../testing/selftests/kvm/include/kvm_util.h | 2 +
tools/testing/selftests/kvm/lib/kvm_util.c| 26 +++
.../selftests/kvm/x86_64/hyperv_cpuid.c | 46
KVM_GET_SUPPORTED_HV_CPUID to 'dual' system/vCPU ioctl with the
same meaning.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/api.rst | 4 ++--
arch/x86/kvm/x86.c | 43 --
include/uapi/linux/kvm.h | 4 ++--
3 files changed, 30 insertions(+), 21
Hyper-V Synthetic timers require SynIC but we don't seem to check that
upon HV_X64_MSR_STIMER[X]_CONFIG/HV_X64_MSR_STIMER0_COUNT writes. Make
the behavior match synic_set_msr().
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/hyperv.c | 11 +++
1 file changed, 11 insertions(+)
diff
kvm_vcpu_ioctl_get_hv_cpuid() doesn't use its vcpu parameter anymore,
drop it. Also, the function is now untied from vcpu, rename it accordingly.
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/hyperv.c | 3 +--
arch/x86/kvm/hyperv.h | 3 +--
arch/x86/kvm/x86.c
KVM_GET_SUPPORTED_CPUID/
KVM_GET_MSRS ioctls but Hyper-V specific features don't get in the output
(as Hyper-V CPUIDs intersect with KVM's). In QEMU, CPU feature expansion
happens before any KVM vcpus are created so KVM_GET_SUPPORTED_HV_CPUID
can't be used in its current shape.
Vitaly Kuznetsov (7
, make
EVMCS feature bits work the same way as all other bits, nothing should break
(famous last words).
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/api.rst| 3 --
arch/x86/include/asm/kvm_host.h | 2 +-
arch/x86/kvm/hyperv.c
We forgot to update KVM_GET_SUPPORTED_HV_CPUID's documentation in api.rst
when SynDBG leaves were added.
While on it, fix 'KVM_GET_SUPPORTED_CPUID' copy-paste error.
Fixes: f97f5a56f597 ("x86/kvm/hyper-v: Add support for synthetic debugger
interface")
Signed-off-by: Vitaly
so no VMM should just blindly copy it to guest CPUIDs. Second,
lapic_in_kernel() is a must for SynIC. Expose the bit unconditionally.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/hyperv.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/x86/kvm/hyperv.c b/arch
"Michael S. Tsirkin" writes:
> About the feature bit, I am not sure why it's really needed. A single
> mmio access is cheaper than two io accesses anyway, right? So it makes
> sense for a kvm guest whether host has this feature or not.
> We need to be careful and limit to a specific QEMU
"Michael S. Tsirkin" writes:
> On Tue, Jul 28, 2020 at 04:37:38PM +0200, Vitaly Kuznetsov wrote:
>> This is a continuation of "[PATCH RFC 0/5] KVM: x86: KVM_MEM_ALLONES
>> memory" work:
>> https://lore.kernel.org/kvm/20200514180540.52407-1-vkuzn...@redha
Jim Mattson writes:
> On Tue, Jul 28, 2020 at 7:38 AM Vitaly Kuznetsov wrote:
>>
>> PCIe config space can (depending on the configuration) be quite big but
>> usually is sparsely populated. Guest may scan it by accessing individual
>> device's page which, when dev
Andrew Jones writes:
> On Tue, Jul 28, 2020 at 04:37:40PM +0200, Vitaly Kuznetsov wrote:
>> PCIe config space can (depending on the configuration) be quite big but
>> usually is sparsely populated. Guest may scan it by accessing individual
>> device's page which, w
Alexander Graf writes:
> It's not desireable to have all MSRs always handled by KVM kernel space. Some
> MSRs would be useful to handle in user space to either emulate behavior (like
> uCode updates) or differentiate whether they are valid based on the CPU model.
>
> To allow user space to
Alexander Graf writes:
> MSRs are weird. Some of them are normal control registers, such as EFER.
> Some however are registers that really are model specific, not very
> interesting to virtualization workloads, and not performance critical.
> Others again are really just windows into package
Andy Shevchenko writes:
> On Thu, Jul 30, 2020 at 10:37 PM Julia Suvorova wrote:
>>
>> Using MMCONFIG instead of I/O ports cuts the number of config space
>> accesses in half, which is faster on KVM and opens the door for
>> additional optimizations such as Vitaly's "[PATCH 0/3] KVM: x86: KVM
Wanpeng Li writes:
> On Wed, 29 Jul 2020 at 20:21, Vitaly Kuznetsov wrote:
>>
>> Wanpeng Li writes:
>>
>> > From: Wanpeng Li
>> >
>> > Commit 8566ac8b (KVM: SVM: Implement pause loop exit logic in SVM) drops
>> > disable pause
Alexander Graf writes:
> It's not desireable to have all MSRs always handled by KVM kernel space. Some
> MSRs would be useful to handle in user space to either emulate behavior (like
> uCode updates) or differentiate whether they are valid based on the CPU model.
>
> To allow user space to
Alexander Graf writes:
> MSRs are weird. Some of them are normal control registers, such as EFER.
> Some however are registers that really are model specific, not very
> interesting to virtualization workloads, and not performance critical.
> Others again are really just windows into package
Wanpeng Li writes:
> From: Wanpeng Li
>
> Commit 8566ac8b (KVM: SVM: Implement pause loop exit logic in SVM) drops
> disable pause loop exit/pause filtering capability completely, I guess it
> is a merge fault by Radim since disable vmexits capabilities and pause
> loop exit for SVM patchsets
Alexander Graf writes:
> On 29.07.20 10:23, Vitaly Kuznetsov wrote:
>>
>>
>>
>> Jim Mattson writes:
>>
>>> On Tue, Jul 28, 2020 at 5:41 AM Alexander Graf wrote:
>>>>
>>
>> ...
>>
>>>> While it does
Jim Mattson writes:
> On Tue, Jul 28, 2020 at 5:41 AM Alexander Graf wrote:
>>
...
>> While it does feel a bit overengineered, it would solve the problem that
>> we're turning in-KVM handled MSRs into an ABI.
>
> It seems unlikely that userspace is going to know what to do with a
> large
Test the newly introduced KVM_MEM_PCI_HOLE memslots:
- Reads from all pages return '0xff'
- Writes to all pages cause KVM_EXIT_MMIO
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/Makefile | 1 +
.../testing/selftests/kvm/include/kvm_util.h | 1 +
tools/testing
No functional change intended. Slot flags will need to be analyzed
prior to try_async_pf() when KVM_MEM_PCI_HOLE is implemented.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 14 --
arch/x86/kvm/mmu/paging_tmpl.h | 7 +--
2 files changed, 13 insertions
emory. We can always take a look at possible
optimizations later.
Vitaly Kuznetsov (3):
KVM: x86: move kvm_vcpu_gfn_to_memslot() out of try_async_pf()
KVM: x86: introduce KVM_MEM_PCI_HOLE memory
KVM: selftests: add KVM_MEM_PCI_HOLE test
Documentation/virt/kvm/api.rst| 19 +
to the already existing KVM_MEM_READONLY, VMM doesn't need to allocate
real memory and stuff it with '0xff'.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/api.rst | 19 +++-
arch/x86/include/uapi/asm/kvm.h | 1 +
arch/x86/kvm/mmu/mmu.c
Alexander Graf writes:
> MSRs are weird. Some of them are normal control registers, such as EFER.
> Some however are registers that really are model specific, not very
> interesting to virtualization workloads, and not performance critical.
> Others again are really just windows into package
__gfn_to_pfn_memslot() and
>> exit to user space and qemu reports error, "error: kvm run failed Bad
>> address".
>
> Hi Vitaly,
>
> A gentle reminder. How does this patch look now?
>
Sorry, I even reviewd it but never replied. It looks good to me!
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
Andy Shevchenko writes:
> On Wed, Jul 22, 2020 at 12:47 PM Vitaly Kuznetsov wrote:
>> Julia Suvorova writes:
>
>> > Scanning for PCI devices at boot takes a long time for KVM guests. It
>> > can be reduced if KVM will handle all configuration space accesses
Sean Christopherson writes:
> Use the shadow_root_level from the current MMU as the root level for the
> PGD, i.e. for VMX's EPTP. This eliminates the weird dependency between
> VMX and the MMU where both must independently calculate the same root
> level for things to work correctly.
kvm_calc_shadow_mmu_root_page_role(vcpu, false);
> + union kvm_mmu_role new_role = kvm_calc_shadow_npt_root_page_role(vcpu);
>
> - new_role.base.level = vcpu->arch.tdp_level;
> context->shadow_root_level = new_role.base.level;
>
> __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false);
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
lized before __kvm_mmu_new_pgd(), which
> consumes the level when attempting a fast PGD switch.
>
> Cc: Vitaly Kuznetsov
> Fixes: 9fa72119b24db ("kvm: x86: Introduce kvm_mmu_calc_root_page_role()")
> Fixes: a506fdd223426 ("KVM: nSVM: implement nested_svm_load_cr3() and use i
Julia Suvorova writes:
> Scanning for PCI devices at boot takes a long time for KVM guests. It
> can be reduced if KVM will handle all configuration space accesses for
> non-existent devices without going to userspace [1]. But for this to
> work, all accesses must go through MMCONFIG.
> This
Sean Christopherson writes:
> On Mon, Jul 20, 2020 at 06:52:15PM +0200, Vitaly Kuznetsov wrote:
>> Sean Christopherson writes:
>> > +TRACE_EVENT_KVM_EXIT(kvm_nested_vmexit);
>> >
>> > /*
>> > * Tracepoint for #VMEXIT reinjected to the guest
Wanpeng Li writes:
> From: Wanpeng Li
>
> Only bits 0, 1, and 3 are settable, others are reserved for APIC_TDCR.
> Let's record the settable value in the virtual apic page.
>
> Signed-off-by: Wanpeng Li
> ---
> arch/x86/kvm/lapic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
Wanpeng Li writes:
> From: Wanpeng Li
>
> Prevent setting the tscdeadline timer if the lapic is hw disabled.
>
> Signed-off-by: Wanpeng Li
> ---
> arch/x86/kvm/lapic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index
kvm_lapic_reg_write(apic, APIC_ICR, 0x4 | (val &
> 0xff));
> + kvm_lapic_reg_write(apic, APIC_ICR,
> + APIC_DEST_SELF | (val &
> APIC_VECTOR_MASK));
> } else
>
Sean Christopherson writes:
> Use the newly introduced TRACE_EVENT_KVM_EXIT to define the guts of
> kvm_nested_vmexit so that it captures and prints the same information as
> with kvm_exit. This has the bonus side effect of fixing the interrupt
> info and error code printing for the case where
Vivek Goyal writes:
> Page fault error handling behavior in kvm seems little inconsistent when
> page fault reports error. If we are doing fault synchronously
> then we capture error (-EFAULT) returned by __gfn_to_pfn_memslot() and
> exit to user space and qemu reports error, "error: kvm run
Sean Christopherson writes:
> On Tue, Jul 14, 2020 at 02:00:04PM +0200, Vitaly Kuznetsov wrote:
>> Sean Christopherson writes:
>> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> > index 95ef629228691..5f526d94c33f3 100644
>> > --- a/arch/x86/kvm
Sean Christopherson writes:
> Don't attempt to load PDPTRs if EFER.LME=1, i.e. if 64-bit mode is
> enabled. A recent change to reload the PDTPRs when CR0.CD or CR0.NW is
> toggled botched the EFER.LME handling and sends KVM down the PDTPR path
> when is_paging() is true, i.e. when the guest
Sean Christopherson writes:
> On Fri, Jul 10, 2020 at 04:11:53PM +0200, Vitaly Kuznetsov wrote:
>> As a preparatory change for implementing nested specifig PGD switch for
>
> s/specifig/specific
>
>> nSVM (following nVMX' nested_vmx_load_cr3()) instead of relying on
>
at legacy userspaces
using old layout will be passing uninitialized bytes which will slip into
what is now known as 'flags'.
Suggested-by: Sean Christopherson
Fixes: 850448f35aaf ("KVM: nVMX: Fix VMX preemption timer migration")
Fixes: 83d31e5271ac ("KVM: nVMX: fixes for preemption time
Sean Christopherson writes:
> On Mon, Jul 13, 2020 at 10:28:24AM +0200, Vitaly Kuznetsov wrote:
>> Holes in structs which are userspace ABI are undesireable.
>>
>> Fixes: 83d31e5271ac ("KVM: nVMX: fixes for preemption timer migration")
>
Holes in structs which are userspace ABI are undesireable.
Fixes: 83d31e5271ac ("KVM: nVMX: fixes for preemption timer migration")
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/api.rst | 2 +-
arch/x86/include/uapi/asm/kvm.h | 2 +-
2 files changed, 2 insertions(+), 2
just allow the host to read and write zero to the MSR.
Fixes: 27461da31089 ("KVM: x86/pmu: Support full width counting")
Suggested-by: Jim Mattson
Suggested-by: Paolo Bonzini
Signed-off-by: Vitaly Kuznetsov
---
- This is a succesor of "[PATCH v2] KVM: SVM: emulate
MSR_IA32_PERF_CAPABIL
Paolo Bonzini writes:
> On 18/06/20 14:54, Vitaly Kuznetsov wrote:
>> Paolo Bonzini writes:
>>
>>> On 18/06/20 13:13, Vitaly Kuznetsov wrote:
>>>> state_test/smm_test selftests are failing on AMD with:
>>>> "Unexpected
As a preparatory change for implementing nested specifig PGD switch for
nSVM (following nVMX' nested_vmx_load_cr3()) instead of relying on
kvm_set_cr3() introduce nested_svm_load_cr3().
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 21
WARN_ON_ONCE(svm->nested.nested_run_pending) in nested_svm_vmexit()
will fire if nested_run_pending remains '1' but it doesn't really
need to, we are already failing and not going to run nested guest.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 2 ++
1 file changed
don't
do kvm_set_cr3() but we're about to switch to nested_svm_load_cr3().
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm
_state() and the later is used to restore from
'partial' switch to L2, it always uses kvm_mmu_reset_context().
nSVM doesn't have this yet. Also, nested_svm_vmexit()'s return value
is almost always ignored nowadays.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 15 ++-
cpu->arch.mmu pointer.
Based on a patch by Vitaly Kuznetsov .
Signed-off-by: Paolo Bonzini
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
: 7c390d350f8b ("kvm: x86: Add fast CR3 switch code path")
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c| 2 ++
arch/x86/kvm/svm/nested.c | 38 +-
2 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x
-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu.h| 3 ++-
arch/x86/kvm/mmu/mmu.c| 31 ---
arch/x86/kvm/svm/nested.c | 3 ++-
3 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 444bb9c54548..94378ef1df54
Some operations in enter_svm_guest_mode() may fail, e.g. currently
we suppress kvm_set_cr3() return value. Prepare the code to proparate
errors.
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 26 --
arch/x86/kvm/svm/svm.c
d by running nested Hyper-V
on KVM. The series doesn't seem to introduce any new issues.
Paolo Bonzini (1):
KVM: MMU: stop dereferencing vcpu->arch.mmu to get the context for MMU
init
Vitaly Kuznetsov (8):
KVM: nSVM: split kvm_init_shadow_npt_mmu() from kvm_init_shadow_mmu()
KVM: nSVM: res
a non-existent GFN is written to CR3
doesn't seem to mach architectural behavior. Drop the check.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 13ec3c30eda2
Paolo Bonzini writes:
> On 10/07/20 13:40, Vitaly Kuznetsov wrote:
>> Hm, it seems I missed svm_set_nested_state() path
>> completely. Surprisingly, state_test didn't fail)
>>
>> I'm struggling a bit to understand why we don't have kvm_set_cr3() on
>
Paolo Bonzini writes:
> On 09/07/20 19:57, Paolo Bonzini wrote:
>> On 09/07/20 16:53, Vitaly Kuznetsov wrote:
>>> + if (nested_npt_enabled(svm))
>>> + nested_svm_init_mmu_context(>vcpu);
>>> +
>>> ret =
-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 35 +++
1 file changed, 31 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
index 5e6c988a4e6b..d0fd63e8d835 100644
--- a/arch/x86/kvm/svm/nested.c
+++ b/arch/x86/kvm
Some operations in enter_svm_guest_mode() may fail, e.g. currently
we suppress kvm_set_cr3() return value. Prepare the code to proparate
errors.
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 26 --
arch/x86/kvm/svm/svm.c
_state() and the later is used to restore from
'partial' switch to L2, it always uses kvm_mmu_reset_context().
nSVM doesn't have this yet. Also, nested_svm_vmexit()'s return value
is almost always ignored nowadays.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 15 ++-
the job.
Note: the current implementation is sub-optimal as we always do TLB
flush/MMU sync but this is still an improvement as we at least stop doing
kvm_mmu_reset_context().
Fixes: 7c390d350f8b ("kvm: x86: Add fast CR3 switch code path")
Signed-off-by: Vitaly Kuznetsov
---
arch/x
WARN_ON_ONCE(svm->nested.nested_run_pending) in nested_svm_vmexit()
will fire if nested_run_pending remains '1' but it doesn't really
need to, we are already failing and not going to run nested guest.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 2 ++
1 file changed
a non-existent GFN is written to CR3
doesn't seem to mach architectural behavior. Drop the check.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 1c3a231f825b
-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu.h| 3 ++-
arch/x86/kvm/mmu/mmu.c| 31 ---
arch/x86/kvm/svm/nested.c | 3 ++-
3 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 444bb9c54548..94378ef1df54
don't
do kvm_set_cr3() but we're about to switch to nested_svm_load_cr3().
No functional change intended.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/svm/nested.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm
Now as kvm_init_shadow_npt_mmu() is separated from kvm_init_shadow_mmu()
we always know the MMU context we need to use so there is no need to
dereference vcpu->arch.mmu pointer.
Suggested-by: Paolo Bonzini
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 15 +++
1 f
making some progress.
Tested with kvm selftests/kvm-unit-tests and by running nested Hyper-V
on KVM. The series doesn't seem to introduce any new issues.
Vitaly Kuznetsov (9):
KVM: nSVM: split kvm_init_shadow_npt_mmu() from kvm_init_shadow_mmu()
KVM: nSVM: stop dereferencing vcpu->arch
Paolo Bonzini writes:
> On 08/07/20 11:36, Vitaly Kuznetsov wrote:
>> Undesired triple fault gets injected to L1 guest on SVM when L2 is
>> launched with certain CR3 values. #TF is raised by mmu_check_root()
>> check in fast_pgd_switch() and the root cause is that when
>&
kvm_vcpu_is_visible_gfn() and use it from mmu_check_root().
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 2 +-
include/linux/kvm_host.h | 1 +
virt/kvm/kvm_main.c | 8
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm
pgd_switch().
Vitaly Kuznetsov (3):
KVM: nSVM: split kvm_init_shadow_npt_mmu() from kvm_init_shadow_mmu()
KVM: nSVM: properly call kvm_mmu_new_pgd() upon switching to guest
KVM: x86: drop superfluous mmu_check_root() from fast_pgd_switch()
arch/x86/include/asm/kvm_host.h | 7 ++-
arch/x86
-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu.h| 3 ++-
arch/x86/kvm/mmu/mmu.c| 31 ---
arch/x86/kvm/svm/nested.c | 3 ++-
3 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 444bb9c54548..94378ef1df54
a non-existent GFN is written to CR3
doesn't seem to mach architectural behavior. Drop the check.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index ebf0cb3f1ce0
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/include/asm/kvm_host.h | 7 ++-
arch/x86/kvm/mmu/mmu.c | 2 ++
arch/x86/kvm/svm/nested.c | 2 +-
arch/x86/kvm/x86.c | 8 +---
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h
Xiaoyao Li writes:
> On 7/1/2020 8:44 PM, Vitaly Kuznetsov wrote:
>> Xiaoyao Li writes:
>>
>>> On 7/1/2020 5:04 PM, Vitaly Kuznetsov wrote:
>>>> Chenyi Qiang writes:
>>> [...]
>>>>>static const int kvm_vmx_max_exit_handlers =
Xiaoyao Li writes:
> On 7/1/2020 5:04 PM, Vitaly Kuznetsov wrote:
>> Chenyi Qiang writes:
> [...]
>>> static const int kvm_vmx_max_exit_handlers =
>>> @@ -6830,6 +6838,13 @@ static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)
>>> if (u
Chenyi Qiang writes:
> Virtual Machine can exploit bus locks to degrade the performance of
> system. Bus lock can be caused by split locked access to writeback(WB)
> memory or by using locks on uncacheable(UC) memory. The bus lock is
> typically >1000 cycles slower than an atomic operation
Vivek Goyal writes:
> On Tue, Jun 30, 2020 at 05:43:54PM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> > On Tue, Jun 30, 2020 at 05:13:54PM +0200, Vitaly Kuznetsov wrote:
>> >>
>> >> > - If you retry in kernel, we will change t
Junaid Shahid writes:
> On 6/30/20 3:07 AM, Vitaly Kuznetsov wrote:
>> Undesired triple fault gets injected to L1 guest on SVM when L2 is
>> launched with certain CR3 values. It seems the mmu_check_root()
>> check in fast_pgd_switch() is wrong: first of all we don't know
>
Sean Christopherson writes:
> On Tue, Jun 30, 2020 at 05:43:54PM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> > On Tue, Jun 30, 2020 at 05:13:54PM +0200, Vitaly Kuznetsov wrote:
>> >>
>> >> > - If you retry in kernel, we wi
Vivek Goyal writes:
> On Tue, Jun 30, 2020 at 05:13:54PM +0200, Vitaly Kuznetsov wrote:
>>
>> > - If you retry in kernel, we will change the context completely that
>> > who was trying to access the gfn in question. We want to retain
>> > the rea
Vivek Goyal writes:
> On Tue, Jun 30, 2020 at 03:24:43PM +0200, Vitaly Kuznetsov wrote:
>>
>> It's probably me who's missing something important here :-) but I think
>> you describe how it *should* work as I'm not seeing how we can leave the
>> loop in kvm_async_pf
Vivek Goyal writes:
> On Mon, Jun 29, 2020 at 10:56:25PM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> > On Fri, Jun 26, 2020 at 11:25:19AM +0200, Vitaly Kuznetsov wrote:
>> >
>> > [..]
>> >> > diff --git a/arch
o mach architecture behavior.
Fixes: 7c390d350f8b ("kvm: x86: Add fast CR3 switch code path")
Signed-off-by: Vitaly Kuznetsov
---
- The patch fixes the immediate issue and doesn't seem to break any
tests even with shadow PT but I'm not sure I properly understood
why the check was th
Vivek Goyal writes:
> On Fri, Jun 26, 2020 at 11:25:19AM +0200, Vitaly Kuznetsov wrote:
>
> [..]
>> > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
>> > index 76817d13c86e..a882a6a9f7a7 100644
>> > --- a/arch/x86/kvm/mmu/mmu.c
>> >
Wanpeng Li writes:
> From: Wanpeng Li
>
> Syzbot reported that:
>
> CPU: 1 PID: 6780 Comm: syz-executor153 Not tainted 5.7.0-syzkaller #0
> Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS
> Google 01/01/2011
> RIP: 0010:__apic_accept_irq+0x46/0xb80
> Call Trace:
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