Thomas Gleixner writes:
> Vitaly Kuznetsov writes:
>> Vitaly Kuznetsov writes:
>>
>>> This series is a successor of "[PATCH] x86/idt: Keep spurious entries unset
>>> in system_vectors".
>>>
>>> The original issue I tried to address w
Vivek Goyal writes:
> On Wed, May 13, 2020 at 04:23:55PM +0200, Vitaly Kuznetsov wrote:
>
> [..]
>> >> Also,
>> >> kdump kernel may not even support APF so it will get very confused when
>> >> APF events get delivered.
>> >
>> >
The following commit has been merged into the x86/entry branch of tip:
Commit-ID: 4c74d51dab3dd655062a4740af150c1835e19cff
Gitweb:
https://git.kernel.org/tip/4c74d51dab3dd655062a4740af150c1835e19cff
Author:Vitaly Kuznetsov
AuthorDate:Tue, 28 Apr 2020 11:38:23 +02:00
The following commit has been merged into the x86/entry branch of tip:
Commit-ID: fad1940a6a856f59b073e8650e02052ce531154c
Gitweb:
https://git.kernel.org/tip/fad1940a6a856f59b073e8650e02052ce531154c
Author:Vitaly Kuznetsov
AuthorDate:Tue, 28 Apr 2020 11:38:22 +02:00
The following commit has been merged into the x86/entry branch of tip:
Commit-ID: 82ff351052bcc4bf49dc966960f563d25f54d22b
Gitweb:
https://git.kernel.org/tip/82ff351052bcc4bf49dc966960f563d25f54d22b
Author:Vitaly Kuznetsov
AuthorDate:Tue, 28 Apr 2020 11:38:24 +02:00
Vivek Goyal writes:
> On Wed, May 13, 2020 at 11:03:48AM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> > On Tue, May 12, 2020 at 05:50:53PM +0200, Vitaly Kuznetsov wrote:
>> >> Vivek Goyal writes:
>> >>
>> >> >
>
Vitaly Kuznetsov writes:
> This series is a successor of "[PATCH] x86/idt: Keep spurious entries unset
> in system_vectors".
>
> The original issue I tried to address was that /proc/interrupts output
> was always containing all possible system vectors, including
Sean Christopherson writes:
>
> Why bother preserving backwards compatibility? AIUI, both KVM and guest
> will support async #PF iff interrupt delivery is enabled. Why not make
> the interrupt delivery approach KVM_ASYNC_PF_V2 and completely redefine the
> ABI? E.g. to make it compatible with
Vivek Goyal writes:
> On Tue, May 12, 2020 at 05:50:53PM +0200, Vitaly Kuznetsov wrote:
>> Vivek Goyal writes:
>>
>> >
>> > So if we are using a common structure "kvm_vcpu_pv_apf_data" to deliver
>> > type1 and type2 events, to me it makes se
he feature gets enabled automatically.
Note, guest kernel needs to be updated too.
--
Vitaly
>From 24d78c031f5348764f880698b01b574ca8748ea4 Mon Sep 17 00:00:00 2001
From: Vitaly Kuznetsov
Date: Tue, 12 May 2020 18:03:53 +0200
Subject: [PATCH 1/2] linux headers: KVM_FEATURE_ASYNC_PF_INT
ons upon hibernation we
need to restore them on resume. Check if hv_reenlightenment_cb was
previously set and restore from hv_resume().
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/hyperv/hv_init.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/
Vivek Goyal writes:
> On Mon, May 11, 2020 at 06:47:48PM +0200, Vitaly Kuznetsov wrote:
>> Concerns were expressed around APF delivery via synthetic #PF exception as
>> in some cases such delivery may collide with real page fault. For type 2
>> (page ready) notifications
Vivek Goyal writes:
> On Mon, May 11, 2020 at 06:47:46PM +0200, Vitaly Kuznetsov wrote:
>> Currently, APF mechanism relies on the #PF abuse where the token is being
>> passed through CR2. If we switch to using interrupts to deliver page-ready
>> notifications we need a
uce
kvm_arch_async_page_present_queued() and KVM_REQ_APF_READY to do the job.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/msr.rst | 18 +++---
arch/s390/include/asm/kvm_host.h | 2 ++
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/include/uapi/
Introduce new capability to indicate that KVM supports interrupt based
delivery of type 2 APF events (page ready notifications). This includes
support for both MSR_KVM_ASYNC_PF_INT and MSR_KVM_ASYNC_PF_ACK.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/cpuid.rst | 6
KVM now supports using interrupt for type 2 APF event delivery (page ready
notifications) and legacy mechanism was deprecated. Switch KVM guests to
the new one.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/entry/entry_32.S | 5
arch/x86/entry/entry_64.S | 5
arch
one.
One notable difference between the two mechanisms is that interrupt may not
get handled immediately so whenever we would like to deliver next event
(regardless of its type) we must be sure the guest had read and cleared
previous event in the slot.
Signed-off-by: Vitaly Kuznetsov
else this means
that the underlying hypervisor is misbehaving. Leave WARN_ON_ONCE()
to catch that.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/mmu/mmu.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index
We already have kvm_write_guest_offset_cached(), introduce read analogue.
Signed-off-by: Vitaly Kuznetsov
---
include/linux/kvm_host.h | 3 +++
virt/kvm/kvm_main.c | 19 ++-
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/include/linux/kvm_host.h b/include
MSR_KVM_ASYNC_PF2 -> MSR_KVM_ASYNC_PF_INT [Peter Xu]
- Drop 'enabled' field from MSR_KVM_ASYNC_PF_INT [Peter Xu]
- Other minor changes supporting the above.
Vitaly Kuznetsov (8):
Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and
"Page Ready" exce
y, we may erroneously drop two
valid events.
Revert the commit.
Reviewed-by: Gavin Shan
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/x86.c | 23 +--
1 file changed, 1 insertion(+), 22 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c5835f9cb9ad.
notifications.
The newly introduced apf_put_user_ready() temporary puts both reason
and token information, this will be changed to put token only when we
switch to interrupt based notifications.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/include/uapi/asm/kvm_para.h | 3 ++-
arch/x86/kvm/x86.c
Vivek Goyal writes:
> On Wed, Apr 29, 2020 at 11:36:29AM +0200, Vitaly Kuznetsov wrote:
>> Commit 9a6e7c39810e (""KVM: async_pf: Fix #DF due to inject "Page not
>> Present" and "Page Ready" exceptions simultaneously") added a protection
>&g
Gavin Shan writes:
> Hi Vitaly,
>
> On 4/29/20 7:36 PM, Vitaly Kuznetsov wrote:
>> If two page ready notifications happen back to back the second one is not
>> delivered and the only mechanism we currently have is
>> kvm_check_async_pf_completion() check in
Gavin Shan writes:
> Hi Vitaly,
>
> On 4/29/20 7:36 PM, Vitaly Kuznetsov wrote:
>> Currently, APF mechanism relies on the #PF abuse where the token is being
>> passed through CR2. If we switch to using interrupts to deliver page-ready
>> notifications we need a dif
Peter Xu writes:
> On Thu, Apr 30, 2020 at 10:31:32AM +0200, Vitaly Kuznetsov wrote:
>> as we need to write to two MSRs to configure the new mechanism ordering
>> becomes important. If the guest writes to ASYNC_PF_EN first to establish
>> the shared memory stucture the i
Wanpeng Li writes:
> From: Wanpeng Li
>
> We can't observe benefit from single target IPI fastpath when APICv is
> disabled, let's just enable IPI and Timer fastpath when APICv is enabled
> for now.
>
> Tested-by: Haiwei Li
> Cc: Haiwei Li
> Signed-off-by: Wanpeng Li
> ---
>
read32(IDT_VECTORING_INFO_FIELD);
>
> vmx_recover_nmi_blocking(vmx);
> vmx_complete_interrupts(vmx);
>
> + exit_fastpath = vmx_exit_handlers_fastpath(vcpu);
> +
> return exit_fastpath;
> }
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
Paolo Bonzini writes:
> On 30/04/20 10:40, Vitaly Kuznetsov wrote:
>>> I think in that case
>>> kvm_check_async_pf_completion will refuse to make progress.
>>> You need to make this bit stateful (e.g. 1 = async PF in progress, 0 =
>>> not in p
Paolo Bonzini writes:
> On 29/04/20 11:36, Vitaly Kuznetsov wrote:
>> +case MSR_KVM_ASYNC_PF_ACK:
>> +if (data & 0x1)
>> +kvm_check_async_pf_completion(vcpu);
>> +break;
>
> Does this work if interrupts ar
Peter Xu writes:
> Hi, Vitaly,
>
> On Wed, Apr 29, 2020 at 11:36:31AM +0200, Vitaly Kuznetsov wrote:
>> +Type 1 page (page missing) events are currently always delivered as
>> +synthetic #PF exception. Type 2 (page ready) are either delivered
>> +b
Paolo Bonzini writes:
> On 29/04/20 14:44, Vitaly Kuznetsov wrote:
>>>> + token = __this_cpu_read(apf_reason.token);
>>>> + /*
>>>> + * Make sure we read 'token' before we reset
>>>>
t_state() and
> vmx_set_nested_state() to call out that they're ignored, set exit_reason
> on demand on nested VM-Enter failure, and add a comment in
> nested_vmx_load_msr() to call out that returning 'i + 1' can't wrap.
>
> No functional change intended.
>
> Reported-by: Vit
Paolo Bonzini writes:
> On 29/04/20 11:36, Vitaly Kuznetsov wrote:
>> +
>> +if (__this_cpu_read(apf_reason.enabled)) {
>> +reason = __this_cpu_read(apf_reason.reason);
>> +if (reason == KVM_PV_REASON_PAGE_READY) {
>> +
Paolo Bonzini writes:
> On 29/04/20 11:36, Vitaly Kuznetsov wrote:
>> +
>> +Type 1 page (page missing) events are currently always delivered as
>> +synthetic #PF exception. Type 2 (page ready) are either delivered
>> +by #PF exception (when bit 3 of M
Tianjia Zhang writes:
> In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu'
> structure. For historical reasons, many kvm-related function parameters
> retain the 'kvm_run' and 'kvm_vcpu' parameters at the same time. This
> patch does a unified cleanup of these remaining
_hv_nested.c
> +++ b/arch/powerpc/kvm/book3s_hv_nested.c
> @@ -290,8 +290,7 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu)
> r = RESUME_HOST;
> break;
> }
> - r = kvmhv_run_single_vcpu(vcpu->arch.kvm_run, vcpu, hdec_exp,
> - lpcr);
> + r = kvmhv_run_single_vcpu(vcpu->run, vcpu, hdec_exp, lpcr);
> } while (is_kvmppc_resume_guest(r));
>
> /* save L2 state for return */
FWIW,
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
kvm/arm/mmu.c
> @@ -1892,7 +1892,6 @@ static void handle_access_fault(struct kvm_vcpu *vcpu,
> phys_addr_t fault_ipa)
> /**
> * kvm_handle_guest_abort - handles all 2nd stage aborts
> * @vcpu:the VCPU pointer
> - * @run: the kvm_run structure
> *
> * Any abort that gets to the host is almost guaranteed to be caused by a
> * missing second stage translation table entry, which can mean that either
> the
> @@ -1901,7 +1900,7 @@ static void handle_access_fault(struct kvm_vcpu *vcpu,
> phys_addr_t fault_ipa)
> * space. The distinction is based on the IPA causing the fault and whether
> this
> * memory region has been registered as standard RAM by user space.
> */
> -int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
> +int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)
> {
> unsigned long fault_status;
> phys_addr_t fault_ipa;
> @@ -1980,7 +1979,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu,
> struct kvm_run *run)
>* of the page size.
>*/
> fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
> - ret = io_mem_abort(vcpu, run, fault_ipa);
> + ret = io_mem_abort(vcpu, fault_ipa);
> goto out_unlock;
> }
Haven't tried to compile this but the change itself looks obviously
correct, so
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
regs(vcpu, kvm_run);
> + sync_regs(vcpu);
> enable_cpu_timer_accounting(vcpu);
>
> might_fault();
> @@ -4393,7 +4400,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> }
>
> disable_cpu_timer_accounting(vcpu);
> - store_regs(vcpu, kvm_run);
> + store_regs(vcpu);
>
> kvm_sigset_deactivate(vcpu);
Haven't tried to compile this but the change itself looks obviously
correct, so
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
n theory, we may erroneously drop two
valid events.
Revert the commit. apf_get_user() stays as we will need it for the new
'page ready notifications via interrupt' mechanism.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/x86.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
KVM now supports using interrupt for type 2 APF event delivery (page ready
notifications). Switch KVM guests to using it when the feature is present.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/entry/entry_32.S | 5
arch/x86/entry/entry_64.S | 5
arch/x86/include
.
This RFC does the later.
Please let me know what you think about the idea in general and the
selected approach in particular.
Vitaly Kuznetsov (6):
Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and
"Page Ready" exceptions simultaneously&q
-by: Vitaly Kuznetsov
---
arch/x86/include/uapi/asm/kvm_para.h | 3 ++-
arch/x86/kvm/x86.c | 10 ++
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/uapi/asm/kvm_para.h
b/arch/x86/include/uapi/asm/kvm_para.h
index 2a8e0b6b9805..df2ba34037a2 100644
between the two mechanisms is that interrupt may not
get handled immediately so whenever we would like to deliver next event
(regardless of its type) we must be sure the guest had read and cleared
previous event in the slot.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/msr.rst
Introduce new capability to indicate that KVM supports interrupt based
delivery of type 2 APF events (page ready notifications). This includes
support for both MSR_KVM_ASYNC_PF2 and MSR_KVM_ASYNC_PF_ACK.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/cpuid.rst | 6 ++
arch
and host should check its notification
queue. Mandate using it for interrupt based type 2 APF event delivery.
Signed-off-by: Vitaly Kuznetsov
---
Documentation/virt/kvm/msr.rst | 16 +++-
arch/x86/include/uapi/asm/kvm_para.h | 1 +
arch/x86/kvm/x86.c | 9
.c
> @@ -9358,8 +9358,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
> }
> fx_init(vcpu);
>
> - vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
> -
> vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
>
> vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kernel/idt.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index 87ef69a72c52..f95c3be00e5a 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -51,6
s' on bare metal). Thomas
suggested to expand this cosmetic change to making alloc_intr_gate()
__init.
Vitaly Kuznetsov (3):
x86/xen: Split HVM vector callback setup and interrupt gate allocation
x86/idt: Annotate alloc_intr_gate() with __init
x86/idt: Keep spurious entries unset in system_vect
resume from xen_hvm_post_suspend(). alloc_intr_gate() only
needs to be called once.
Suggested-by: Thomas Gleixner
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/xen/suspend_hvm.c | 2 +-
arch/x86/xen/xen-ops.h | 2 +-
drivers/xen/events/events_base.c | 28
lled after init, it is
possible to leave unused entries in 'system_vectors' unset to fix the
issues.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kernel/idt.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index f9
Zhenzhong Duan writes:
> Hi Vitaly,
>
> On 2019/10/22 19:36, Vitaly Kuznetsov wrote:
>
>> Zhenzhong Duan writes:
>>
> ...snip
>
>>> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
>>> index 249f14a..3945aa5 100644
>>> --
quot; to disable
> PV spinlocks for KVM guest.
>
> The new 'nopvspin' parameter will also replace Xen and Hyper-V specific
> parameters in future patches.
>
> Define variable nopvsin as global because it will be used in future
> patches as above.
>
> Signed-off-by: Zhen
ng Duan
> Cc: Jonathan Corbet
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: "H. Peter Anvin"
> Cc: Paolo Bonzini
> Cc: Radim Krcmar
> Cc: Sean Christopherson
> Cc: Vitaly Kuznetsov
> Cc: Wanpeng Li
> Cc: Jim Mattson
> Cc
linmiaohe writes:
> Vitaly Kuznetsov writes:
>
>>> Guest physical APIC ID may not equal to vcpu->vcpu_id in some case.
>>> We may set the wrong physical id in avic_handle_ldr_update as we
>>> always use vcpu->vcpu_id.
>
> Hi, Vitaly, thanks for yo
Paolo Bonzini writes:
> After resetting the vCPU, the kvmclock MSR keeps the previous value but it is
> not enabled. This can be confusing, so fix it.
>
> Signed-off-by: Paolo Bonzini
> ---
> arch/x86/kvm/x86.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git
Miaohe Lin writes:
> Guest physical APIC ID may not equal to vcpu->vcpu_id in some case.
> We may set the wrong physical id in avic_handle_ldr_update as we
> always use vcpu->vcpu_id.
>
> Signed-off-by: Miaohe Lin
> ---
> arch/x86/kvm/svm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1
Paolo Bonzini writes:
> On 15/10/19 12:53, Vitaly Kuznetsov wrote:
>> A very theoretical question: why do we have 'struct vcpu' embedded in
>> vcpu_vmx/vcpu_svm and not the other way around (e.g. in a union)? That
>> would've allowed us to allocate memory in comm
Sean Christopherson writes:
> On Mon, Oct 14, 2019 at 06:58:49PM +0200, Vitaly Kuznetsov wrote:
>> Xiaoyao Li writes:
>>
>> > They are duplicated codes to create vcpu.arch.{user,guest}_fpu in VMX
>> > and SVM. Make them common functions.
>> >
>&g
Xiaoyao Li writes:
> They are duplicated codes to create vcpu.arch.{user,guest}_fpu in VMX
> and SVM. Make them common functions.
>
> No functional change intended.
Would it rather make sense to move this code to
kvm_arch_vcpu_create()/kvm_arch_vcpu_destroy() instead?
>
> Signed-off-by:
Zhenzhong Duan writes:
> On 2019/10/13 17:02, Vitaly Kuznetsov wrote:
>> Zhenzhong Duan writes:
> ...snip
>> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
>> index ef836d6..6e14bd4 100644
>> --- a/arch/x86/kernel/kvm.c
>> +++ b/arch/x8
the original simpler code
> again.
>
> The similar change for XEN is in commit 090d54bcbc54 ("Revert
> "x86/paravirt: Set up the virt_spin_lock_key after static keys get
> initialized"")
>
> Signed-off-by: Zhenzhong Duan
> Cc: Paolo Bonzini
> Cc: Radim
r
> Cc: Sean Christopherson
> Cc: Vitaly Kuznetsov
> Cc: Wanpeng Li
> Cc: Jim Mattson
> Cc: Joerg Roedel
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: "H. Peter Anvin"
> ---
> arch/x86/kernel/kvm.c | 30 -
ng Duan
> Cc: Jonathan Corbet
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: "H. Peter Anvin"
> Cc: Paolo Bonzini
> Cc: Radim Krcmar
> Cc: Sean Christopherson
> Cc: Vitaly Kuznetsov
> Cc: Wanpeng Li
> Cc: Jim Mattson
> Cc
Suleiman Souhlal writes:
> When kvm-hostclock is selected, and the host supports it, update our
> timekeeping parameters to be the same as the host.
> This lets us have our time synchronized with the host's,
> even in the presence of host NTP or suspend.
>
> Signed-off-by: Suleiman Souhlal
>
Suleiman Souhlal writes:
> This is used to synchronize time between host and guest.
> The guest can request the (guest) physical address it wants the
> data in through the MSR_KVM_TIMEKEEPER_EN MSR.
>
> It currently assumes the host timekeeper is "tsc".
>
> Signed-off-by: Suleiman Souhlal
> ---
+ if (!x2apic_enabled()) {
> + apic->read = hv_apic_read;
> + apic->write = hv_apic_write;
> + apic->icr_write = hv_apic_icr_write;
> + apic->icr_read = hv_apic_icr_read;
> + }
> }
> }
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
Paolo Bonzini writes:
> On 09/10/19 12:42, Vitaly Kuznetsov wrote:
>> Paolo Bonzini writes:
>>> There is no practical difference with Vitaly's patch. The first
>>> _vcpu_run has no pre-/post-conditions on the value of %rbx:
>>
>> I think what Sea
Paolo Bonzini writes:
> On 30/09/19 11:25, Vitaly Kuznetsov wrote:
>>> -enum kvm_reg_ex {
>>> VCPU_EXREG_PDPTR = NR_VCPU_REGS,
>> (Personally, I would've changed that to NR_VCPU_REGS + 1)
>>
>
> Why?
>
Just so every entry in the enum is dif
Paolo Bonzini writes:
> On 08/10/19 20:36, Sean Christopherson wrote:
>> On Tue, Oct 08, 2019 at 08:08:08PM +0200, Vitaly Kuznetsov wrote:
>>> Commit 204c91eff798a ("KVM: selftests: do not blindly clobber registers in
>>> guest asm") was intended to make tes
Andrea Parri writes:
> On Mon, Oct 07, 2019 at 05:41:10PM +, Dexuan Cui wrote:
>> > From: linux-hyperv-ow...@vger.kernel.org
>> > On Behalf Of Andrea Parri
>> > Sent: Monday, October 7, 2019 9:31 AM
>> >
>> > Hi all,
>> >
>> > The patchset:
>> >
>> > - simplifies/refactors the VMBus
vmx_dirty_log_test fails on AMD and this is no surprise as it is VMX
specific. Bail early when nested VMX is unsupported.
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/x86_64/vmx_dirty_log_test.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/testing/selftests/kvm
vmx_* tests require VMX and three of them implement the same check. Move it
to vmx library.
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/include/x86_64/vmx.h | 2 ++
tools/testing/selftests/kvm/lib/x86_64/vmx.c | 10 ++
.../selftests/kvm/x86_64
vmx_dirty_log_test fails on AMD and this is no surprise as it is VMX
specific. Consolidate checks from other VMX tests into a library routine
and add a check to skip the test when !VMX.
Vitaly Kuznetsov (3):
selftests: kvm: vmx_set_nested_state_test: don't check for VMX support
twice
vmx_set_nested_state_test() checks if VMX is supported twice: in the very
beginning (and skips the whole test if it's not) and before doing
test_vmx_nested_state(). One should be enough.
Signed-off-by: Vitaly Kuznetsov
---
.../selftests/kvm/x86_64/vmx_set_nested_state_test.c | 7
is still free to play games with registers even
when they have variables attaches.
Re-write guest code with 'asm volatile' by embedding ucall there and
making sure rbx is preserved.
Fixes: 204c91eff798a ("KVM: selftests: do not blindly clobber registers in
guest asm")
Signed-o
Michael Kelley writes:
> From: Vitaly Kuznetsov Sent: Friday, October 4, 2019
> 9:57 AM
>>
>> Andrea Parri writes:
>>
>> > If the hardware supports TSC scaling, Hyper-V will set bit 15 of the
>> > HV_PARTITION_PRIVILEGE_MASK in guest VMs with a com
.rst"
I can think of an 'ultimate' solution to open code ucall() in a single
asm block making sure the register we need is preserved but this looks
like an overkill.
Fixes: 204c91eff798a ("KVM: selftests: do not blindly clobber registers in
guest asm")
Signed-off-by: Vitaly Kuznetsov
Andrea Parri writes:
>> > @@ -244,21 +234,18 @@ int vmbus_connect(void)
>> > * version.
>> > */
>> >
>> > - version = VERSION_CURRENT;
>> > + for (i = 0; ; i++) {
>> > + version = vmbus_versions[i];
>> > + if (version == VERSION_INVAL)
>> > + goto
Andrea Parri writes:
> The technique used to get the next VMBus version seems increasisly
> clumsy as the number of VMBus versions increases. Performance is
> not a concern since this is only done once during system boot; it's
> just that we'll end up with more lines of code than is really
Because "Untracked files:" are annoying.
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/.gitignore | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/testing/selftests/kvm/.gitignore
b/tools/testing/selftests/kvm/.gitignore
index b35da375530a..409c1fa75
Andrea Parri writes:
> If the hardware supports TSC scaling, Hyper-V will set bit 15 of the
> HV_PARTITION_PRIVILEGE_MASK in guest VMs with a compatible Hyper-V
> configuration version. Bit 15 corresponds to the
> AccessTscInvariantControls privilege. If this privilege bit is set,
> guests can
Roman Kagan writes:
> Now that there's Hyper-V IOMMU driver, Linux can switch to x2apic mode
> when supported by the vcpus.
>
> However, the apic access functions for Hyper-V enlightened apic assume
> xapic mode only.
>
> As a result, Linux fails to bring up secondary cpus when run as a guest
>
Zhenzhong Duan writes:
> On 2019/9/30 23:41, Vitaly Kuznetsov wrote:
>> Zhenzhong Duan writes:
>>
>>> There are cases where a guest tries to switch spinlocks to bare metal
>>> behavior (e.g. by setting "xen_nopvspin" on XEN platform and
>>
Sean Christopherson writes:
> On Mon, Sep 30, 2019 at 10:57:17AM +0200, Vitaly Kuznetsov wrote:
>> Sean Christopherson writes:
>>
>> > Rework vmx_set_rflags() to avoid the extra code need to handle emulation
>> > of real mode and invalid state wh
Corbet
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: "H. Peter Anvin"
> Cc: Paolo Bonzini
> Cc: Radim Krcmar
> Cc: Sean Christopherson
> Cc: Vitaly Kuznetsov
> Cc: Wanpeng Li
> Cc: Jim Mattson
> Cc: Joerg Roedel
Sean Christopherson writes:
> On Mon, Sep 30, 2019 at 12:58:53PM +0200, Vitaly Kuznetsov wrote:
>> Sean Christopherson writes:
>>
>> > Handle caching CR3 (from VMX's VMCS) into struct kvm_vcpu via the common
>> > cache_reg() callback and drop the d
/* From paging/starting to nonpaging */
> exec_controls_setbit(vmx, CPU_BASED_CR3_LOAD_EXITING |
> @@ -7792,7 +7790,6 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init =
> {
> .get_cpl = vmx_get_cpl,
> .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
> .decache_cr0_guest_bits = vmx_decache_cr0_guest_bits,
> - .decache_cr3 = vmx_decache_cr3,
> .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
> .set_cr0 = vmx_set_cr0,
> .set_cr3 = vmx_set_cr3,
Reviewed (and Tested-On-Amd-By:): Vitaly Kuznetsov
--
Vitaly
Sean Christopherson writes:
> Add helpers to prettify code that tests and/or marks whether or not a
> register is available and/or dirty.
>
> Suggested-by: Vitaly Kuznetsov
> Signed-off-by: Sean Christopherson
> ---
> arch/x86/kvm/
XREG_PDPTR,
> (unsigned long *)>arch.regs_avail))
> - kvm_x86_ops->cache_reg(vcpu, (enum kvm_reg)VCPU_EXREG_PDPTR);
> + kvm_x86_ops->cache_reg(vcpu, VCPU_EXREG_PDPTR);
>
> return vcpu->arch.walk_mmu->pdptrs[index];
> }
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
_register_readl(struct kvm_vcpu *vcpu,
> -enum kvm_reg reg)
> +static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu, int
> reg)
> {
> unsigned long val = kvm_register_read(vcpu, reg);
>
> @@ -247,8 +246,7 @@ st
flags);
We're doing vmcs_writel() in both branches so it could've stayed here, right?
> -
> - if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM)
> - vmx->emulation_required = emulation_required(vcpu);
> }
>
> u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu)
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
p; X86_EFLAGS_VM)
> - to_vmx(vcpu)->emulation_required = emulation_required(vcpu);
> + if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM)
> + vmx->emulation_required = emulation_required(vcpu);
> }
>
> u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu)
Reviewed-by: Vitaly Kuznetsov
--
Vitaly
Christopherson
Signed-off-by: Vitaly Kuznetsov
---
tools/testing/selftests/kvm/lib/x86_64/processor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/testing/selftests/kvm/lib/x86_64/processor.c
b/tools/testing/selftests/kvm/lib/x86_64/processor.c
index c53dbc6bc568..6698cb741e10
s of GUEST_CR3 ownership in VMX is a nightmare, so fixing this
> purely within the context of nested VMX turned out to be the cleanest fix.
>
> Sean Christopherson (2):
> KVM: nVMX: Always write vmcs02.GUEST_CR3 during nested VM-Enter
> KVM: VMX: Skip GUEST_CR3 VMREAD+VMWRITE if the VMCS is up-to-date
>
Series:
Tested-by: Vitaly Kuznetsov
--
Vitaly
Sean Christopherson writes:
> Skip the VMWRITE to update GUEST_CR3 if CR3 is not available, i.e. has
> not been read from the VMCS since the last VM-Enter. If vcpu->arch.cr3
> is stale, kvm_read_cr3(vcpu) will refresh vcpu->arch.cr3 from the VMCS,
> meaning KVM will do a VMREAD and then VMWRITE
Dexuan Cui writes:
>> From: Vitaly Kuznetsov
>> Sent: Thursday, September 26, 2019 3:44 AM
>> > [...]
>> > +static int hv_suspend(void)
>> > +{
>> > + union hv_x64_msr_hypercall_contents hypercall_msr;
>> > +
>> > +
Dexuan Cui writes:
> This is needed for hibernation, e.g. when we resume the old kernel, we need
> to disable the "current" kernel's hypercall page and then resume the old
> kernel's.
>
> Signed-off-by: Dexuan Cui
> Reviewed-by: Michael Kelley
> ---
> arch/x86/hyperv/hv_init.c | 33
. evmcs->hv_vm_id can use 'unsigned long' instead of 'u64'.
Also, simplify the code a little bit.
Reported-by: kbuild test robot
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/vmx/vmx.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kvm/vmx/vmx.
Tianyu Lan writes:
> There is another warning in the report.
>
> arch/x86/kvm/vmx/vmx.c: In function 'hv_enable_direct_tlbflush':
> arch/x86/kvm/vmx/vmx.c:507:20: warning: cast from pointer to integer of
> different size [-Wpointer-to-int-cast]
> evmcs->hv_vm_id = (u64)vcpu->kvm;
>
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