Qualcomm's arm-smmu 500 implementation supports runtime pm
so enable the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Based on iommu/arm-smmu pm runtime support series [1]:
[PATCH v8 0/5] iommu/arm-smmu: Add runtime pm/sleep support
Tested on sdm845 with nec
Qualcomm's arm-smmu 500 implementation supports runtime pm
so enable the same.
Signed-off-by: Vivek Gautam
---
Based on iommu/arm-smmu pm runtime support series [1]:
[PATCH v8 0/5] iommu/arm-smmu: Add runtime pm/sleep support
Tested on sdm845 with necessary support to enable the smmu
Hi Tomasz,
On 3/5/2018 6:55 PM, Tomasz Figa wrote:
Hi Vivek,
On Fri, Mar 2, 2018 at 7:10 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
This series provides the support for turning on the arm-smmu's
clocks/power domains using runtime pm. This is done using the
recently intr
Hi Tomasz,
On 3/5/2018 6:55 PM, Tomasz Figa wrote:
Hi Vivek,
On Fri, Mar 2, 2018 at 7:10 PM, Vivek Gautam
wrote:
This series provides the support for turning on the arm-smmu's
clocks/power domains using runtime pm. This is done using the
recently introduced device links patches, which lets
;
Signed-off-by: Archit Taneja <arch...@codeaurora.org>
[vivek: Clock rework to request bulk of clocks]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 60 ++--
1 file changed, 58 insertions(+), 2
mmu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
iommu/arm-smmu: Destroy domain context in failure path
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,sm
of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 60 ++--
1 file changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index ffc152c36002..c8b16f53f597 100644
--- a/drivers/iommu
mmu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (2):
iommu/arm-smmu: Destroy domain context in failure path
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
.../devicetree/bindings/iommu/arm,sm
ed-off-by: Sricharan R <sricha...@codeaurora.org>
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 3d6a1875431f..b
-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 3d6a1875431f..bb1ea82c1003 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -217,6 +217,9
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Rob Herring <r...@k
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
---
.../devicetree/bindings/iommu/arm
If we fail after initializing domain_context, we should destroy
the context to free up resources.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
* New patch added in this series.
drivers/iommu/arm-smmu.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff
If we fail after initializing domain_context, we should destroy
the context to free up resources.
Signed-off-by: Vivek Gautam
---
* New patch added in this series.
drivers/iommu/arm-smmu.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b
aran R <sricha...@codeaurora.org>
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 96
1 file changed, 88 insertions(+), 8 deletions(-)
diff --git a/drivers/
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 96
1 file changed, 88 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c8b16f53f597..3d6a1875431f 100644
--- a/drivers/iommu
On Fri, Feb 23, 2018 at 9:10 PM, Jordan Crouse <jcro...@codeaurora.org> wrote:
> On Fri, Feb 23, 2018 at 04:06:39PM +0530, Vivek Gautam wrote:
>> On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse <jcro...@codeaurora.org>
>> wrote:
>> > On Wed, Feb 07, 2018 at
On Fri, Feb 23, 2018 at 9:10 PM, Jordan Crouse wrote:
> On Fri, Feb 23, 2018 at 04:06:39PM +0530, Vivek Gautam wrote:
>> On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse
>> wrote:
>> > On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote:
>> >> Fro
On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse <jcro...@codeaurora.org> wrote:
> On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote:
>> From: Sricharan R <sricha...@codeaurora.org>
>>
>> The smmu device probe/remove and add/remove master device callb
On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse wrote:
> On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote:
>> From: Sricharan R
>>
>> The smmu device probe/remove and add/remove master device callbacks
>> gets called when the smmu is not linked to
Hi,
On Thu, Feb 22, 2018 at 7:42 PM, Tomasz Figa wrote:
> On Thu, Feb 22, 2018 at 10:45 PM, Robin Murphy wrote:
>> [sorry, I had intended to reply sooner but clearly forgot]
>>
>>
>> On 16/02/18 00:13, Tomasz Figa wrote:
>>>
>>> On Fri, Feb 16, 2018 at
Hi,
On Thu, Feb 22, 2018 at 7:42 PM, Tomasz Figa wrote:
> On Thu, Feb 22, 2018 at 10:45 PM, Robin Murphy wrote:
>> [sorry, I had intended to reply sooner but clearly forgot]
>>
>>
>> On 16/02/18 00:13, Tomasz Figa wrote:
>>>
>>> On Fri, Feb 16, 2018 at 2:14 AM, Robin Murphy
>>> wrote:
On Wed, Feb 14, 2018 at 2:46 PM, Tomasz Figa <tf...@chromium.org> wrote:
Adding Jordan to this thread as well.
> On Wed, Feb 14, 2018 at 6:13 PM, Vivek Gautam
> <vivek.gau...@codeaurora.org> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 11:08 AM, To
On Wed, Feb 14, 2018 at 2:46 PM, Tomasz Figa wrote:
Adding Jordan to this thread as well.
> On Wed, Feb 14, 2018 at 6:13 PM, Vivek Gautam
> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa wrote:
>>> On Wed, Feb 14, 2018 at 1:17 PM,
On 1/24/2018 7:19 PM, Robin Murphy wrote:
On 24/01/18 10:35, Jeffy Chen wrote:
From: Tomasz Figa
Current code relies on master driver enabling necessary clocks before
IOMMU is accessed, however there are cases when the IOMMU should be
accessed while the master is not
On 1/24/2018 7:19 PM, Robin Murphy wrote:
On 24/01/18 10:35, Jeffy Chen wrote:
From: Tomasz Figa
Current code relies on master driver enabling necessary clocks before
IOMMU is accessed, however there are cases when the IOMMU should be
accessed while the master is not running yet, for
Hi Tomasz,
On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa <tf...@chromium.org> wrote:
> On Wed, Feb 14, 2018 at 1:17 PM, Vivek Gautam
> <vivek.gau...@codeaurora.org> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 8:31 AM, Tomasz Figa <tf...@chromium.org
Hi Tomasz,
On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa wrote:
> On Wed, Feb 14, 2018 at 1:17 PM, Vivek Gautam
> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 8:31 AM, Tomasz Figa wrote:
>>> On Wed, Feb 14, 2018 at 11:13 AM, Rob Clark wrote:
>>>
Hi Tomasz,
On Tue, Feb 13, 2018 at 1:54 PM, Tomasz Figa <tf...@chromium.org> wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> <vivek.gau...@codeaurora.org> wrote:
>> From: S
Hi Tomasz,
On Tue, Feb 13, 2018 at 1:54 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>> The smmu device probe/remove and add/re
lease see my comments inline.
>>>
>>> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
>>> <vivek.gau...@codeaurora.org> wrote:
>>>>
>>>> From: Sricharan R <sricha...@codeaurora.org>
>>>>
>>>> The smmu device
On Tue, Feb 13, 2018 at 7:22 PM, Tomasz Figa wrote:
> On Tue, Feb 13, 2018 at 9:57 PM, Robin Murphy wrote:
>> On 13/02/18 08:24, Tomasz Figa wrote:
>>>
>>> Hi Vivek,
>>>
>>> Thanks for the patch. Please see my comments inline.
>>>
>&
, 2018 at 3:03 AM, Rob Clark <robdcl...@gmail.com> wrote:
>>>> On Tue, Feb 13, 2018 at 4:10 AM, Tomasz Figa <tf...@chromium.org> wrote:
>>>>> Hi Vivek,
>>>>>
>>>>> Thanks for the patch. Please see my comments inline.
>>>>
, Tomasz Figa wrote:
>>>>> Hi Vivek,
>>>>>
>>>>> Thanks for the patch. Please see my comments inline.
>>>>>
>>>>> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
>>>>> wrote:
>>>>>> While
Hi Tomasz,
Please find my response inline below.
On Tue, Feb 13, 2018 at 1:33 PM, Tomasz Figa <tf...@chromium.org> wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see some comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> <vivek.gau...@cod
Hi Tomasz,
Please find my response inline below.
On Tue, Feb 13, 2018 at 1:33 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see some comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>
Hi Tomasz,
On Tue, Feb 13, 2018 at 2:01 PM, Tomasz Figa <tf...@chromium.org> wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
Thanks for reviewing the patch series.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> <vivek.gau...@cod
Hi Tomasz,
On Tue, Feb 13, 2018 at 2:01 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
Thanks for reviewing the patch series.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>>
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Rob Herring <r...@k
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
---
Changes in v8:
- Added the missing
ed-off-by: Sricharan R <sricha...@codeaurora.org>
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c024f69c1682..c
-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c024f69c1682..c7e924d553bd 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -215,6 +215,9
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Rob Herring <r...@k
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
---
.../devicetree/bindings/iommu/arm
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam
---
drivers/gpu/drm/msm
;
Signed-off-by: Archit Taneja <arch...@codeaurora.org>
[vivek: Clock rework to request bulk of clocks]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 56 ++--
1 file changed, 54 insertions(+), 2
aran R <sricha...@codeaurora.org>
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/ar
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 9e2f917e16c2..c024f69c1682 100644
--- a/drivers/iommu/arm
of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 56 ++--
1 file changed, 54 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 69e7c60792a8..9e2f917e16c2 100644
--- a/drivers/iommu
://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/run
://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
Acked-by: Rafael J. Wysocki
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 8bef3cb2424d..5b8226c8af19 100644
--- a/drivers/base
smmu: Add pm_runtime/sleep ops
iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_runtime_get/put_suppliers
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
drm
smmu: Add pm_runtime/sleep ops
iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_runtime_get/put_suppliers
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
drm
Hi Robin,
On Tue, Feb 6, 2018 at 5:22 PM, Robin Murphy <robin.mur...@arm.com> wrote:
> Hi Vivek,
>
> On 06/02/18 10:16, Vivek Gautam wrote:
>>
>> SMMU_CBn_FSYNR0 definition from SMMU v2 architecture document
>> says that, the S1CBNDX[23:16] field is only valid i
Hi Robin,
On Tue, Feb 6, 2018 at 5:22 PM, Robin Murphy wrote:
> Hi Vivek,
>
> On 06/02/18 10:16, Vivek Gautam wrote:
>>
>> SMMU_CBn_FSYNR0 definition from SMMU v2 architecture document
>> says that, the S1CBNDX[23:16] field is only valid if SMMU_IDR0.NTS==1.
>>
1500.apps-smmu: Unhandled context fault:
fsr=0x402, iova=0x9e0aa000, fsynr=0x20, cb=0
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Robin Murphy <robin.mur...@arm.com>
---
Hi Robin,
Does it make sense to mask fsynr like this?
Would it still
1500.apps-smmu: Unhandled context fault:
fsr=0x402, iova=0x9e0aa000, fsynr=0x20, cb=0
Signed-off-by: Vivek Gautam
Cc: Robin Murphy
---
Hi Robin,
Does it make sense to mask fsynr like this?
Would it still be confusing for CB==0?
Tagging the patch as RFC to get your comments
Hi Robin,
On 2/5/2018 11:38 PM, Robin Murphy wrote:
On 05/02/18 17:59, Vivek Gautam wrote:
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures
Hi Robin,
On 2/5/2018 11:38 PM, Robin Murphy wrote:
On 05/02/18 17:59, Vivek Gautam wrote:
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/io-pgtable-arm
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures.
Signed-off-by: Vivek Gautam
---
drivers/iommu/io-pgtable-arm-v7s.c | 21
On 2/1/2018 5:03 PM, Sricharan R wrote:
Hi Robin,
On 1/31/2018 6:36 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R <sricha...@codeaurora.org>
The smmu device probe/remove and add/remove master device callbacks
gets called when the smmu is not linked
On 2/1/2018 5:03 PM, Sricharan R wrote:
Hi Robin,
On 1/31/2018 6:36 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
The smmu device probe/remove and add/remove master device callbacks
gets called when the smmu is not linked to its master, that is without
Hi,
On 1/31/2018 6:39 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R <sricha...@codeaurora.org>
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is don
Hi,
On 1/31/2018 6:39 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which
On 1/31/2018 5:53 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R <sricha...@codeaurora.org>
The smmu needs to be functional only when the respective
master's using it are active. The device_link feature
helps to track such functional dependenci
On 1/31/2018 5:53 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
The smmu needs to be functional only when the respective
master's using it are active. The device_link feature
helps to track such functional dependencies, so that the
iommu gets powered when
On 1/30/2018 1:12 AM, Rob Herring wrote:
On Fri, Jan 19, 2018 at 05:13:42PM +0530, Vivek Gautam wrote:
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings
On 1/30/2018 1:12 AM, Rob Herring wrote:
On Fri, Jan 19, 2018 at 05:13:42PM +0530, Vivek Gautam wrote:
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings
Hi Asutosh,
On 1/30/2018 10:11 AM, Asutosh Das wrote:
From: Subhash Jadavani
UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION is only applicable for QCOM UFS host
controller version 2.x.y and this has been fixed from version 3.x.y
onwards, hence this change removes this quirk for
Hi Asutosh,
On 1/30/2018 10:11 AM, Asutosh Das wrote:
From: Subhash Jadavani
UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION is only applicable for QCOM UFS host
controller version 2.x.y and this has been fixed from version 3.x.y
onwards, hence this change removes this quirk for version 3.x.y onwards.
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam
---
drivers/gpu/drm/msm
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
.../devicetree/bindings/iom
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
---
.../devicetree/bindings/iommu/arm,smmu.txt | 43
;
Signed-off-by: Archit Taneja <arch...@codeaurora.org>
[vivek: Clock rework to request bulk of clocks]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 55 ++--
1 file changed, 53 insertions(+), 2
of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 55 ++--
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 78d4c6b8f1ba..21acffe91a1c 100644
--- a/drivers/iommu
aran R <sricha...@codeaurora.org>
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
drivers/iommu/arm-smmu.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/ar
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 21acffe91a1c..95478bfb182c 100644
--- a/drivers/iommu/arm
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.
://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Acked-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/run
://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
Acked-by: Rafael J. Wysocki
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 6e89b51ea3d9..06a2a88fe866 100644
--- a/drivers/base
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.
Signed-off-by: Sricharan R
---
device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_runtime_get/put_suppliers
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
drm/msm: iommu: Replace runtime calls with runtime suppliers
.../devicetree/bindings/iommu/arm,smmu.txt | 43 +++
device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_runtime_get/put_suppliers
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
drm/msm: iommu: Replace runtime calls with runtime suppliers
.../devicetree/bindings/iommu/arm,smmu.txt | 43 +++
0x220
> +#defineQUSB2PHY_IMP_CTRL2 0x224
> +#defineQUSB2PHY_CHG_CTRL2 0x23c
nit: Replace these tabs with simple spaces.
Rest all look good.
Reviewed-by: Vivek Gautam <vivek.gau...@codeaurora.or
0x224
> +#define QUSB2PHY_CHG_CTRL2 0x23c
nit: Replace these tabs with simple spaces.
Rest all look good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
> +
> struct qusb2_phy_init_tbl {
> unsigned int offset;
> unsigne
t;mgau...@codeaurora.org>
> ---
LGTM.
Reviewed-by: Vivek Gautam <vivek.gau...@codeaurora.org>
> drivers/phy/qualcomm/phy-qcom-qusb2.c | 149
> +-
> 1 file changed, 109 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New version of QUSB2 PHY has some registers offset changed.
> Add support to have register layout for a target and update
> the same in phy_configuration.
>
> Signed-off-by: Manu Gautam
> ---
LGTM.
Reviewed-by: Vivek Gauta
On Fri, Jan 12, 2018 at 2:16 PM, Manu Gautam <mgau...@codeaurora.org> wrote:
> Hi Vivek,
>
>
> On 1/12/2018 2:14 PM, Vivek Gautam wrote:
>> On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam <mgau...@codeaurora.org> wrote:
>>> PHY block or asynchronous reset requi
On Fri, Jan 12, 2018 at 2:16 PM, Manu Gautam wrote:
> Hi Vivek,
>
>
> On 1/12/2018 2:14 PM, Vivek Gautam wrote:
>> On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
>>> PHY block or asynchronous reset requires signal
>>> to be asserted before de-asserting. Dr
dev, "%s reset assert failed\n",
> + cfg->reset_list[i]);
> + goto err_rst_assert;
> + }
> }
>
> - for (i = 0; i < cfg->num_resets; i++) {
> + for (i = cfg->num_resets - 1; i >= 0; i--) {
Do we a dependency o
t_list[i]);
> + goto err_rst_assert;
> + }
> }
>
> - for (i = 0; i < cfg->num_resets; i++) {
> + for (i = cfg->num_resets - 1; i >= 0; i--) {
Do we a dependency on the order in which these resets are
applied?
If
> after init. Also, poweron and init for QUSB2 PHY
> need to be executed together always, hence remove
> poweron callback from phy_ops and explicitly perform
> this from init, similar changes needed for poweroff.
>
> Signed-off-by: Manu Gautam <mgau...@codeaurora.org>
>
oweron and init for QUSB2 PHY
> need to be executed together always, hence remove
> poweron callback from phy_ops and explicitly perform
> this from init, similar changes needed for poweroff.
>
> Signed-off-by: Manu Gautam
> ---
Looks good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> PHY regulators which are enabled from power_on() must be ON
> before turning-on clocks and initializing it as part of init().
> As most of the core drivers perform power_on() after init(), move
> PHY regulators enable to
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> PHY regulators which are enabled from power_on() must be ON
> before turning-on clocks and initializing it as part of init().
> As most of the core drivers perform power_on() after init(), move
> PHY regulators enable to com_init() and use
Hi Manu,
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New revision (v3) of QMP PHY uses different offsets
> for almost all of the registers. Hence, move these
> definitions to header file so that updated offsets
> can be added for QMP v3.
>
> Signed-off-by: Manu
Hi Manu,
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New revision (v3) of QMP PHY uses different offsets
> for almost all of the registers. Hence, move these
> definitions to header file so that updated offsets
> can be added for QMP v3.
>
> Signed-off-by: Manu Gautam
> ---
>
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