Hi,
On Tue, Nov 29, 2016 at 4:25 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> On 11/22, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
>> b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
>> new file mode 10064
Hi,
On Tue, Nov 29, 2016 at 4:25 AM, Stephen Boyd wrote:
> On 11/22, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
>> b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
>> new file mode 100644
>> index 00
Hi Stephen,
On Tue, Nov 29, 2016 at 4:19 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
Thanks for reviewing the patch-series.
> On 11/22, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
>> b/Documentation/devicetree/bindings/p
Hi Stephen,
On Tue, Nov 29, 2016 at 4:19 AM, Stephen Boyd wrote:
Thanks for reviewing the patch-series.
> On 11/22, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
>> b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
&
Hi Rob,
On Mon, Nov 28, 2016 at 7:49 PM, Rob Herring <r...@kernel.org> wrote:
Thanks for reviewing the patch.
> On Tue, Nov 22, 2016 at 05:32:40PM +0530, Vivek Gautam wrote:
>> Qualcomm chipsets have QUSB2 phy controller that provides
>> HighSpeed functionality for DWC3
Hi Rob,
On Mon, Nov 28, 2016 at 7:49 PM, Rob Herring wrote:
Thanks for reviewing the patch.
> On Tue, Nov 22, 2016 at 05:32:40PM +0530, Vivek Gautam wrote:
>> Qualcomm chipsets have QUSB2 phy controller that provides
>> HighSpeed functionality for DWC3 controller.
>&
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes since v1:
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Tested-by: Srinivas Kandagatla <sriniva
Qualcomm chipsets have QMP phy controller that provides
support to a number of controller, viz. PCIe, UFS, and USB.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
Acked-by: Rob Herring
---
Changes since v1:
- New patch, forked out of the original driver patch:
&quo
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
Signed-off-by: Vivek Gautam
Tested-by: Srinivas Kandagatla
---
Changes since v1:
- Fixed missing
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Changes since v1:
- New patch, forked out of the original driver patch:
&quo
Qualcomm chipsets have QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller.
Adding dt binding information for the same.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- New patch, forked out of the original driver patch:
"phy: qcom-qusb2: New driver for
comm/kernel.git;a=shortlog;h=refs/heads/integration-linux-qcomlt
[3] https://lkml.org/lkml/2016/11/17/21
Vivek Gautam (4):
dt-bindings: phy: Add support for QUSB2 phy
phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips
dt-bindings: phy: Add support for QMP phy
phy: qcom-qmp: new qmp
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Changes since v1:
- removed reference to clk_enabled/pwr_enabled.
- moved clock and reg
comm/kernel.git;a=shortlog;h=refs/heads/integration-linux-qcomlt
[3] https://lkml.org/lkml/2016/11/17/21
Vivek Gautam (4):
dt-bindings: phy: Add support for QUSB2 phy
phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips
dt-bindings: phy: Add support for QMP phy
phy: qcom-qmp: new qmp
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- removed reference to clk_enabled/pwr_enabled.
- moved clock and regulator enable code to phy_power_on/off
Hi Kishon,
On Thu, Nov 10, 2016 at 2:33 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
> Hi Kishon,
>
>>> +unsigned int msm8996_pciephy_tx_offsets[] = { 0x1000, 0x2000, 0x3000 };
>>> +unsigned int msm8996_pciephy_rx_offsets[] = { 0x1200, 0x220
Hi Kishon,
On Thu, Nov 10, 2016 at 2:33 PM, Vivek Gautam
wrote:
> Hi Kishon,
>
>>> +unsigned int msm8996_pciephy_tx_offsets[] = { 0x1000, 0x2000, 0x3000 };
>>> +unsigned int msm8996_pciephy_rx_offsets[] = { 0x1200, 0x2200, 0x3200 };
>>> +unsigned int msm8996
The nvmem core driver supports to read and write single
byte. So, allow qfprom to support this feature.
This change helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org&
The nvmem core driver supports to read and write single
byte. So, allow qfprom to support this feature.
This change helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.
Signed-off-by: Vivek Gautam
Cc: Srinivas Kandagatla
Hi Stephen,
On Wed, Nov 16, 2016 at 12:29 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> On 11/15, Vivek Gautam wrote:
>> @@ -53,7 +53,7 @@ static int qfprom_remove(struct platform_device *pdev)
>> static struct nvmem_config econfig = {
>> .name = "qfprom
Hi Stephen,
On Wed, Nov 16, 2016 at 12:29 AM, Stephen Boyd wrote:
> On 11/15, Vivek Gautam wrote:
>> @@ -53,7 +53,7 @@ static int qfprom_remove(struct platform_device *pdev)
>> static struct nvmem_config econfig = {
>> .name = "qfprom",
>> .owne
On Tue, Nov 15, 2016 at 7:06 PM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
>
> On Tuesday 08 November 2016 04:23 PM, Vivek Gautam wrote:
>> Hi Kishon,
>>
>> On Thu, Oct 20, 2016 at 12:23 PM, Vivek Gautam
>> <vivek.gau...@codeaurora.org> wrote:
>&g
On Tue, Nov 15, 2016 at 7:06 PM, Kishon Vijay Abraham I wrote:
>
> On Tuesday 08 November 2016 04:23 PM, Vivek Gautam wrote:
>> Hi Kishon,
>>
>> On Thu, Oct 20, 2016 at 12:23 PM, Vivek Gautam
>> wrote:
>>> Remove unneeded semicolon.
>>>
>>
The nvmem core driver supports to read and write single
byte. This helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Based on torvalds's master branch.
-
The nvmem core driver supports to read and write single
byte. This helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.
Signed-off-by: Vivek Gautam
---
Based on torvalds's master branch.
- Tested on db410c for thermal sensors
Hi,
On Mon, Nov 14, 2016 at 4:02 PM, Srinivas Kandagatla
<srinivas.kandaga...@linaro.org> wrote:
>
>
> On 09/11/16 10:37, Vivek Gautam wrote:
>>
>> Hi,
>>
>> On Fri, Nov 4, 2016 at 6:29 PM, Srinivas Kandagatla
>> <srinivas.kandaga...@linaro.org>
Hi,
On Mon, Nov 14, 2016 at 4:02 PM, Srinivas Kandagatla
wrote:
>
>
> On 09/11/16 10:37, Vivek Gautam wrote:
>>
>> Hi,
>>
>> On Fri, Nov 4, 2016 at 6:29 PM, Srinivas Kandagatla
>> wrote:
>>>
>>> This patch adds support to msm8996/apq
On Fri, Nov 11, 2016 at 2:37 PM, Sachin Shukla wrote:
> From: "Sachin Shukla"
>
> There is no need to call kfree() if memdup_user_nul() fails, as no memory
> was allocated and the error in the error-valued pointer should be returned.
>
>
On Fri, Nov 11, 2016 at 2:37 PM, Sachin Shukla wrote:
> From: "Sachin Shukla"
>
> There is no need to call kfree() if memdup_user_nul() fails, as no memory
> was allocated and the error in the error-valued pointer should be returned.
>
> Signed-off-by: Sachin Shukla
> ---
>
Hi Stan,
On Fri, Nov 11, 2016 at 2:37 PM, Stanimir Varbanov
<stanimir.varba...@linaro.org> wrote:
> Hi Vivek,
>
> On 11/11/2016 08:12 AM, Vivek Gautam wrote:
>> On Mon, Nov 7, 2016 at 11:04 PM, Stanimir Varbanov
>> <stanimir.varba...@linaro.org> wrote:
>&g
Hi Stan,
On Fri, Nov 11, 2016 at 2:37 PM, Stanimir Varbanov
wrote:
> Hi Vivek,
>
> On 11/11/2016 08:12 AM, Vivek Gautam wrote:
>> On Mon, Nov 7, 2016 at 11:04 PM, Stanimir Varbanov
>> wrote:
>>> Makefile and Kconfig files to build the Venus video codec driver.
&
On Mon, Nov 7, 2016 at 11:04 PM, Stanimir Varbanov
wrote:
> Makefile and Kconfig files to build the Venus video codec driver.
>
> Signed-off-by: Stanimir Varbanov
> ---
> drivers/media/platform/qcom/Kconfig| 7 +++
>
On Mon, Nov 7, 2016 at 11:04 PM, Stanimir Varbanov
wrote:
> Makefile and Kconfig files to build the Venus video codec driver.
>
> Signed-off-by: Stanimir Varbanov
> ---
> drivers/media/platform/qcom/Kconfig| 7 +++
> drivers/media/platform/qcom/Makefile | 1 +
>
Hi Kishon,
On Thu, Oct 27, 2016 at 1:41 AM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
> Hi,
>
> On Wednesday 19 October 2016 04:13 PM, Vivek Gautam wrote:
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, a
Hi Kishon,
On Thu, Oct 27, 2016 at 1:41 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Wednesday 19 October 2016 04:13 PM, Vivek Gautam wrote:
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, and USB.
>&
Hi,
On Fri, Nov 4, 2016 at 6:29 PM, Srinivas Kandagatla
wrote:
> This patch adds support to msm8996/apq8096 pcie, MSM8996 supports
> Gen 1/2, One lane, 3 pcie root-complex with support to MSI and
> legacy interrupts and it conforms to PCI Express Base 2.1
Hi,
On Fri, Nov 4, 2016 at 6:29 PM, Srinivas Kandagatla
wrote:
> This patch adds support to msm8996/apq8096 pcie, MSM8996 supports
> Gen 1/2, One lane, 3 pcie root-complex with support to MSI and
> legacy interrupts and it conforms to PCI Express Base 2.1 specification.
>
> This patch adds
Hi Kishon,
On Thu, Oct 20, 2016 at 12:23 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
> Remove unneeded semicolon.
>
> Generated by: coccinellery/semicolon/semicolon.cocci
>
> Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
> Cc: Kishon
Hi Kishon,
On Thu, Oct 20, 2016 at 12:23 PM, Vivek Gautam
wrote:
> Remove unneeded semicolon.
>
> Generated by: coccinellery/semicolon/semicolon.cocci
>
> Signed-off-by: Vivek Gautam
> Cc: Kishon Vijay Abraham I
> ---
Gentle ping.
Do you plan to pull in 3 patches in this
Hi Kishon,
On Thu, Oct 27, 2016 at 1:26 AM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
> Hi,
I am currently on vacation, so the responses are delayed a bit.
Please bear with me.
>
> On Wednesday 19 October 2016 04:13 PM, Vivek Gautam wrote:
>> PHY transceiver driver for
Hi Kishon,
On Thu, Oct 27, 2016 at 1:26 AM, Kishon Vijay Abraham I wrote:
> Hi,
I am currently on vacation, so the responses are delayed a bit.
Please bear with me.
>
> On Wednesday 19 October 2016 04:13 PM, Vivek Gautam wrote:
>> PHY transceiver driver for QUSB2 phy controlle
Hi Rob,
On Thu, Oct 27, 2016 at 2:46 AM, Rob Herring <r...@kernel.org> wrote:
> On Wed, Oct 19, 2016 at 04:13:46PM +0530, Vivek Gautam wrote:
>> PHY transceiver driver for QUSB2 phy controller that provides
>> HighSpeed functionality for DWC3 controller present on
Hi Rob,
On Thu, Oct 27, 2016 at 2:46 AM, Rob Herring wrote:
> On Wed, Oct 19, 2016 at 04:13:46PM +0530, Vivek Gautam wrote:
>> PHY transceiver driver for QUSB2 phy controller that provides
>> HighSpeed functionality for DWC3 controller present on
>> Qualcomm chipsets.
>&
On Thu, Oct 27, 2016 at 2:48 AM, Rob Herring <r...@kernel.org> wrote:
> On Wed, Oct 19, 2016 at 04:13:47PM +0530, Vivek Gautam wrote:
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, and USB.
>> Add a new d
On Thu, Oct 27, 2016 at 2:48 AM, Rob Herring wrote:
> On Wed, Oct 19, 2016 at 04:13:47PM +0530, Vivek Gautam wrote:
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, and USB.
>> Add a new driver, based on
Hi Srini,
On Wed, Oct 26, 2016 at 7:27 PM, Srinivas Kandagatla
<srinivas.kandaga...@linaro.org> wrote:
> Hi Vivek,
>
> Thanks for consolidating qmp phy support for both usb and pcie.
On vacation, so responses are bit late. Please bear with me.
>
> On 19/10/16 11:4
Hi Srini,
On Wed, Oct 26, 2016 at 7:27 PM, Srinivas Kandagatla
wrote:
> Hi Vivek,
>
> Thanks for consolidating qmp phy support for both usb and pcie.
On vacation, so responses are bit late. Please bear with me.
>
> On 19/10/16 11:43, Vivek Gautam wrote:
>>
>>
Hi,
On Wed, Oct 19, 2016 at 10:50 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
> Hi,
>
>
> On Wed, Oct 19, 2016 at 2:48 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
>> On 10/18/2016 07:28 AM, Vivek Gautam wrote:
>>> From: Yaniv Gardi <yga...@c
Hi,
On Wed, Oct 19, 2016 at 10:50 PM, Vivek Gautam
wrote:
> Hi,
>
>
> On Wed, Oct 19, 2016 at 2:48 AM, Stephen Boyd wrote:
>> On 10/18/2016 07:28 AM, Vivek Gautam wrote:
>>> From: Yaniv Gardi
>>>
>>> Since in future UFS Phy's the tx_iface_clk
Hi,
On Thu, Oct 27, 2016 at 1:50 AM, Kishon Vijay Abraham I <kis...@ti.com> wrote:
>
>
> On Tuesday 18 October 2016 07:58 PM, Vivek Gautam wrote:
>> remove() callback does a phy_exit() only and nothing else now.
>
> remove callback calls a phy_power_off(
Hi,
On Thu, Oct 27, 2016 at 1:50 AM, Kishon Vijay Abraham I wrote:
>
>
> On Tuesday 18 October 2016 07:58 PM, Vivek Gautam wrote:
>> remove() callback does a phy_exit() only and nothing else now.
>
> remove callback calls a phy_power_off() ;-)
Yea, correct. My bad. :)
Hi Martin,
On Tue, Oct 25, 2016 at 6:10 AM, Martin K. Petersen
<martin.peter...@oracle.com> wrote:
>>>>>> "Vivek" == Vivek Gautam <vivek.gau...@codeaurora.org> writes:
>
> Vivek,
>
> Vivek> These patches cleanup the ufs phy driver to an e
Hi Martin,
On Tue, Oct 25, 2016 at 6:10 AM, Martin K. Petersen
wrote:
>>>>>> "Vivek" == Vivek Gautam writes:
>
> Vivek,
>
> Vivek> These patches cleanup the ufs phy driver to an extent.
> Vivek> Subsequent patches will target to clean the
H <gre...@linuxfoundation.org>
Cc: Stable <sta...@vger.kernel.org> # 4.8+
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Based on usb-next.
Build tested.
Changes since v1:
- Added reference to original commit that this patch fixes.
- CC'ed kernel stable.
dri
-by: Vivek Gautam
---
Based on usb-next.
Build tested.
Changes since v1:
- Added reference to original commit that this patch fixes.
- CC'ed kernel stable.
drivers/usb/dwc3/core.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3
Hi,
On Fri, Oct 21, 2016 at 3:45 PM, Felipe Balbi <ba...@kernel.org> wrote:
>
> Hi,
>
> Vivek Gautam <vivek.gau...@codeaurora.org> writes:
>> Fixing the sequence of events in dwc3_core_init() error exit path.
>> dwc3_core_exit() call is removed from the erro
Hi,
On Fri, Oct 21, 2016 at 3:45 PM, Felipe Balbi wrote:
>
> Hi,
>
> Vivek Gautam writes:
>> Fixing the sequence of events in dwc3_core_init() error exit path.
>> dwc3_core_exit() call is removed from the error path since,
>> whatever it's doing is already do
Fixing the sequence of events in dwc3_core_init() error exit path.
dwc3_core_exit() call is removed from the error path since,
whatever it's doing is already done.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
---
Based
Fixing the sequence of events in dwc3_core_init() error exit path.
dwc3_core_exit() call is removed from the error path since,
whatever it's doing is already done.
Signed-off-by: Vivek Gautam
Cc: Felipe Balbi
---
Based on usb-next.
drivers/usb/dwc3/core.c | 5 ++---
1 file changed, 2
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR.
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/phy/phy-ti-pipe3.c | 10 ++
drivers/phy/tegra/x
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR.
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
---
drivers/phy/phy-ti-pipe3.c | 10 ++
drivers/phy/tegra/xusb.c | 10 ++
2 files changed, 4 insertions(+), 16
Remove unneeded semicolon.
Generated by: coccinellery/semicolon/semicolon.cocci
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/phy/phy-brcm-sata.c | 6 +++---
drivers/phy/phy-exynos4210-usb2.c | 4 ++--
dri
Remove unneeded variables when "0" can be returned.
Generated by: scripts/coccinelle/misc/returnvar.cocci
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
---
drivers/phy/phy-berlin-sata.c | 3 +--
drivers/phy/teg
Remove unneeded semicolon.
Generated by: coccinellery/semicolon/semicolon.cocci
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
---
drivers/phy/phy-brcm-sata.c | 6 +++---
drivers/phy/phy-exynos4210-usb2.c | 4 ++--
drivers/phy/phy-exynos4x12-usb2.c | 4 ++--
drivers/phy/phy
Remove unneeded variables when "0" can be returned.
Generated by: scripts/coccinelle/misc/returnvar.cocci
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
---
drivers/phy/phy-berlin-sata.c | 3 +--
drivers/phy/tegra/xusb-tegra124.c | 3 +--
2 files changed, 2 insert
On Wed, Oct 19, 2016 at 4:24 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
> CC: Srinivas Kandagatla
>
>
> On 10/19/2016 04:13 PM, Vivek Gautam wrote:
>>
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, v
On Wed, Oct 19, 2016 at 4:24 PM, Vivek Gautam
wrote:
> CC: Srinivas Kandagatla
>
>
> On 10/19/2016 04:13 PM, Vivek Gautam wrote:
>>
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, and USB.
>> Ad
On Wed, Oct 19, 2016 at 4:13 PM, Vivek Gautam
<vivek.gau...@codeaurora.org> wrote:
> PHY transceiver driver for QUSB2 phy controller that provides
> HighSpeed functionality for DWC3 controller present on
> Qualcomm chipsets.
>
> This driver is based on phy-msm-qusb driver a
On Wed, Oct 19, 2016 at 4:13 PM, Vivek Gautam
wrote:
> PHY transceiver driver for QUSB2 phy controller that provides
> HighSpeed functionality for DWC3 controller present on
> Qualcomm chipsets.
>
> This driver is based on phy-msm-qusb driver available in
> msm-4.4 kernel @co
On Thu, Oct 20, 2016 at 12:48 AM, Subhash Jadavani
<subha...@codeaurora.org> wrote:
> On 2016-10-19 10:45, Vivek Gautam wrote:
>>
>> Hi,
>>
>>
>> On Wed, Oct 19, 2016 at 1:43 AM, Subhash Jadavani
>> <subha...@codeaurora.org> wro
On Thu, Oct 20, 2016 at 12:48 AM, Subhash Jadavani
wrote:
> On 2016-10-19 10:45, Vivek Gautam wrote:
>>
>> Hi,
>>
>>
>> On Wed, Oct 19, 2016 at 1:43 AM, Subhash Jadavani
>> wrote:
>>>
>>> On 2016-10-18 07:28, Vivek Gautam wrote:
>
Hi,
On Wed, Oct 19, 2016 at 1:43 AM, Subhash Jadavani
<subha...@codeaurora.org> wrote:
> On 2016-10-18 07:28, Vivek Gautam wrote:
>>
>> Add phy clock enable code to phy_power_on/off callbacks, and
>> remove explicit calls to enable these phy clocks from the
>>
Hi,
On Wed, Oct 19, 2016 at 1:43 AM, Subhash Jadavani
wrote:
> On 2016-10-18 07:28, Vivek Gautam wrote:
>>
>> Add phy clock enable code to phy_power_on/off callbacks, and
>> remove explicit calls to enable these phy clocks from the
>> ufs-qcom hcd driver.
>&g
Hi,
On Wed, Oct 19, 2016 at 2:48 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> On 10/18/2016 07:28 AM, Vivek Gautam wrote:
>> From: Yaniv Gardi <yga...@codeaurora.org>
>>
>> Since in future UFS Phy's the tx_iface_clk and rx_iface_clk
>> are n
Hi,
On Wed, Oct 19, 2016 at 2:48 AM, Stephen Boyd wrote:
> On 10/18/2016 07:28 AM, Vivek Gautam wrote:
>> From: Yaniv Gardi
>>
>> Since in future UFS Phy's the tx_iface_clk and rx_iface_clk
>> are no longer exist, we should not fail when their initialization
>
and PCIe
controllers. Later, we plan to add the UFS phy support as well to this.
[2]
https://source.codeaurora.org/quic/la/kernel/msm-4.4/log/?h=caf/3.18/msm-3.18
[3]
https://git.linaro.org/?p=landing-teams/working/qualcomm/kernel.git;a=shortlog;h=refs/heads/integration-linux-qcomlt
Vivek Gautam (2
and PCIe
controllers. Later, we plan to add the UFS phy support as well to this.
[2]
https://source.codeaurora.org/quic/la/kernel/msm-4.4/log/?h=caf/3.18/msm-3.18
[3]
https://git.linaro.org/?p=landing-teams/working/qualcomm/kernel.git;a=shortlog;h=refs/heads/integration-linux-qcomlt
Vivek Gautam (2
changes: Based on msm8996-pcie-phy driver posted by
Srinivas [2].
[1]
https://source.codeaurora.org/quic/la/kernel/msm-4.4/log/?h=caf/3.18/msm-3.18
[2] https://patchwork.kernel.org/patch/9318947/
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Kishon Vijay Abraham I <kis.
/msm-3.18
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
---
.../devicetree/bindings/phy/qcom-qusb2-phy.txt | 37 ++
drivers/phy/Kconfig| 10 +
drivers/phy/Makefile
changes: Based on msm8996-pcie-phy driver posted by
Srinivas [2].
[1]
https://source.codeaurora.org/quic/la/kernel/msm-4.4/log/?h=caf/3.18/msm-3.18
[2] https://patchwork.kernel.org/patch/9318947/
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/qcom-qmp-phy.txt
/msm-3.18
Signed-off-by: Vivek Gautam
Cc: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/qcom-qusb2-phy.txt | 37 ++
drivers/phy/Kconfig| 10 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-qcom-qusb2.c
CC: Srinivas Kandagatla
On 10/19/2016 04:13 PM, Vivek Gautam wrote:
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
USB3-phy changes: Based on phy-msm
CC: Srinivas Kandagatla
On 10/19/2016 04:13 PM, Vivek Gautam wrote:
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.
USB3-phy changes: Based on phy-msm
Different menthods pass around generic phy pointer to
extract device pointer. Instead, pass the device pointer
directly between function calls.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Subhash Jadavani <subha...@codeaurora.org>
---
No change since v1.
Different menthods pass around generic phy pointer to
extract device pointer. Instead, pass the device pointer
directly between function calls.
Signed-off-by: Vivek Gautam
Reviewed-by: Subhash Jadavani
---
No change since v1.
drivers/phy/phy-qcom-ufs-i.h| 6 +--
drivers/phy/phy-qcom
remove() callback does a phy_exit() only and nothing else now.
The phy_exit() over the generic phy is called from the phy
consumer, and phy provider driver should not explicitly need to
call any phy_exit().
So discard the remove callback for qcom-ufs phy platform drivers.
Signed-off-by: Vivek
remove() callback does a phy_exit() only and nothing else now.
The phy_exit() over the generic phy is called from the phy
consumer, and phy provider driver should not explicitly need to
call any phy_exit().
So discard the remove callback for qcom-ufs phy platform drivers.
Signed-off-by: Vivek
BUG_ON() are not preferred in the driver, plus the variable
on which BUG_ON is asserted is already checked in the code
before passing.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Subhash Jadavani <subha...@codeaurora.org>
---
No change since v1.
drivers/
This helps us in avoiding any requirement for kfree() operation
to be called exclusively over the allocated string pointer.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Subhash Jadavani <subha...@codeaurora.org>
---
No change since v1.
drivers/phy/phy-qc
BUG_ON() are not preferred in the driver, plus the variable
on which BUG_ON is asserted is already checked in the code
before passing.
Signed-off-by: Vivek Gautam
Reviewed-by: Subhash Jadavani
---
No change since v1.
drivers/phy/phy-qcom-ufs.c | 2 --
1 file changed, 2 deletions(-)
diff
This helps us in avoiding any requirement for kfree() operation
to be called exclusively over the allocated string pointer.
Signed-off-by: Vivek Gautam
Reviewed-by: Subhash Jadavani
---
No change since v1.
drivers/phy/phy-qcom-ufs.c | 5 +
1 file changed, 1 insertion(+), 4 deletions
Do a phy_exit() over the ufs phy in the ufs qcom exit path
to de-initialize the phy.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
New patch added in v2 series.
drivers/scsi/ufs/ufs-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/d
Do a phy_exit() over the ufs phy in the ufs qcom exit path
to de-initialize the phy.
Signed-off-by: Vivek Gautam
---
New patch added in v2 series.
drivers/scsi/ufs/ufs-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index
The phy init is meant to do phy initialization rather than
just getting the clock and regulator. Move these clock and
regulator get to probe(), to make room for actual phy
initialization sequence.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
Reviewed-by: Subhash Jadavani
at a later point.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
New patch added in v2 series.
drivers/phy/phy-qcom-ufs-i.h| 1 -
drivers/phy/phy-qcom-ufs-qmp-14nm.c | 7 ++-
drivers/phy/phy-qcom-ufs-qmp-20nm.c | 7 ++-
drivers/phy/phy-qcom-ufs.c
Add phy clock enable code to phy_power_on/off callbacks, and
remove explicit calls to enable these phy clocks from the
ufs-qcom hcd driver.
Signed-off-by: Vivek Gautam <vivek.gau...@codeaurora.org>
---
Changes since v1:
- staticized ufs_qcom_phy_enable(/disable)_ref_clk(),
- stat
The phy init is meant to do phy initialization rather than
just getting the clock and regulator. Move these clock and
regulator get to probe(), to make room for actual phy
initialization sequence.
Signed-off-by: Vivek Gautam
Reviewed-by: Subhash Jadavani
---
No change since v1.
drivers/phy
at a later point.
Signed-off-by: Vivek Gautam
---
New patch added in v2 series.
drivers/phy/phy-qcom-ufs-i.h| 1 -
drivers/phy/phy-qcom-ufs-qmp-14nm.c | 7 ++-
drivers/phy/phy-qcom-ufs-qmp-20nm.c | 7 ++-
drivers/phy/phy-qcom-ufs.c | 17 ++---
4 files changed
Add phy clock enable code to phy_power_on/off callbacks, and
remove explicit calls to enable these phy clocks from the
ufs-qcom hcd driver.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- staticized ufs_qcom_phy_enable(/disable)_ref_clk(),
- staticized ufs_qcom_phy_enable(/disable
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