This patch changes kvm_pmu_get_msr to get the msr_data struct, because
The host_initiated field from the struct could be used by get_msr. This
also makes this API be consistent with kvm_pmu_set_msr.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/kvm/pmu.c | 4
On 07/03/2019 01:46 AM, Eric Hankland wrote:
Sounds good to me.
If you don't have any more comments I'll send out the next version
with all the requested changes.
No more so far. I'll see your new version.
Best,
Wei
On 06/25/2019 08:32 AM, Eric Hankland wrote:
Thanks for your feedback - I'll send out an updated version
> incorporating your comments shortly (assuming you don't have more
> after this).
Actually I have another thing to discuss:
probably we could consider to make this filter list white/black
On 05/23/2019 06:23 AM, Eric Hankland wrote:
- Add a VCPU ioctl that can control which events the guest can monitor.
Signed-off-by: ehankland
---
Some events can provide a guest with information about other guests or the
host (e.g. L3 cache stats); providing the capability to restrict access
On 06/14/2019 01:43 AM, Eric Hankland wrote:
Since we aren't using QEMU, I don't have those patches ready yet, but
I can work on them if you want to review them at the same time as this
patch. The architectural events (minus the LLC events) are probably a
reasonable starting point for the
The vCPU lbr event relies on the host to save/restore all the lbr
related MSRs. So add the LBR_SELECT save/restore to the related
functions for the vCPU case.
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/intel/lbr.c | 7 +++
arch/x86/events/perf_event.h
of counter assignment.
Signed-off-by: Wei Wang
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/core.c | 12
include/linux/perf_event.h | 13 +
kernel/events/core.c | 37 +
3 files changed, 50 insertions(+), 12 deletions
Kleen
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 +
arch/x86/kvm/pmu.c | 6 ++
arch/x86/kvm/pmu.h | 2 +
arch/x86/kvm/vmx/pmu_intel.c| 146
arch
) and finds
it's non-zero, it simply returns.
Signed-off-by: Like Xu
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 13 +++--
arch/x86/events/perf_event.h| 1 +
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/pmu.h
Introduce KVM_CAP_X86_GUEST_LBR to allow per-VM enabling of the guest
lbr feature.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/x86.c | 14 ++
include/uapi/linux/kvm.h
The debugctl msr is not completely identical on AMD and Intel CPUs, for
example, FREEZE_LBRS_ON_PMI is supported by Intel CPUs only. Now, this
msr is handled separatedly in svm.c and intel_pmu.c. So remove the
common debugctl msr handling code in kvm_get/set_msr_common.
Signed-off-by: Wei Wang
The MSR variable type can be "unsigned int", which uses less memory than
the longer unsigned long. The lbr nr won't be a negative number, so make
it "unsigned int" as well.
Suggested-by: Peter Zijlstra
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86
Arch v4 supports streamlined Freeze_LBR_on_PMI. According to the SDM,
the LBR_FRZ bit is set to global status when debugctl.freeze_lbr_on_pmi
has been set and a PMI is generated. The CTR_FRZ bit is set when
debugctl.freeze_perfmon_on_pmi is set and a PMI is generated.
Signed-off-by: Wei Wang
Cc
nt without
the need of a perf counter
- Patch 12: set the GLOBAL_STATUS_COUNTERS_FROZEN bit when
injecting a vPMI.
previous:
https://lkml.org/lkml/2019/2/14/210
Like Xu (1):
KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr
stack
We
This patch changes kvm_pmu_get_msr to get the msr_data struct, because
The host_initiated field from the struct could be used by get_msr. This
also makes this API be consistent with kvm_pmu_set_msr.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/kvm/pmu.c | 4
and guest see different lbr stack msr indices.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/kvm/cpuid.h | 8 +++
arch/x86/kvm/pmu.c | 8 +++
arch/x86/kvm/pmu.h | 2 +
arch/x86/kvm/vmx/pmu_intel.c | 136
for the guest.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 23 +++
arch/x86/include/asm/perf_event.h | 14 ++
2 files changed, 37 insertions(+)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/include/asm/perf_event.h | 2 ++
arch/x86/kvm
On 06/06/2019 05:35 AM, Eric Hankland wrote:
Right - I'm aware there are other ways of detecting this - it's still
a class of events that some people don't want to surface. I'll ask if
there are any better examples.
I asked and it sounds like we are treating all events as potentially
insecure
On 06/04/2019 01:30 AM, Eric Hankland wrote:
On Sat, Jun 1, 2019 at 3:50 AM Wei Wang wrote:
My question is that have we proved that this indirect info leakage
indeed happens?
The spec states that the counter will count the related events generated by
the logical CPU with AnyThread=0. I would
On 06/01/2019 03:59 AM, Eric Hankland wrote:
With anythread=0, I'm not aware of any events that directly give info
about other VMs, but monitoring events related to shared resources
(e.g. LLC References and LLC Misses) could indirectly give you info
about how heavily other users are using that
On 05/30/2019 01:11 AM, Eric Hankland wrote:
On Wed, May 29, 2019 at 12:49 AM Wei Wang wrote:
On 05/29/2019 02:14 AM, Eric Hankland wrote:
On Mon, May 27, 2019 at 6:56 PM Wei Wang wrote:
On 05/23/2019 06:23 AM, Eric Hankland wrote:
- Add a VCPU ioctl that can control which events the guest
On 05/29/2019 02:14 AM, Eric Hankland wrote:
On Mon, May 27, 2019 at 6:56 PM Wei Wang wrote:
On 05/23/2019 06:23 AM, Eric Hankland wrote:
- Add a VCPU ioctl that can control which events the guest can monitor.
Signed-off-by: ehankland
---
Some events can provide a guest with information
On 05/23/2019 06:23 AM, Eric Hankland wrote:
- Add a VCPU ioctl that can control which events the guest can monitor.
Signed-off-by: ehankland
---
Some events can provide a guest with information about other guests or the
host (e.g. L3 cache stats); providing the capability to restrict access
On Mon, Apr 22, 2019 at 11:15 PM Zhang Rui wrote:
>
> On 一, 2019-04-22 at 09:44 -0700, Wei Wang wrote:
> > On Mon, Apr 22, 2019 at 2:03 AM Zhang Rui
> > wrote:
> > >
> > >
> > > On 二, 2019-04-16 at 10:07 -0700, Wei Wang wrote:
> > > >
&
On Mon, Apr 22, 2019 at 2:03 AM Zhang Rui wrote:
>
> On 二, 2019-04-16 at 10:07 -0700, Wei Wang wrote:
> > It is unnecessary to update disabled thermal zones post suspend and
> > sometimes leads error/warning in bad behaved thermal drivers.
> >
> a good catch, and in
It is unnecessary to update disabled thermal zones post suspend and
sometimes leads error/warning in bad behaved thermal drivers.
Signed-off-by: Wei Wang
---
drivers/thermal/thermal_core.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/thermal/thermal_core.c b/drivers
On 03/25/2019 03:19 PM, Peter Zijlstra wrote:
On Mon, Mar 25, 2019 at 02:47:32PM +0800, Like Xu wrote:
On 2019/3/24 1:28, Peter Zijlstra wrote:
On Sat, Mar 23, 2019 at 10:18:03PM +0800, Like Xu wrote:
=== Brief description ===
This proposal for Intel vPMU is still committed to optimize the
On 02/18/2019 10:36 AM, Wei Wang wrote:
On 02/15/2019 05:41 PM, David Hildenbrand wrote:
On 15.02.19 10:05, Wang, Wei W wrote:
On Thursday, February 14, 2019 5:43 PM, David Hildenbrand wrote:
Yes indeed, that is the important bit. They must not be put pack to
the
buddy before they have been
On 02/15/2019 05:41 PM, David Hildenbrand wrote:
On 15.02.19 10:05, Wang, Wei W wrote:
On Thursday, February 14, 2019 5:43 PM, David Hildenbrand wrote:
Yes indeed, that is the important bit. They must not be put pack to the
buddy before they have been processed by the hypervisor. But as the
On 02/15/2019 09:10 PM, Andi Kleen wrote:
OK. The freeze bits need to be cleared by IA32_PERF_GLOBAL_STATUS_RESET, which
seems not supported by the perf code yet (thus guest won't clear them). Would
handle_irq_v4 also need to be changed to support that?
In Arch Perfmon v4 it is cleared by
Introduce KVM_CAP_X86_GUEST_LBR to allow per-VM enabling of the guest
lbr feature.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/x86.c | 15 +++
include/uapi/linux/kvm.h
for the guest.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 23 +++
arch/x86/include/asm/perf_event.h | 14 ++
2 files changed, 37 insertions(+)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86
GLOBAL_STATUS_LBRS_FROZEN.
previous:
https://lkml.org/lkml/2018/12/26/82
Like Xu (1):
KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr
stack
Wei Wang (11):
perf/x86: fix the variable type of the LBR MSRs
perf/x86: add a function to get the lbr stack
KVM/x86: KVM_CAP_X86_GUEST_LBR
KVM/x86
Arch v4 supports streamlined Freeze_LBR_on_PMI, so we set the
GLOBAL_STATUS_LBRS_FROZEN bit when the guest reads the global
status msr with freezing lbr in use.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/kvm/vmx/pmu_intel.c | 21 -
1 file changed
This patch changes kvm_pmu_get_msr to get the msr_data struct, because
The host_initiated field from the struct could be used by get_msr. This
also makes this API be consistent with kvm_pmu_set_msr.
Signed-off-by: Wei Wang
---
arch/x86/kvm/pmu.c | 4 ++--
arch/x86/kvm/pmu.h
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/include/asm/perf_event.h | 2 ++
arch/x86/kvm
s non-zero, it simply returns.
Signed-off-by: Like Xu
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 12 ++--
arch/x86/events/perf_event.h| 1 +
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/pmu.h
perf core that no counter is needed.
Signed-off-by: Wei Wang
---
arch/x86/events/core.c | 12
include/linux/perf_event.h | 5 +
include/uapi/linux/perf_event.h | 3 ++-
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/core.c b/arch/
and guest see different lbr stack msr indices.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/kvm/cpuid.h | 8 +++
arch/x86/kvm/pmu.c | 8 +++
arch/x86/kvm/pmu.h | 2 +
arch/x86/kvm/vmx/pmu_intel.c | 136
The vCPU lbr event relies on the host to save/restore all the lbr
related MSRs. So add the LBR_SELECT save/restore to the related
functions for the vCPU case.
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/intel/lbr.c | 7 +++
arch/x86/events/perf_event.h
The debugctl msr is not completely identical on AMD and Intel CPUs, for
example, FREEZE_LBRS_ON_PMI is supported by Intel CPUs only. Now, this
msr is handled separatedly in svm.c and intel_pmu.c. So remove the
common debugctl msr handling code in kvm_get/set_msr_common.
Signed-off-by: Wei Wang
Kleen
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 +
arch/x86/kvm/pmu.c | 6 ++
arch/x86/kvm/pmu.h | 2 +
arch/x86/kvm/vmx/pmu_intel.c| 146
arch
The MSR variable type can be "unsigned int", which uses less memory than
the longer unsigned long. The lbr nr won't be a negative number, so make
it "unsigned int" as well.
Suggested-by: Peter Zijlstra
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86
On 01/15/2019 09:00 AM, Michael S. Tsirkin wrote:
On Mon, Jan 07, 2019 at 03:01:05PM +0800, Wei Wang wrote:
There is no need to update the balloon actual register when there is no
ballooning request. This patch avoids update_balloon_size when diff is 0.
Signed-off-by: Wei Wang
Reviewed
/
+ * @finalize_features are NOT safe to be called from an atomic
+ * context.
* @get: read the value of a configuration field
*vdev: the virtio_device
*offset: the offset of the configuration field
Reviewed-by: Wei Wang
Best,
Wei
);
Ping. Any feedback on that patch?
Reviewed-by: Wei Wang
Best,
Wei
On 01/08/2019 04:46 PM, Christian Borntraeger wrote:
On 08.01.2019 06:35, Wei Wang wrote:
On 01/07/2019 09:49 PM, Christian Borntraeger wrote:
On 07.01.2019 08:01, Wei Wang wrote:
virtio-ccw has deadlock issues with reading the config space inside the
interrupt context, so we tweak
On 01/08/2019 10:08 PM, Liang, Kan wrote:
On 1/8/2019 1:13 AM, Wei Wang wrote:
On 01/07/2019 10:22 PM, Liang, Kan wrote:
Thanks for sharing. I understand the point of maintaining those
models at one place,
but this factor-out doesn't seem very elegant to me, like below
__intel_pmu_init
On 01/08/2019 02:48 AM, Jim Mattson wrote:
On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen wrote:
The issue is compatibility. Prior to your change, reading this MSR
from a VM would raise #GP. After your change, it won't. That means
that if you have a VM migrating between hosts with kernel versions
On 01/07/2019 10:22 PM, Liang, Kan wrote:
Thanks for sharing. I understand the point of maintaining those
models at one place,
but this factor-out doesn't seem very elegant to me, like below
__intel_pmu_init (int model, struct x86_pmu *x86_pmu)
{
...
switch (model)
case INTEL_FAM6_NEHALEM:
On 01/07/2019 09:49 PM, Christian Borntraeger wrote:
On 07.01.2019 08:01, Wei Wang wrote:
virtio-ccw has deadlock issues with reading the config space inside the
interrupt context, so we tweak the virtballoon_changed implementation
by moving the config read operations into the related
We've changed to kzalloc the vb struct, so no need to 0-initialize
this field one more time.
Signed-off-by: Wei Wang
Reviewed-by: Cornelia Huck
---
drivers/virtio/virtio_balloon.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio
since vb is
allocated via kzalloc.
v1->v2 ChangeLog:
- add config_read_bitmap to indicate to the workqueue callbacks about
the necessity of reading the related config fields.
Wei Wang (3):
virtio-balloon: tweak config_changed implementation
virtio-balloon: improve update_ballo
There is no need to update the balloon actual register when there is no
ballooning request. This patch avoids update_balloon_size when diff is 0.
Signed-off-by: Wei Wang
Reviewed-by: Cornelia Huck
Reviewed-by: Halil Pasic
Tested-by: Christian Borntraeger
---
drivers/virtio/virtio_balloon.c
the related config fields that need to be read.
The cmd_id_received is also renamed to cmd_id_received_cache, and
the value should be obtained via virtio_balloon_cmd_id_received.
Fixes: 86a559787e6f ("virtio-balloon: VIRTIO_BALLOON_F_FREE_PAGE_HINT")
Reported-by: Christian Borntraeger
Signed-o
On 01/03/2019 11:25 PM, Jim Mattson wrote:
On Wed, Jan 2, 2019 at 11:55 PM Wei Wang wrote:
Right, thanks. Probably better to change it to below:
msr_info->data = 0;
data = native_read_msr(MSR_IA32_PERF_CAPABILITIES);
if (vcpu->kvm->arch.lbr_in_guest)
msr_info->d
There is no need to update the balloon actual register when there is no
ballooning request. This patch avoids update_balloon_size when diff is 0.
Signed-off-by: Wei Wang
Reviewed-by: Cornelia Huck
Reviewed-by: Halil Pasic
---
drivers/virtio/virtio_balloon.c | 5 -
1 file changed, 4
We've changed to kzalloc the vb struct, so no need to 0-initialize
this field one more time.
Signed-off-by: Wei Wang
---
drivers/virtio/virtio_balloon.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index e33dc8e..f19061b
the related config fields that need to be read.
The cmd_id_received is also renamed to cmd_id_received_cache, and
the value should be obtained via virtio_balloon_cmd_id_received.
Reported-by: Christian Borntraeger
Signed-off-by: Wei Wang
Reviewed-by: Cornelia Huck
Reviewed-by: Halil Pasic
---
drivers
indicate to the workqueue callbacks about
the necessity of reading the related config fields.
Wei Wang (3):
virtio-balloon: tweak config_changed implementation
virtio-balloon: improve update_balloon_size_func
virtio_balloon: remove the unnecessary 0-initialization
drivers/virtio/virtio_
On 01/04/2019 11:57 PM, Liang, Kan wrote:
On 1/4/2019 4:58 AM, Wei Wang wrote:
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+/*
+ * It could be possible that people have vcpus of old model
run on
+ * physcal cpus of newer model
On 01/03/2019 11:34 PM, Jim Mattson wrote:
On Wed, Jan 2, 2019 at 11:16 PM Wei Wang wrote:
On 01/03/2019 07:26 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16 entries
On 01/03/2019 12:33 AM, Liang, Kan wrote:
On 12/26/2018 4:25 AM, Wei Wang wrote:
+
+/*
+ * It could be possible that people have vcpus of old model run on
+ * physcal cpus of newer model, for example a BDW guest on a SKX
+ * machine (but not possible to be the other way around
out
the necessity of reading the related config fields.
Wei Wang (2):
virtio-balloon: tweak config_changed implementation
virtio-balloon: improve update_balloon_size_func
drivers/virtio/virtio_balloon.c | 86 +++--
1 file changed, 57 insertions(+),
the related config fields that need to be read.
Reported-by: Christian Borntraeger
Signed-off-by: Wei Wang
---
drivers/virtio/virtio_balloon.c | 81 +++--
1 file changed, 53 insertions(+), 28 deletions(-)
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio
There is no need to update the balloon actual register when there is no
ballooning request. This patch avoids update_balloon_size when diff is 0.
Signed-off-by: Wei Wang
Reviewed-by: Cornelia Huck
Reviewed-by: Halil Pasic
---
drivers/virtio/virtio_balloon.c | 5 -
1 file changed, 4
On 01/04/2019 12:42 AM, Michael S. Tsirkin wrote:
On Thu, Jan 03, 2019 at 01:31:01PM +0800, Wei Wang wrote:
virtio-ccw has deadlock issues with reading config registers inside the
interrupt context, so we tweak the virtballoon_changed implementation
by moving the config read operations
On 01/03/2019 05:40 PM, Cornelia Huck wrote:
On Thu, 3 Jan 2019 13:31:01 +0800
Wei Wang wrote:
virtio-ccw has deadlock issues with reading config registers inside the
s/config registers/the config space/ ?
Sounds good.
interrupt context, so we tweak the virtballoon_changed
On 01/03/2019 07:40 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
On 01/03/2019 07:26 AM, Jim Mattson wrote:
On Wed, Dec 26, 2018 at 2:01 AM Wei Wang wrote:
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16 entries, so a HSW guest running on a SKX
machine may not get accurate perf results. Currently, we
On 12/28/2018 03:57 PM, Christian Borntraeger wrote:
On 28.12.2018 03:26, Wei Wang wrote:
Some vqs don't need to be allocated when the related feature bits are
disabled. Callers notice the vq allocation layer by setting the related
names[i] to be NULL.
This patch series fixes the find_vqs
virtio-ccw has deadlock issues with reading config registers inside the
interrupt context, so we tweak the virtballoon_changed implementation
by moving the config read operations into the related workqueue contexts.
Signed-off-by: Wei Wang
---
drivers/virtio/virtio_balloon.c | 54
There is no need to update the balloon actual register when there is no
ballooning request. This patch avoids update_balloon_size when diff is 0.
Signed-off-by: Wei Wang
---
drivers/virtio/virtio_balloon.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/virtio
Since virtio-ccw doesn't work with accessing to the config registers
inside an interrupt context, this patch series avoids that issue by
moving the config register accesses to the related workqueue contexts.
Wei Wang (2):
virtio-balloon: tweak config_changed implementation
virtio-balloon
On 12/27/2018 08:17 PM, Christian Borntraeger wrote:
On 27.12.2018 12:59, Christian Borntraeger wrote:
On 27.12.2018 12:31, Christian Borntraeger wrote:
This patch triggers random crashes in the guest kernel on s390 early during
boot.
No migration and no setting of the balloon is involved.
On 12/28/2018 04:51 AM, Andi Kleen wrote:
Thanks. This looks a lot better than the earlier versions.
Some more comments.
On Wed, Dec 26, 2018 at 05:25:38PM +0800, Wei Wang wrote:
When the vCPU is scheduled in:
- if the lbr feature was used in the last vCPU time slice, set the lbr
stack
On 12/27/2018 08:03 PM, Christian Borntraeger wrote:
On 27.08.2018 03:32, Wei Wang wrote:
static int init_vqs(struct virtio_balloon *vb)
{
- struct virtqueue *vqs[3];
- vq_callback_t *callbacks[] = { balloon_ack, balloon_ack, stats_request
};
- static const char * const
Some vqs may not need to be allocated when their related feature bits
are disabled. So callers may pass in such vqs with "names = NULL".
Then we skip such vq allocations.
Signed-off-by: Wei Wang
---
drivers/misc/mic/vop/vop_main.c| 9 +++--
drivers/remoteproc/remotepro
Some vqs don't need to be allocated when the related feature bits are
disabled. Callers notice the vq allocation layer by setting the related
names[i] to be NULL.
This patch series fixes the find_vqs implementations to handle this case.
Wei Wang (2):
virtio_pci: use queue idx instead of array
to the 3rd queue on the device.
So we use queue_idx as the queue index, which is increased only when the
queue exists.
Signed-off-by: Wei Wang
---
drivers/virtio/virtio_pci_common.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/virtio/virtio_pci_common.c
b/drivers
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/include/asm/perf_event.h | 2 ++
arch/x86/kvm
the stack through to the guest.
Suggested-by: Andi Kleen
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 4 ++
arch/x86/kvm/pmu.h | 5 ++
arch/x86/kvm/vmx.c | 138
The vCPU lbr event relies on the host to save/restore all the lbr
related MSRs. So add the LBR_SELECT save/restore to the related
functions for the vCPU case.
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/intel/lbr.c | 7 +++
arch/x86/events/perf_event.h
for the guest.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 23 +++
arch/x86/include/asm/perf_event.h | 14 ++
2 files changed, 37 insertions(+)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86
This patch adds a function to check if the lbr_sel value has the user
callstack mode set. The related LBR_* macros are moved to the
perf_event.h as well.
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/intel/lbr.c | 38 ---
arch
s non-zero, it simply returns.
Signed-off-by: Like Xu
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/events/intel/lbr.c | 14 +++--
arch/x86/events/perf_event.h| 1 +
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/pmu.h
perf core that no counter is needed.
Signed-off-by: Wei Wang
---
arch/x86/events/core.c | 12
include/linux/perf_event.h | 5 +
include/uapi/linux/perf_event.h | 3 ++-
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/core.c b/arch/
The MSR variable type can be "unsigned int", which uses less memory than
the longer unsigned long. The lbr nr won't be a negative number, so make
it "unsigned int" as well.
Suggested-by: Peter Zijlstra
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86
Introduce KVM_CAP_X86_GUEST_LBR to allow per-VM enabling of the guest
lbr feature.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/x86.c | 15 +++
include/uapi/linux/kvm.h
- Patch 10: in guest_access_lbr_msr, pass through the lbr stack
only when it has been passed through (i.e. add the check
!vcpu->arch.lbr_used).
previous:
https://lkml.org/lkml/2018/9/20/507
Like Xu (1):
KVM/x86/vPMU: Add APIs to support host save/restore the guest lbr
stack
-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/kvm/cpuid.h | 8
arch/x86/kvm/pmu.c | 8
arch/x86/kvm/pmu.h | 2 +
arch/x86/kvm/pmu_intel.c | 117 +++
arch/x86/kvm/x86.c | 3 +-
5
On 11/08/2018 10:50 AM, Michael S. Tsirkin wrote:
On Thu, Nov 08, 2018 at 10:49:20AM +0800, Wei Wang wrote:
On 11/07/2018 11:27 PM, Michael S. Tsirkin wrote:
+ LKML
On Wed, Nov 07, 2018 at 02:29:02PM +, Wang, Wei W wrote:
Hi Michael,
Thanks again for reviewing so many versions
On 11/08/2018 10:50 AM, Michael S. Tsirkin wrote:
On Thu, Nov 08, 2018 at 10:49:20AM +0800, Wei Wang wrote:
On 11/07/2018 11:27 PM, Michael S. Tsirkin wrote:
+ LKML
On Wed, Nov 07, 2018 at 02:29:02PM +, Wang, Wei W wrote:
Hi Michael,
Thanks again for reviewing so many versions
On 11/07/2018 11:27 PM, Michael S. Tsirkin wrote:
+ LKML
On Wed, Nov 07, 2018 at 02:29:02PM +, Wang, Wei W wrote:
Hi Michael,
Thanks again for reviewing so many versions of patches, and I learnt a lot from
your comments.
While I’m writing the virtio-balloon spec patches, I’m
On 11/07/2018 11:27 PM, Michael S. Tsirkin wrote:
+ LKML
On Wed, Nov 07, 2018 at 02:29:02PM +, Wang, Wei W wrote:
Hi Michael,
Thanks again for reviewing so many versions of patches, and I learnt a lot from
your comments.
While I’m writing the virtio-balloon spec patches, I’m
From: Wei Wang
commit ff140fea847e ("Thermal: handle thermal zone device properly
during system sleep") added PM hook to call thermal zone reset during
sleep. However reseting thermal zone will also clear the passive state
and thus cancel the polling queue which leads the passive cool
From: Wei Wang
commit ff140fea847e ("Thermal: handle thermal zone device properly
during system sleep") added PM hook to call thermal zone reset during
sleep. However reseting thermal zone will also clear the passive state
and thus cancel the polling queue which leads the passive cool
On 11/05/2018 05:34 PM, Peter Zijlstra wrote:
On Fri, Nov 02, 2018 at 05:08:31PM +0800, Wei Wang wrote:
On 11/01/2018 10:52 PM, Peter Zijlstra wrote:
@@ -723,6 +724,9 @@ static void perf_sched_init(struct perf_sched *sched,
struct event_constraint **
sched->max_weight= w
On 11/05/2018 05:34 PM, Peter Zijlstra wrote:
On Fri, Nov 02, 2018 at 05:08:31PM +0800, Wei Wang wrote:
On 11/01/2018 10:52 PM, Peter Zijlstra wrote:
@@ -723,6 +724,9 @@ static void perf_sched_init(struct perf_sched *sched,
struct event_constraint **
sched->max_weight= w
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