message-signaled interrupts. For this to work on Linux, we need to
> > > enable PCI_MSI_IRQ_DOMAIN and define struct msi_alloc_info. Support
> > > for the latter is enabled by including the architecture-generic msi.h
> > > include.
> > >
> > > Based on a
On Mon, Oct 15, 2018 at 3:57 PM Atish Patra wrote:
> >> +SiFive PWM controller
> >> +
> >> +Unlike most other PWM controllers, the SiFive PWM controller currently
> >> only
> >> +supports one period for all channels in the PWM. This is set globally in
> >> DTS.
> >> +The period also has signific
On Mon, Apr 30, 2018 at 1:27 AM, Thierry Reding
wrote:
> I don't like the idea of specifying something in DT that is completely
> approximate because it doesn't give users any kind of control over what
> is considered acceptable. In some cases an approximation to within 10%
> might be acceptable,
First of all, thank you very much for this detailed review! I really
appreciate it, as this is just the first driver of several we would
like to upstream and getting the reviews front-loaded like this will
really help us improve the subsequent drivers before trying to
upstream them.
On Mon, Apr 30
On Sun, Apr 29, 2018 at 2:01 PM, Andreas Färber wrote:
> "pwm0" sounds like a zero-indexed instance of some pwm block. If 0 is
> the version here, I'd suggest to make it "pwm-0" for example - you might
> want to take a look at the Xilinx bindings, which use a strict x.yy suffix.
That's fine. I'll
On Sat, Apr 28, 2018 at 10:54 PM, Thierry Reding
wrote:
> On Fri, Apr 27, 2018 at 03:59:56PM -0700, Wesley W. Terpstra wrote:
>> +Unlike most other PWM controllers, the SiFive PWM controller currently only
>> +supports one period for all channels in the PWM. This is set globally in
>> DTS.
>> +Th
Ugh. Clicked reply without being done writing the reply!
On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote:
> Edge vs level, active high vs active low. Typically some of these are
> programmable, and are described as flags in the interrupt-specifier.
>
> See the examples in:
>
> Documentation/de
On Thu, Jun 8, 2017 at 3:52 AM, Mark Rutland wrote:
>> What flags?
>
> Edge vs level, active high vs active low. Typically some of these are
> programmable, and are described as flags in the interrupt-specifier.
>
> See the examples in:
>
> Documentation/devicetree/bindings/interrupt-controller/in
I've reread the relevant sections now, and you are correct. We should
remove the address-cells from the PLIC's dts.
On Wed, Jun 7, 2017 at 12:57 PM, Rob Herring wrote:
> On Wed, Jun 7, 2017 at 1:57 PM, Wesley Terpstra wrote:
>> On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wr
On Wed, Jun 7, 2017 at 2:24 AM, Marc Zyngier wrote:
> This is a common problem with the current OF code that numbers INTx from
> 1 instead of zero (there is no 5th legacy interrupts in the PCI spec,
> despite what $SUBJECT says). I'd be inclined to fix this at the core
> level rather than papering
On Wed, Jun 7, 2017 at 3:13 AM, Mark Rutland wrote:
>> > +RISC-V Hart-Level Interrupt Controller (HLIC)
>> > +-
>> > +
>> > +RISC-V cores include Control Status Registers (CSRs) which are local to
>> > each
>> > +hart and can be read or written by softw
It was a while ago that I debugged this. I already reported this bug
to Benjamin Herrenschmidt (now in CC), and I believe he has a patch of
his own to fix the same issue.
As I understand it, of_core_init sets up the OF entries in
/sys/firmware/devicetree. During platform bringup, when the system
d
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