Add support for octo mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file
Add octo read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTO_READ
Add flags for Octo mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTO: transmit with 8 wires
SPI_RX_OCTO: receive with 8 wires
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
-
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
-
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e.
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e.
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Friday, November 16, 2018 3:12 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Friday, November 16, 2018 3:12 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Boris,
Please apply this patch series [1] in the coming release.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, October 23, 2018 3:31 PM
> To: 'Boris Brez
Hi Boris,
Please apply this patch series [1] in the coming release.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, October 23, 2018 3:31 PM
> To: 'Boris Brez
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, November 15, 2018 7:32 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, November 15, 2018 7:32 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Frieder,
With below patch on top of your v5, Read/Write/Erase on CS1 is working fine for
me.
I have tested with JFFS2 mounting and booting also for both CS0 and CS1.
diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
index ce45e8e..4467983 100644
---
Hi Frieder,
With below patch on top of your v5, Read/Write/Erase on CS1 is working fine for
me.
I have tested with JFFS2 mounting and booting also for both CS0 and CS1.
diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
index ce45e8e..4467983 100644
---
Hi Frieder,
[..]
> >
> > Ok, I will have a look at what could make the chip selection fail in
> > case of AHB read.
>
> Could you try with this change applied:
>
> @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct
> spi_device *spi)
>
Hi Frieder,
[..]
> >
> > Ok, I will have a look at what could make the chip selection fail in
> > case of AHB read.
>
> Could you try with this change applied:
>
> @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct
> spi_device *spi)
>
d.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
> controller
>
&g
d.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
> controller
>
&g
Hi,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, November 13, 2018 1:53 PM
> To: 'Frieder Schrempf' ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org
> Cc: dw...@infradead.org; computersforpe...@
Hi,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, November 13, 2018 1:53 PM
> To: 'Frieder Schrempf' ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org
> Cc: dw...@infradead.org; computersforpe...@
forpe...@gmail.com;
> marek.va...@gmail.com; rich...@nod.at; miquel.ray...@bootlin.com;
> broo...@kernel.org; David Wolfe ; Fabio Estevam
> ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; Han Xu ;
> shawn...@kernel.org; Frieder Schrempf ; linux-
> ker...@vger.kernel.org
> S
forpe...@gmail.com;
> marek.va...@gmail.com; rich...@nod.at; miquel.ray...@bootlin.com;
> broo...@kernel.org; David Wolfe ; Fabio Estevam
> ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; Han Xu ;
> shawn...@kernel.org; Frieder Schrempf ; linux-
> ker...@vger.kernel.org
> S
Hi Frieder,
Thanks for review.
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, November 7, 2018 9:52 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gm
Hi Frieder,
Thanks for review.
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, November 7, 2018 9:52 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gm
Hi Huijin,
I guess this is the v2 of previously send patch [1], please follow version
information in patch submission.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/patch/961197/
> -Original Message-
> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf
Hi Huijin,
I guess this is the v2 of previously send patch [1], please follow version
information in patch submission.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/patch/961197/
> -Original Message-
> From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf
.at
> Cc: linux-...@lists.infradead.org; linux-kernel@vger.kernel.org; Yogesh
> Narayan Gaur ; cyrille.pitc...@wedev4u.fr;
> tudor.amba...@microchip.com
> Subject: [PATCH v2 1/5] mtd: spi-nor: don't drop sfdp data if optional
> parsers fail
>
> JESD216C states that just the Basic Flash Par
.at
> Cc: linux-...@lists.infradead.org; linux-kernel@vger.kernel.org; Yogesh
> Narayan Gaur ; cyrille.pitc...@wedev4u.fr;
> tudor.amba...@microchip.com
> Subject: [PATCH v2 1/5] mtd: spi-nor: don't drop sfdp data if optional
> parsers fail
>
> JESD216C states that just the Basic Flash Par
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 3:27 PM
> To: Yogesh Narayan Gaur
> Cc: Mark Brown ; Tudor Ambarus
> ; linux-...@lists.infradead.org; linux-
> s...@vger.kernel.org;
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 3:27 PM
> To: Yogesh Narayan Gaur
> Cc: Mark Brown ; Tudor Ambarus
> ; linux-...@lists.infradead.org; linux-
> s...@vger.kernel.org;
Hi,
Did we have have any comments or remarks about this patch-series, if not
please apply.
Both patches in the series been reviewed by Tudor.
--
Regards
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Friday, October 12, 2018 12:02 PM
> To: 'Bor
Hi,
Did we have have any comments or remarks about this patch-series, if not
please apply.
Both patches in the series been reviewed by Tudor.
--
Regards
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Friday, October 12, 2018 12:02 PM
> To: 'Bor
Add support for octo mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octo mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem
Add octo mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2
Add support for octo mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octo mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem
Add octo mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- None
Changes for v2:
- None
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- None
Changes for v2:
- None
Add support for octo mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Add support for octo mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Add flags for Octo mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTO: transmit with 8 wires
SPI_RX_OCTO: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string
Add octo read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTO_READ
Add support for octo mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octo transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Incorporated review comments of Boris.
Add octo read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTO_READ
Add support for octo mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octo transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Incorporated review comments of Boris.
Add flags for Octo mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTO: transmit with 8 wires
SPI_RX_OCTO: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
Changes for v3:
- Modified string
- Add opcodes for octo I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octo read commands.
Signed-off-by: Vignesh R
- Add opcodes for octo I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octo read commands.
Signed-off-by: Vignesh R
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:40 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:40 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:37 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com;
> broo...@kernel.org; linux-...@vger.k
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:37 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com;
> broo...@kernel.org; linux-...@vger.k
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:31 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:31 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:18 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 2:18 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
-
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d5eeff..2696898 100644
--- a/MAINTAINERS
+++
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e.
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d5eeff..2696898 100644
--- a/MAINTAINERS
+++
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e.
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
-
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 11:10 AM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 11:10 AM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:22 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:22 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:20 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; devicet...@vger.kernel.org
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:20 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; devicet...@vger.kernel.org
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:13 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:13 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
+ Mark Brown
Complete patch series[1]
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70210
--
Regards,
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur [mailto:yogeshnarayan.g...@nxp.com]
> Sent: Thursday, October 11, 2018 4:30 PM
&g
+ Mark Brown
Complete patch series[1]
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70210
--
Regards,
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur [mailto:yogeshnarayan.g...@nxp.com]
> Sent: Thursday, October 11, 2018 4:30 PM
&g
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 4:23 PM
> To: Yogesh Narayan Gaur ;
> cristian.bir...@microchip.com
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 4:23 PM
> To: Yogesh Narayan Gaur ;
> cristian.bir...@microchip.com
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.ker
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:57 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:57 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:41 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:41 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 2:46 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@mi
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 2:46 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@mi
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 1:32 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmai
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 1:32 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmai
Hi Boris, Tudor,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, October 17, 2018 3:23 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; comput
Hi Boris, Tudor,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, October 17, 2018 3:23 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; comput
Hi Tudor,
> -Original Message-
> From: Tudor Ambarus [mailto:tudor.amba...@microchip.com]
> Sent: Wednesday, October 17, 2018 1:31 PM
> To: Yogesh Narayan Gaur ; Boris Brezillon
>
> Cc: Cyrille Pitchen ; marek.va...@gmail.com;
> dw...@infradead.org; computersfor
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