From: Tang Yuantian
This snip code is not needed anymore since its user
get_hard_smp_processor_id() has been removed.
Signed-off-by: Tang Yuantian
---
drivers/cpufreq/qoriq-cpufreq.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-
From: Tang Yuantian
ls1012a has separate input root clocks for core PLLs versus the
platform PLL, with the latter described as sysclk in the hw docs.
If a second input clock, named "coreclk", is present, this clock will be
used for the core PLLs.
Signed-off-by: Scott Wood
Signed-off-by: Tang Yu
From: Tang Yuantian
ls1012a has separate input root clocks for core PLLs versus the platform
PLL, with the latter described as sysclk in the hw docs.
Update the qoriq-clock binding to allow a second input clock, named
"coreclk". If present, this clock will be used for the core PLLs.
Signed-off-
From: Tang Yuantian
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for the cpu clock.
This is necessary n
From: Tang Yuantian
Add arm64 config to Kconfig to enable cpu frequency feature on
nxp arm64 socs.
Signed-off-by: Tang Yuantian
---
v2-v4: no change
drivers/cpufreq/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
in
From: Tang Yuantian
Add arm64 config to Kconfig to enable cpu frequency feature on
nxp arm64 socs.
Signed-off-by: Tang Yuantian
---
v3: no change
v2: no change
drivers/cpufreq/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq
From: Tang Yuantian
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for the cpu clock.
This is necessary n
From: Tang Yuantian
Add arm64 config to Kconfig to enable cpu frequency feature on
nxp arm64 socs.
Signed-off-by: Tang Yuantian
---
v2:
- no change
drivers/cpufreq/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
i
From: Tang Yuantian
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for the cpu clock.
This is necessary n
From: Tang Yuantian
Enable DMA coherence in SATA controller on condition that
dma-coherent property exists in sata node in DTS.
Signed-off-by: Tang Yuantian
---
v2:
- use of_dma_is_coherent() instead of open-coding.
drivers/ata/ahci_qoriq.c | 15 +++
1 file changed, 11 insertion
From: Tang Yuantian
For ls1021a, and armv8 chasis 2 socs, sata ecc must be disabled.
If ecc register is not found in sata node in dts, report error.
This is a chip erratum described as bellow:
The Read DMA operations get early termination indication from the
controller. This issue is observed as
From: Tang Yuantian
Ls2088a is new introduced arm-based soc with sata support with
following features:
1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
specification
2. Contains a high-speed descriptor-based DMA controller
3. Supports the following:
a. Speeds of 1.5 Gb/s
From: Tang Yuantian
Ls2088a is new introduced arm-based soc with sata support with
following features:
1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
specification
2. Contains a high-speed descriptor-based DMA controller
3. Supports the following:
a. Speeds of 1.5 Gb/s
From: Tang Yuantian
Signed-off-by: Tang Yuantian
---
v3:
- rebased to latest kernel and re-sorted the code
v2:
- remove commit message as it is duplicated to title
drivers/clk/clk-qoriq.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/driv
From: Tang Yuantian
Signed-off-by: Tang Yuantian
---
v2:
- remove commit message as it is duplicated to title
drivers/clk/clk-qoriq.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1bece0f..65c21d7 100644
--- a
From: Tang Yuantian
On ls1046a soc, sata ecc should be disabled. So added sata ecc
register address so that driver can get this information.
Signed-off-by: Tang Yuantian
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/ar
From: Tang Yuantian
Added explanation for reg-names to make it more clear.
Signed-off-by: Tang Yuantian
---
Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
b/Documentation/d
From: Tang Yuantian
Added ls1012a clock configuation information.
Signed-off-by: Tang Yuantian
---
drivers/clk/clk-qoriq.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1bece0f..563d874 100644
--- a/drivers/clk/
From: Tang Yuantian
For ls1021a and ls1046a socs, sata ecc must be disabled.
If ecc register is not found in sata node in dts, report
a warning.
Signed-off-by: Tang Yuantian
---
drivers/ata/ahci_qoriq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/at
From: Tang Yuantian
Enable DMA coherence in SATA controller on condition that
dma-coherent property exists in sata node in DTS.
Signed-off-by: Tang Yuantian
---
drivers/ata/ahci_qoriq.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.
From: Tang Yuantian
Ls1046a is a new introduced soc which supports ATA3.0.
Signed-off-by: Tang Yuantian
---
drivers/ata/ahci_qoriq.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index 1eba8df..9884c8c
From: Tang Yuantian
The offset of Core Cluster clock control/status register
on cluster group V3 version is different from others, and
should be plus 0x7.
Signed-off-by: Tang Yuantian
---
drivers/clk/clk-qoriq.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drive
From: Tang Yuantian
ls1021a CPU can work on three different clock frequency.
Currently, the third one is missing. This patch added it.
Signed-off-by: Tang Yuantian
---
drivers/clk/clk-qoriq.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-qoriq.c
From: Tang Yuantian
Updated the registers' values to enhance SATA performance and
reliability on ls1021a soc.
Signed-off-by: Tang Yuantian
---
drivers/ata/ahci_qoriq.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/driv
From: Tang Yuantian
The PTC[RXWM] sets the watermark value for Rx FIFO. The default
value 0x20 might be insufficient for some hard drives. If the
watermark value is too small, a single-cycle overflow may occur
and is reported as a CRC or internal error in the PxSERR register.
Updated the value to
From: Tang Yuantian
Updated the registers' values to enhance SATA performance and
reliability.
Signed-off-by: Tang Yuantian
---
drivers/ata/ahci_qoriq.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index d0f9de9..4d613f8 100644
From: Tang Yuantian
kbuild test robot reports the warnings:
drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_hardreset':
>> include/asm-generic/io.h:163:2: warning: 'px_is' may be used
>> uninitialized in this function [-Wuninitialized]
drivers/ata/ahci_qoriq.c:70:14: note: 'px_is' was declared
From: Tang Yuantian
kbuild test robot reports the warnings:
drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_hardreset':
>> include/asm-generic/io.h:163:2: warning: 'px_is' may be used
>> uninitialized in this function [-Wuninitialized]
drivers/ata/ahci_qoriq.c:70:14: note: 'px_is' was declared
From: Tang Yuantian
kbuild test robot reports the warnings:
drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_hardreset':
>> include/asm-generic/io.h:163:2: warning: 'px_is' may be used
>> uninitialized in this function [-Wuninitialized]
drivers/ata/ahci_qoriq.c:70:14: note: 'px_is' was declared
From: Tang Yuantian
This reverts commit 5163fb62541e
("ahci: added support for Freescale AHCI sata")
The reverted patch added Freescale QorIQ AHCI sata support to
ahci_platform driver though, but it left SoC specific settings to uboot.
It leads to QorIQ sata heavily depending on uboot. In order
From: Tang Yuantian
Currently Freescale QorIQ series SATA is supported by ahci_platform
driver. Some SoC specific settings have been put in uboot. So whether
SATA works or not heavily depends on uboot.
This patch will add a new driver to support QorIQ sata which removes
the dependency on any othe
From: Tang Yuantian
adds bindings for Freescale QorIQ AHCI SATA controller.
Signed-off-by: Tang Yuantian
---
.../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/ahci-fsl-qoriq
From: Tang Yuantian
Currently Freescale QorIQ series SATA is supported by ahci_platform
driver. Some SoC specific settings have been put in uboot. So whether
SATA works or not heavily depends on uboot.
This patch will add a new driver to support QorIQ sata which removes
the dependency on any othe
From: Tang Yuantian
Added SATA device node and enabled AHCI config by default.
Signed-off-by: Shaohui Xie
Signed-off-by: Tang Yuantian
---
depends on patch:
https://patchwork.kernel.org/patch/6851311/
arch/arm/boot/dts/ls1021a.dtsi | 7 +++
arch/arm/configs/ls1021a_defconfig | 2 ++
From: Tang Yuantian
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.
The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.
S
From: Tang Yuantian
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.
The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.
S
From: Tang Yuantian
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.
The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.
S
From: Tang Yuantian
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback functi
From: Tang Yuantian
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback functi
From: Tang Yuantian
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback functi
From: Tang Yuantian
Call of_node_put() only when the out_args is NULL on success,
or the node's reference count will not be correct because the caller
will call of_node_put() again.
Signed-off-by: Tang Yuantian
---
v2:
- modified the title and description. the 1st patch title is:
From: Tang Yuantian
This adds the clock driver for Freescale PowerPC corenet
series SoCs using common clock infrastructure.
Signed-off-by: Tang Yuantian
Signed-off-by: Li Yang
---
v3:
- remove the module author and description
v2:
- add the document for device tree clock bindin
From: Tang Yuantian
The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040
Signed-off-by: Tang Yuantian
Signed-off-by: Li Yang
---
* resend for review
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 62 -
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 4 ++
ar
From: Tang Yuantian
Add cpufreq driver for Freescale e500mc, e5500 and e6500 SoCs
which are capable of changing the CPU frequency dynamically
Signed-off-by: Tang Yuantian
Signed-off-by: Li Yang
---
v4:
- rebase on bleeding-edge branch of Rafael's linux-pm.git
- #define pr_fmt(
From: Tang Yuantian
As the function itself says it is caller's responsibility to call the
of_node_put(). So, remove it on success to keep the reference count
correct.
Signed-off-by: Tang Yuantian
---
drivers/of/base.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/of/base.c b/d
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