On 2015/5/8 10:29, Yun Wu (Abel) wrote:
> Hi Gerry,
> On 2015/5/4 11:15, Jiang Liu wrote:
>
>> NUMA node information is per-irq instead of per-irqchip, so move it into
>> struct irq_common_data.
>>
>> Signed-off-by: Jiang Liu
>> ---
>> arch/sh
On 2015/5/4 11:15, Jiang Liu wrote:
[...]
> diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
> index dd1109fb241e..3010e99abf3e 100644
> --- a/include/linux/irqdesc.h
> +++ b/include/linux/irqdesc.h
> @@ -47,6 +47,7 @@ struct pt_regs;
> * @name:flow handler name for /pr
Hi Gerry,
On 2015/5/4 11:15, Jiang Liu wrote:
> NUMA node information is per-irq instead of per-irqchip, so move it into
> struct irq_common_data.
>
> Signed-off-by: Jiang Liu
> ---
> arch/sh/kernel/irq.c |2 +-
> arch/x86/kernel/apic/vector.c |8
> arch/x86/platform/u
This patch series only contains minor fixes for setting affinity of
MSI interrupts.
Based on:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
Yun Wu (2):
genirq: use proper interface
genirq: use sensible function name
include/linux/msi.h | 4 ++--
kernel/irq/msi.c| 9
It's easier to accept the name of msi_chip_set_affinity() than
msi_domain_set_affinity(), since function of setting interrupt
affinity is actually provided by IRQ chips.
Signed-off-by: Yun Wu
---
include/linux/msi.h | 4 ++--
kernel/irq/msi.c| 6 +++---
2 files changed, 5 insertions(
An interface provided by kernel/irq/chip.c is designed to do the
same thing, so just use it.
Signed-off-by: Yun Wu
---
kernel/irq/msi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 3e18163..b773708 100644
--- a/kernel/irq/msi.c
default granule for all the
ITS base tables.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 69eeea3..f5bfa42 100644
o guarantees a safe quiescent status before initializing an ITS as
Marc suggested, rather than register a reboot notifier
o fix an issue about the enabling status of LPI feature
Yun Wu (5):
irqchip: gicv3-its: zero itt before handling to hardware
irqchip: gicv3-its: use 64KB page as defaul
to be zeroed before being handled to
hardware, we do the favor in ITS driver.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
n explicit warning.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index f5bfa42..e8bda0b 100644
--- a/drivers/irqchip/irq-gic-v3-i
Define macros for GITS_CTLR fields to avoid using magic numbers.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
include/linux/irqchip/arm-gic-v3.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3
It's unsafe to change the configurations of an activated ITS directly
since this will lead to unpredictable results. This patch guarantees
the ITSes being initialized are quiescent.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c
On 2015/3/5 20:12, Marc Zyngier wrote:
> On 04/03/15 03:18, Yun Wu wrote:
>> This patch series makes some enhancement to ITS configuration in the
>> following aspects:
>>
>> o make allocation of the ITS tables more sensible
>> o replace magic numbers with sensi
On 2015/3/5 20:05, Marc Zyngier wrote:
> On 04/03/15 03:18, Yun Wu wrote:
>> It's unsafe to change the configurations of an activated ITS directly
>> since this will lead to unpredictable results. This patch guarantees
>> the ITSes being initialized are quiescent.
&
Define macros for GITS_CTLR fields to avoid using magic numbers.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
include/linux/irqchip/arm-gic-v3.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq
to be zeroed before being handled to
hardware, we do the favor in ITS driver.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
n explicit warning.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index f5bfa42..e8bda0b 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/
It's unsafe to change the configurations of an activated ITS directly
since this will lead to unpredictable results. This patch guarantees
the ITSes being initialized are quiescent.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 35 +++
1
default granule for all the
ITS base tables.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 69eeea3..f5bfa42 100644
ng status of LPI feature
Yun Wu (5):
irqchip: gicv3-its: zero itt before handling to hardware
irqchip: gicv3-its: use 64KB page as default granule
irqchip: gicv3-its: add limitation to page order
irqchip: gicv3-its: define macros for GITS_CTLR fields
irqchip: gicv3-its: support saf
On 2015/2/17 20:27, Yun Wu (Abel) wrote:
> On 2015/2/17 19:11, Marc Zyngier wrote:
>
>> On Tue, 17 Feb 2015 10:15:15 +0000
>> "Yun Wu (Abel)" wrote:
>>
>>> On 2015/2/17 17:29, Marc Zyngier wrote:
>>>
>>>> On Sun, 15 Feb 2015 09:
On 2015/2/17 19:11, Marc Zyngier wrote:
> On Tue, 17 Feb 2015 10:15:15 +
> "Yun Wu (Abel)" wrote:
>
>> On 2015/2/17 17:29, Marc Zyngier wrote:
>>
>>> On Sun, 15 Feb 2015 09:32:02 +
>>> Yun Wu wrote:
>>>
>>>> It&#
On 2015/2/17 17:29, Marc Zyngier wrote:
> On Sun, 15 Feb 2015 09:32:02 +
> Yun Wu wrote:
>
>> It's unsafe to change the configurations of an activated ITS directly
>> since this will lead to unpredictable results. This patch guarantees
>> a safe quiescent s
On 2015/2/17 17:19, Marc Zyngier wrote:
> On Sun, 15 Feb 2015 09:32:00 +
> Yun Wu wrote:
>
>> When required DT size is out of the kmalloc()'s capability, the whole
>
> Nit: Using the DT acronym is very confusing here, as it means "Device
> Tree" t
Hi Murzin,
On 2015/2/16 18:05, Vladimir Murzin wrote:
> Hi Yun,
>
> On 15/02/15 09:32, Yun Wu wrote:
>> There is one more condition that needs to be considered when judging
>> whether LPI feature is enabled or not, which is whether there is any
>> ITS available and co
default granule for all the
ITS base tables.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 69eeea3..f5bfa42 100644
--- a/drivers/irqchip/irq
It's unsafe to change the configurations of an activated ITS directly
since this will lead to unpredictable results. This patch guarantees
a safe quiescent status before initializing an ITS.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 32
1
to be zeroed before being handled to
hardware, we do the favor in ITS driver.
Acked-by: Marc Zyngier
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
There is one more condition that needs to be considered when judging
whether LPI feature is enabled or not, which is whether there is any
ITS available and correctly enabled.
This patch will fix this by caching ITS enabling status in the GIC
chip data structure.
Signed-off-by: Yun Wu
guarantees a safe quiescent status before initializing an ITS as
Marc suggested, rather than register a reboot notifier
o fix an issue about the enabling status of LPI feature
Yun Wu (6):
irqchip: gicv3-its: zero itt before handling to hardware
irqchip: gicv3-its: use 64KB page as default gran
g.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index f5bfa42..de36606 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
Define macros for GITS_CTLR fields to avoid using magic numbers.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
include/linux/irqchip/arm-gic-v3.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq
On 2015/1/31 3:10, Marc Zyngier wrote:
> On 30/01/15 07:46, Yun Wu wrote:
>> A hardware implementation may be designed to search the device
>> table (DT) using a direct mapping between device ID and memory
>> address, and in this scenario a single page, currently allocated
&g
On 2015/1/31 3:23, Marc Zyngier wrote:
> On 30/01/15 07:46, Yun Wu wrote:
>> Configurations of an ITS cannot be changed if the ITS is in an
>> active status, so it might not be safe to perform a soft reboot
>> with all the active ITSes un-disabled, etc. kexec.
>>
>&
On 2015/1/31 3:18, Marc Zyngier wrote:
> On 30/01/15 07:46, Yun Wu wrote:
>> The field of page size in register GITS_BASERn might be read-only
>> if an implementation only supports a single, fixed page size. But
>> currently the ITS driver will throw out an error when PAGE
hardware.
Yun Wu (5):
irqchip: gicv3-its: allocate proper size for DT
irqchip: gicv3-its: zero itt before handling to hardware
irqchip: gicv3-its: use 64KB page as default granule
irqchip: gicv3-its: define macros for GITS_CTLR fields
irqchip: gicv3-its: add support for power down
default granule for all the
ITS base tables.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 2a08d85..430bc92 100644
--- a/drivers/irqchip/irq
to be zeroed before being handled to
hardware, we do the favor in ITS driver.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index a391417..2a08d85
Define macros for GITS_CTLR fields to avoid using magic numbers.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
include/linux/irqchip/arm-gic-v3.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq
enlarging DT
size with a limitation of MAX_ORDER pages.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index d8996bd..a391417
.
Signed-off-by: Yun Wu
---
drivers/irqchip/irq-gic-v3-its.c | 59
1 file changed, 59 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index facf6d6..1d85471 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b
On 2015/1/9 1:06, Marc Zyngier wrote:
> In order to populate the PHB msi_domain, use the "msi-parent"
> attribute to lookup a corresponding irq domain. If found,
> this is our MSI domain.
>
> This gets plugged into the core PCI code.
>
Hi Marc,
Since the whole patch series based on the fact th
On 2014/12/10 18:25, Thomas Gleixner wrote:
> On Wed, 10 Dec 2014, Yun Wu (Abel) wrote:
>> On 2014/11/19 19:11, Thomas Gleixner wrote:
>> I spent last two weeks implementing and testing my original idea about making
>> the sub domains generic, based on stacked domain featu
On 2014/11/19 17:20, Marc Zyngier wrote:
> On Wed, Nov 19 2014 at 6:57:25 am GMT, "Yun Wu (Abel)"
> wrote:
>> On 2014/11/18 22:32, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>
>>> Can you please trim th
On 2014/11/19 19:11, Thomas Gleixner wrote:
> On Wed, 19 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/19 1:21, Marc Zyngier wrote:
>>> This is why the framework gives you the opportunity to provide methods
>>> that:
>>> - compose the message
>>> - pro
On 2014/11/24 22:35, Marc Zyngier wrote:
[...]
> +static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd,
> + struct its_cmd_desc *desc)
> +{
> + unsigned long itt_addr;
> + u8 size = order_base_2(desc->its_mapd_cmd.dev->nr_
Hi Marc,
On 2014/11/24 22:35, Marc Zyngier wrote:
> Now, the bit of code that allow us to use the ITS as a MSI controller.
> Both MSI and MSI-X are supported.
>
> Signed-off-by: Marc Zyngier
> ---
> drivers/irqchip/irq-gic-v3-its.c | 176
> +
> include/lin
On 2014/11/24 22:32, Thomas Gleixner wrote:
> On Mon, 24 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/24 21:13, Thomas Gleixner wrote:
>>> In the hierarchical case we do not touch the hardware in the
>>> allocation step, so we need to activate the allocated interrupt in
On 2014/11/24 22:33, Jiang Liu wrote:
> On 2014/11/24 22:19, Yun Wu (Abel) wrote:
>> On 2014/11/24 22:11, Jiang Liu wrote:
>>
>>> On 2014/11/24 22:01, Yun Wu (Abel) wrote:
>>>> On 2014/11/24 21:13, Thomas Gleixner wrote:
>>>>
>>>>> On
On 2014/11/24 22:11, Jiang Liu wrote:
> On 2014/11/24 22:01, Yun Wu (Abel) wrote:
>> On 2014/11/24 21:13, Thomas Gleixner wrote:
>>
>>> On Mon, 24 Nov 2014, Yun Wu (Abel) wrote:
>>>> Hi Thomas, Jiang,
>>>> On 2014/11/12 21:42, T
On 2014/11/24 21:13, Thomas Gleixner wrote:
> On Mon, 24 Nov 2014, Yun Wu (Abel) wrote:
>> Hi Thomas, Jiang,
>> On 2014/11/12 21:42, Thomas Gleixner wrote:
>>
>>> From: Jiang Liu
>>>
>> [...]
>>> /* Number of irqs reserved for a legac
Hi Thomas, Jiang,
On 2014/11/12 21:42, Thomas Gleixner wrote:
> From: Jiang Liu
>
[...]
> /* Number of irqs reserved for a legacy isa controller */
> #define NUM_ISA_INTERRUPTS 16
> @@ -64,6 +66,16 @@ struct irq_domain_ops {
> int (*xlate)(struct irq_domain *d, struct device_node *node
On 2014/11/18 22:32, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>
> Can you please trim the messages when you're replying?
>
>> The above you described is absolutely right, but not the things I want
>> to know. :)
>> Take GICv3 ITS for
On 2014/11/18 22:52, Jiang Liu wrote:
> On 2014/11/18 22:34, Yun Wu (Abel) wrote:
>> On 2014/11/18 22:19, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 21:43, Jiang Liu wrote:
>>>>> We provid
On 2014/11/19 1:21, Marc Zyngier wrote:
> On Tue, Nov 18 2014 at 2:34:44 pm GMT, "Yun Wu (Abel)"
> wrote:
>> On 2014/11/18 22:19, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 21:43, Jiang Liu wrote
On 2014/11/19 1:14, Marc Zyngier wrote:
> On Tue, Nov 18 2014 at 2:46:02 pm GMT, "Yun Wu (Abel)"
> wrote:
[...]
>> IIUC, Marc's patch now only supports PCI MSI/MSI-X...
>
> Indeed, and the current solution makes is relatively easy to plug in
> non-PCI M
On 2014/11/18 22:29, Jiang Liu wrote:
>
>
> On 2014/11/18 22:22, Yun Wu (Abel) wrote:
>> On 2014/11/18 22:03, Jiang Liu wrote:
>>
>>> On 2014/11/18 21:52, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 21:43, Jiang Liu wrote:
>>>>
>>>>&
On 2014/11/18 22:19, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/18 21:43, Jiang Liu wrote:
>>> We provide an irq_chip for each type of interrupt controller
>>> instead of devices. For the example mentioned above, if device A
&g
On 2014/11/18 22:24, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/18 20:49, Jiang Liu wrote:
>>>>> + ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
>>>>> + if (ret < 0)
>>>>> +
On 2014/11/18 22:03, Jiang Liu wrote:
> On 2014/11/18 21:52, Yun Wu (Abel) wrote:
>> On 2014/11/18 21:43, Jiang Liu wrote:
>>
>>> On 2014/11/18 21:33, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 18:19, Thomas Gleixner wrote:
>>>>
>>>>> On
On 2014/11/18 21:55, Jiang Liu wrote:
> On 2014/11/18 21:48, Yun Wu (Abel) wrote:
>> On 2014/11/18 21:25, Jiang Liu wrote:
>>
>>> On 2014/11/18 21:16, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 20:43, Jiang Liu wrote:
>>>>
>>>>> On 20
On 2014/11/18 20:49, Jiang Liu wrote:
>
> On 2014/11/18 20:07, Yun Wu (Abel) wrote:
>> On 2014/11/12 21:43, Thomas Gleixner wrote:
>>
>>> From: Jiang Liu
>
>>> +static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
>>> +
On 2014/11/18 21:43, Jiang Liu wrote:
> On 2014/11/18 21:33, Yun Wu (Abel) wrote:
>> On 2014/11/18 18:19, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>> On 2014/11/12 21:43, Thomas Gleixner wrote:
>>>>> struct i
On 2014/11/18 21:25, Jiang Liu wrote:
> On 2014/11/18 21:16, Yun Wu (Abel) wrote:
>> On 2014/11/18 20:43, Jiang Liu wrote:
>>
>>> On 2014/11/18 19:47, Yun Wu (Abel) wrote:
>>>> On 2014/11/18 18:02, Thomas Gleixner wrote:
>>>>
>>>>> On
On 2014/11/18 18:19, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/12 21:43, Thomas Gleixner wrote:
>>> struct irq_chip {
>>> @@ -359,6 +360,7 @@ struct irq_chip {
>>> void(*irq_release_resources)(struct
On 2014/11/18 20:38, Jiang Liu wrote:
> On 2014/11/18 19:47, Yun Wu (Abel) wrote:
>> On 2014/11/18 18:03, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>
>>>> Hi Thomas, Jiang,
>>>> On 2014/11/12
On 2014/11/18 20:43, Jiang Liu wrote:
> On 2014/11/18 19:47, Yun Wu (Abel) wrote:
>> On 2014/11/18 18:02, Thomas Gleixner wrote:
>>
>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>> On 2014/11/12 21:42, Thomas Gleixner wrote:
>>>>> +int irq
On 2014/11/12 21:43, Thomas Gleixner wrote:
> From: Jiang Liu
>
> Implement the basic functions for MSI interrupt support with
> hierarchical interrupt domains.
>
> [ tglx: Extracted and combined from several patches ]
>
> Signed-off-by: Jiang Liu
> Cc: Bjorn Helgaas
> Cc: Grant Likely
> Cc
On 2014/11/18 17:54, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>> Hi Thomas, Jiang,
>> On 2014/11/12 21:42, Thomas Gleixner wrote:
>>
>>> From: Jiang Liu
&g
On 2014/11/18 18:03, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>
>> Hi Thomas, Jiang,
>> On 2014/11/12 21:43, Thomas Gleixner wrote:
>>
>>> From: Jiang Liu
>> [...]
>>> +void irq_domain_set_i
On 2014/11/18 18:02, Thomas Gleixner wrote:
> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>> On 2014/11/12 21:42, Thomas Gleixner wrote:
>>> +int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
>>> +{
>>> + struct irq
Hi Thomas, Jiang,
On 2014/11/12 21:43, Thomas Gleixner wrote:
> From: Jiang Liu
[...]
> +void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
> + irq_hw_number_t hwirq, struct irq_chip *chip,
> + void *chip_data, irq_flow_handler_t handl
Hi Thomas, Jiang,
On 2014/11/12 21:43, Thomas Gleixner wrote:
> From: Jiang Liu
>
> Introduce callback irq_chip.irq_write_msi_msg, so we can share common
> code among MSI alike interrupt controllers, such as HPET and DMAR.
>
> Signed-off-by: Jiang Liu
> Cc: Bjorn Helgaas
> Cc: Grant Likely
>
On 2014/11/12 21:42, Thomas Gleixner wrote:
> From: Jiang Liu
>
> Add callback irq_compose_msi_msg to struct irq_chip, which will be used
> to support stacked irqchip.
>
> Signed-off-by: Jiang Liu
> Cc: Bjorn Helgaas
> Cc: Grant Likely
> Cc: Marc Zyngier
> Cc: Yingjoe Chen
> Cc: Yijing Wan
Hi Thomas, Jiang,
On 2014/11/12 21:42, Thomas Gleixner wrote:
> From: Jiang Liu
> Index: tip/kernel/irq/chip.c
> ===
> --- tip.orig/kernel/irq/chip.c
> +++ tip/kernel/irq/chip.c
> @@ -15,6 +15,7 @@
> #include
> #include
> #inclu
Hi Thomas, Jiang,
I finally get some time on this, hopefully not too late...
In brief, I like the part of stacked domain, and have some opinions on
the part of refactoring MSI. Please check inline comments.
Regards,
Abel
On 2014/11/12 21:42, Thomas Gleixner wrote:
> This is an extract f
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