Re: [PATCH 0/2] hid: intel-ish-hid: ipc: enable OOB support for EHL

2021-01-04 Thread Zhang, Lixu
On Mon, Jan 04, 2021 at 08:01:36AM -0800, Srinivas Pandruvada wrote: > On Mon, 2021-01-04 at 16:12 +0100, Jiri Kosina wrote: > > On Wed, 16 Dec 2020, Zhang Lixu wrote: > > > > > The EHL (Elkhart Lake) based platforms provide a OOB (Out of band) > > > servic

[PATCH 1/2] hid: intel-ish-hid: ipc: finish power flow for EHL OOB

2020-12-15 Thread Zhang Lixu
-by: Najumon Ba Signed-off-by: Najumon Ba Signed-off-by: Even Xu Signed-off-by: Zhang Lixu --- drivers/hid/intel-ish-hid/ipc/pci-ish.c | 48 + 1 file changed, 48 insertions(+) diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c b/drivers/hid/intel-ish-hid/ipc/pci-ish.c

[PATCH 2/2] hid: intel-ish-hid: ipc: Address EHL Sx resume issues

2020-12-15 Thread Zhang Lixu
Signed-off-by: Even Xu Signed-off-by: Zhang Lixu --- drivers/hid/intel-ish-hid/ipc/hw-ish.h | 1 + drivers/hid/intel-ish-hid/ipc/ipc.c | 27 + drivers/hid/intel-ish-hid/ipc/pci-ish.c | 6 +- 3 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers

[PATCH 0/2] hid: intel-ish-hid: ipc: enable OOB support for EHL

2020-12-15 Thread Zhang Lixu
on both ISH platforms and EHL platforms, it works fine. Zhang Lixu (2): hid: intel-ish-hid: ipc: finish power flow for EHL OOB hid: intel-ish-hid: ipc: Address EHL Sx resume issues drivers/hid/intel-ish-hid/ipc/hw-ish.h | 1 + drivers/hid/intel-ish-hid/ipc/ipc.c | 27

[PATCH] hid: intel-ish-hid: fix wrong error handling in ishtp_cl_alloc_tx_ring()

2019-10-15 Thread Zhang Lixu
When allocating tx ring buffers failed, should free tx buffers, not rx buffers. Signed-off-by: Zhang Lixu Acked-by: Srinivas Pandruvada --- drivers/hid/intel-ish-hid/ishtp/client-buffers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hid/intel-ish-hid/ishtp

[PATCH v2 2/3] HID: intel-ish-hid: ipc: make ish suspend paths clear

2019-08-07 Thread Zhang Lixu
For suspend-to-idle, send suspend message and set N0_D3 flag to put the ISH into D0i3 state. For suspend-to-mem, disable the DMA bit before ISH entering D3, and NO_D3 flag is cleared by default, then the ISH would enter D3. Signed-off-by: Zhang Lixu --- drivers/hid/intel-ish-hid/ipc/pci-ish.c

[PATCH v2 1/3] HID: intel-ish-hid: ipc: set NO_D3 flag only when needed

2019-08-07 Thread Zhang Lixu
the DMA bit need be clear before putting ISH into D3 state. Signed-off-by: Zhang Lixu --- drivers/hid/intel-ish-hid/ipc/hw-ish.h | 1 + drivers/hid/intel-ish-hid/ipc/ipc.c | 2 +- drivers/hid/intel-ish-hid/ipc/pci-ish.c | 21 +++-- 3 files changed, 21 insertions(+), 3

[PATCH v2 0/3] HID: intel-ish-hid: support s2idle and s3 in ish_suspend()

2019-08-07 Thread Zhang Lixu
to-mem and suspend-to-idle. Changes from v1: * Fix the indentation issue * Elaborate the reason to remove the NO_D3 flag * Split the PATCH v1 to three changes, and try to minimize the lines change Zhang Lixu (3): HID: intel-ish-hid: ipc: set NO_D3 flag only when needed HID: intel-ish-hid: i

[PATCH v2 3/3] HID: intel-ish-hid: ipc: check the NO_D3 flag to distinguish resume paths

2019-08-07 Thread Zhang Lixu
The NO_D3 flag would be set if the ISH enter D0i3 in ish_suspend(), The resume paths can be distinguished by checking the NO_D3 flag. It's more reasonable than checking the FW status. Signed-off-by: Zhang Lixu --- drivers/hid/intel-ish-hid/ipc/pci-ish.c | 34 +++-- 1 file