I ran across a memory leak related to the cfq scheduler. The cfq
init function increments the refcnt of the associated request_queue.
This refcount gets decremented in cfq's exit function. Since blk_cleanup_queue
only calls the elevator exit function when its refcnt goes to zero, the
request_q nev
While fixing an oops in the st driver in a dirty release path,
I encountered an oops in cdev_put for cdevs allocated using
cdev_alloc. If cdev_del is called when the cdev kobject still
has an open user, when the last cdev_put is called, the cdev_put
will call kobject_put, which will end up ultimat
Currently, code exists in the pci layer to allow userspace to specify
driver data when adding a pci dynamic id from sysfs. However, this data
is never used and there exists no way in the existing code to use it.
This patch allows device drivers to indicate that they want driver data
passed to them
When working with a PCI-X Mode 2 adapter on a PCI-X Mode 1 PPC64
system, the current code used to determine the config space size
of a device results in a PCI Master abort and an EEH error, resulting
in the device being taken offline. This patch adds a ppc64
override to query OF to determine if th
When working with a PCI-X Mode 2 adapter on a PCI-X Mode 1 PPC64
system, the current code used to determine the config space size
of a device results in a PCI Master abort and an EEH error, resulting
in the device being taken offline. This patch adds the ability for
arch specific code to override
The IBM Citrine chipset has a feature that if PCI config register
0xA0 is read while DMAs are being performed to it, there is the possiblity
that the parity will be wrong on the PCI bus, causing a parity error and
a master abort. On this chipset, this register is simply a debug register
for the ch
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