Commit-ID: fe6daab1ee9dfe7f89974ee6c486cccb0f18a61d
Gitweb: https://git.kernel.org/tip/fe6daab1ee9dfe7f89974ee6c486cccb0f18a61d
Author: davidwang
AuthorDate: Mon, 22 Jan 2018 18:14:17 +0800
Committer: Thomas Gleixner
CommitDate: Wed, 24 Jan 2018 13:38:10 +0100
x86/centaur: Mark TSC
core entering C3 state is not
needed
too. Because the chipset will automatically do this operation.
Signed-off-by: davidwang
---
arch/x86/kernel/acpi/cstate.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index
kernel that the TSC is usable, so it will select it over HPET.
The effect of this is that reading time stamps (from kernel or user space)
will be faster and more efficent.
Signed-off-by: davidwang
---
arch/x86/kernel/cpu/centaur.c | 4
drivers/acpi/processor_idle.c | 1 +
2 files changed, 5
3 matches
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