[PATCH V1 2/2] pinctrl: qcom: spmi-gpio: Set is_enabled flag in set_mux()

2017-10-12 Thread fenglinw
From: Fenglin Wu The initial value of is_enabled flag is read out from hardware in pmic_gpio_populate(), and it will be set in pmic_gpio_config_set() if pinconf is defined. For any GPIOs disabled initially in hardware which only have pinmux defined, they won't be enabled in pmic_gpio_set_mux() ca

[PATCH V1 1/2] pinctrl: qcom: spmi-gpio: Read REG_EN_CTL to get initial enable state

2017-10-12 Thread fenglinw
From: Fenglin Wu Get initial value of is_enabled flag by reading REG_EN_CTL register so that it can reflect the correct hardware enable state before setting pin config. Signed-off-by: Fenglin Wu --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 9 +++-- 1 file changed, 7 insertions(+), 2 dele

[PATCH V1 0/2] *** Update is_enabled flag to be consistent ***

2017-10-12 Thread fenglinw
From: Fenglin Wu Currently, is_enabled flag is always set to true in pmic_gpio_populate() regardless of the hardware real time status. This is not correct and it gives the wrong information for the GPIOs which are disabled initially in hardware. Add two patches to fix this: One is set the is_enab

[PATCH V1] pinctrl: qcom: spmi-gpio: Update GPIO EN_CTL when setting pin config

2017-09-11 Thread fenglinw
From: Fenglin Wu GPIO is expected to be disabled iff PIN_CONFIG_BIAS_HIGH_IMPEDANCE is configured. Update is_enabled flag in config_set() so that it can reflect GPIO status correctly. Also modify EN_CTL register based on is_enabled flag in config_set() to configure the GPIO properly. Signed-off-

[PATCH V2] pinctrl: qcom: spmi-gpio: Correct power_source range check

2017-08-27 Thread fenglinw
From: Fenglin Wu Power source selection in DIG_VIN_CTL is indexed from 0, in the range check it shouldn't be equal to the total number of power sources. Signed-off-by: Fenglin Wu Acked-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 d

[PATCH V3 2/2] pinctrl: qcom: spmi-gpio: Add dtest route for digital input

2017-08-14 Thread fenglinw
From: Fenglin Wu Add property "qcom,dtest-buffer" to specify which dtest rail to feed when the pin is configured as a digital input. Signed-off-by: Fenglin Wu Acked-by: Rob Herring Acked-by: Bjorn Andersson --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 7 +++ drivers/pinctrl/qcom

[PATCH V3 1/2] pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype

2017-08-14 Thread fenglinw
From: Fenglin Wu GPIO LV (low voltage)/MV (medium voltage) subtypes have different features and register mappings than 4CH/8CH subtypes. Add support for LV and MV subtypes. Signed-off-by: Fenglin Wu Acked-by: Rob Herring Acked-by: Bjorn Andersson --- .../devicetree/bindings/pinctrl/qcom,pmic

[PATCH V3 0/2] Add LV/MV subtypes support for QCOM PMIC GPIOs

2017-08-14 Thread fenglinw
From: Fenglin Wu LV (low voltage) and MV (medium voltage) subtype GPIO modules are support in QCOM PMICs like PMI8998, PM660. These modules support addtional features (func3, func4, analog-pass-through mode) and the register mappings are also different compared with legacy 4CH/8CH subtypes. Thes

[PATCH V1] pinctrl: qcom: spmi-gpio: Add support for qcom,gpios-disallowed property

2017-07-19 Thread fenglinw
From: Fenglin Wu Add support for qcom,gpios-disallowed property which is used to exclude PMIC GPIOs not owned by the APSS processor from the pinctrl device. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 12 ++ drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

[PATCH V1] pinctrl: qcom: spmi-gpio: Correct power_source range check

2017-07-18 Thread fenglinw
From: Fenglin Wu Power source selection in DIG_VIN_CTL is indexed from 0, in the range check it shouldn't be equal to the total number of power sources. Signed-off-by: Fenglin Wu --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH V2 2/2] pinctrl: qcom: spmi-gpio: Add dtest route for digital input

2017-07-18 Thread fenglinw
From: Fenglin Wu Add property "qcom,dtest-buffer" to specify which dtest rail to feed when the pin is configured as a digital input. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 7 +++ drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 50 ++

[PATCH V2 1/2] pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype

2017-07-18 Thread fenglinw
From: Fenglin Wu GPIO LV (low voltage)/MV (medium voltage) subtypes have different features and register mappings than 4CH/8CH subtypes. Add support for LV and MV subtypes. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 17 +- drivers/pinctrl/qcom/pinctrl-s

[PATCH V2 0/2] Add LV/MV subtypes support for QCOM PMIC GPIOs

2017-07-18 Thread fenglinw
From: Fenglin Wu LV (low voltage) and MV (medium voltage) subtype GPIO modules are support in QCOM PMICs like PMI8998, PM660. These modules support addtional features (func3, func4, analog-pass-through mode) and the register mappings are also different compared with legacy 4CH/8CH subtypes. Thes

[PATCH V1 3/3] pinctrl: qcom: spmi-gpio: Correct power_source range check

2017-06-12 Thread fenglinw
From: Fenglin Wu Power source selection in DIG_VIN_CTL is indexed from 0, in the range check it shouldn't be equal to the total number of power sources. Signed-off-by: Fenglin Wu --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dr

[PATCH V1 2/3] pinctrl: qcom: spmi-gpio: Add dtest route for digital input

2017-06-12 Thread fenglinw
From: Fenglin Wu Add property "qcom,dtest-buffer" to specify which dtest rail to feed when the pin is configured as a digital input. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 15 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 45 +

[PATCH V1 1/3] pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype

2017-06-12 Thread fenglinw
From: Fenglin Wu GPIO LV (low voltage)/MV (medium voltage) subtypes have different features and register mappings than 4CH/8CH subtypes. Add support for LV and MV subtypes. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 28 ++- drivers/pinctrl/qcom/pinctrl-

[PATCH V1 0/3] Add LV/MV subtypes support for QCOM PMIC GPIOs

2017-06-12 Thread fenglinw
From: Fenglin Wu LV (low voltage) and MV (medium voltage) subtype GPIO modules are support in QCOM PMICs like PMI8998, PM660. These modules support addtional features (func3, func4, analog-pass-through) and the register mappings are also different compared with legacy 4CH/8CH subtypes. These pat

[PATCH V2 1/2] leds: leds-qti-rgb: Add LED driver for QTI TRI_LED module

2017-06-01 Thread fenglinw
From: Fenglin Wu QTI TRI_LED module has 3 current sinks for LED driver and each is controlled by a PWM channel used for LED dimming or blinking. Add the driver to support it. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/leds/leds-qti-rgb.txt | 46 ++ drivers/leds/Kconfig

[PATCH V1 2/2] pwm: pwm-qti-lpg: Add PWM driver for QTI LPG module

2017-05-30 Thread fenglinw
From: Fenglin Wu Add pwm_chip to support QTI LPG module and export LPG channels as PWM devices for consumer drivers' usage. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/pwm/pwm-qti-lpg.txt| 39 ++ drivers/pwm/Kconfig| 10 + drivers/pwm/Makefil

[PATCH V1 1/2] leds: leds-qti-rgb: Add LED driver for QTI TRI_LED module

2017-05-30 Thread fenglinw
From: Fenglin Wu QTI TRI_LED module has 3 current sinks for LED driver and each is controlled by a PWM channel used for LED dimming or blinking. Add the driver to support it. Signed-off-by: Fenglin Wu --- .../devicetree/bindings/leds/leds-qti-rgb.txt | 66 +++ drivers/leds/Kconfig

[PATCH V1 0/2] *** Add support for QTI TRI_LED and LPG module ***

2017-05-30 Thread fenglinw
From: Fenglin Wu QTI TRI_LED module and LPG modules are existing in some Qualcomm PMICs like PMI8998, PM660, etc. TRI_LED module has 3 LED drivers and each is controlled by a PWM channel used for LED dimming or blinking. LPG (Light Pulse Generator) module can be configured to operate in PWM mode