Re: [PATCH 2/2] hwspinlock: add SUNXI implementation

On Fri, Nov 20, 2020 at 10:01:04PM -0600, Bjorn Andersson wrote: > On Thu 19 Nov 00:44 CST 2020, fu...@allwinnertech.com wrote: > > > From: fuyao > > > > Add hwspinlock support for the SUNXI Hardware Spinlock device. > > > > The Hardware Spinlock device o

Re: [PATCH 0/2] introduce sunxi hwspinlock

On Fri, Nov 20, 2020 at 05:07:10PM +0100, Maxime Ripard wrote: > Hi! > > On Thu, Nov 19, 2020 at 02:44:51PM +0800, fu...@allwinnertech.com wrote: > > From: fuyao > > > > this series add hwspinlock of sunxi. it provides hardware assistance for > > synchronizatio

Re: [PATCH 2/2] hwspinlock: add sunxi hardware spinlock support

On Fri, Nov 20, 2020 at 05:42:31PM +0100, Maxime Ripard wrote: > Hi, > > On Thu, Nov 19, 2020 at 11:13:43AM +0100, Wilken Gottwalt wrote: > > On Thu, 19 Nov 2020 08:15:23 +0100 > > Maxime Ripard wrote: > > > > can you help me here a bit? I still try to figure out how to do patch > > > > sets >

[PATCH 0/2] introduce sunxi hwspinlock

From: fuyao this series add hwspinlock of sunxi. it provides hardware assistance for synchronization between the multiple processors in the system. (Or1k, Cortex-A7, Cortex-A53, Xtensa) fuyao (2): dt-bindings: hwlock: add sunxi hwlock hwspinlock: add SUNXI implementation .../bindings

[PATCH 2/2] hwspinlock: add SUNXI implementation

From: fuyao Add hwspinlock support for the SUNXI Hardware Spinlock device. The Hardware Spinlock device on SUNXI provides hardware assistance for synchronization between the multiple processors in the system (Cortex-A7, or1k, Xtensa DSP, Cortex-A53) Signed-off-by: fuyao --- MAINTAINERS

[PATCH 1/2] dt-bindings: hwlock: add sunxi hwlock

From: fuyao SUNXI hwspinlock binding DT schema format Signed-off-by: fuyao --- .../bindings/hwlock/sunxi,hwspinlock.yaml | 46 +++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/sunxi,hwspinlock.yaml diff --git

Re: [PATCH v4] riscv: fix pfn_to_virt err in do_page_fault().

have you seen the main line? it already corrected. On Mon, Oct 26, 2020 at 08:46:08PM +0800, liush wrote: > From: Shaohua Liu > > The argument to pfn_to_virt() should be pfn not the value of CSR_SATP. > > Reviewed-by: Palmer Dabbelt > Reviewed-by: Anup Patel > Signed-off-by: liush > --- >

Re: 回复：[PATCH] riscv: fix pfn_to_virt err in do_page_fault().

On Fri, Sep 18, 2020 at 03:43:39PM +0800, 刘邵华BTD wrote: > Hi Christoph, > > On Thu, Sep 17, 2020 at 03:25:49PM +0800, liush wrote: > > > The argument to pfn_to_virt() should be pfn not the value of CSR_SATP. > > > > > > Signed-off-by: liush > > > --- > > > arch/riscv/mm/fault.c | 2 +- > > > 1

Re: 回复：[PATCH] cpuidle: add riscv cpuidle driver

On Mon, Sep 14, 2020 at 08:58:02PM +0800, 刘邵华BTD wrote: > Hi Daniel, > > > This patch adds a cpuidle driver for systems based RISCV architecture. > > > This patch supports state WFI. Other states will be supported in the > > > future. > > > > > > Signed-off-by: liush > > > --- > > > > [ ... ] >

[PATCH] power_suuupy: change brace's place

--- drivers/power/supply/power_supply_sysfs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/power/supply/power_supply_sysfs.c b/drivers/power/supply/power_supply_sysfs.c index 5204f115970f..be1577e96c59 100644 --- a/drivers/power/supply/power_supply_sysfs.c +++

some to support pm_trace

there is PM_TRACE for X86 use RTC register, which can debug suspend convenient. recently i want to use it with arm. is there a subsystem to support it.