Hi John,
On 2021/4/13 1:21, John Garry wrote:
On 12/04/2021 14:34, liuqi (BA) wrote:
Hi John,
Thanks for reviewing this.
On 2021/4/9 18:22, John Garry wrote:
On 09/04/2021 10:05, Qi Liu wrote:
PCIe PMU Root Complex Integrated End Point(RCiEP) device is supported
to sample bandwidth
Hi John,
Thanks for reviewing this.
On 2021/4/9 18:22, John Garry wrote:
On 09/04/2021 10:05, Qi Liu wrote:
PCIe PMU Root Complex Integrated End Point(RCiEP) device is supported
to sample bandwidth, latency, buffer occupation etc.
Each PMU RCiEP device monitors multiple Root Ports, and each
On 2021/3/29 16:47, Will Deacon wrote:
On Fri, Mar 26, 2021 at 05:07:41PM +0800, Shaokun Zhang wrote:
Apologies for the mistake.
Will, shall I send a new version v5 to fix this issue or other?
Please send additional patches on top now that these are queued.
Thanks,
Will
.
We'll send a
On 2021/3/22 22:38, Suzuki K Poulose wrote:
On 22/03/2021 13:11, Qi Liu wrote:
Fix up one typo: compoment->component.
Fixes: 8e264c52e1da ("coresight: core: Allow the coresight core
driver to be built as a module")
Signed-off-by: Qi Liu
Thanks for the patch. I will queue this.
.
Hi
On 2021/3/23 0:55, Randy Dunlap wrote:
On 3/22/21 7:38 AM, Suzuki K Poulose wrote:
On 22/03/2021 13:11, Qi Liu wrote:
Fix up one typo: compoment->component.
Fixes: 8e264c52e1da ("coresight: core: Allow the coresight core driver to be built
as a module")
Signed-off-by: Qi Liu
Thanks
On 2021/3/17 22:57, Joe Perches wrote:
On Wed, 2021-03-17 at 17:41 +0800, Qi Liu wrote:
Use the generic sysfs_emit_at() function take place of scnprintf()
[]
diff --git a/drivers/perf/arm-ccn.c b/drivers/perf/arm-ccn.c
[]
@@ -328,41 +328,37 @@ static ssize_t arm_ccn_pmu_event_show(struct
On 2021/3/11 0:19, Alexander Antonov wrote:
On 3/9/2021 10:51 AM, liuqi (BA) wrote:
Hi Alexander,
On 2021/2/3 21:58, Alexander Antonov wrote:
This functionality is based on recently introduced sysfs attributes
for Intel® Xeon® Scalable processor family (code name Skylake-SP):
Commit
Hi Alexander,
On 2021/2/3 21:58, Alexander Antonov wrote:
This functionality is based on recently introduced sysfs attributes
for Intel® Xeon® Scalable processor family (code name Skylake-SP):
Commit bb42b3d39781 ("perf/x86/intel/uncore: Expose an Uncore unit to
IIO PMON mapping")
Mode is
On 2021/2/2 1:05, Mathieu Poirier wrote:
Good day,
On Mon, Feb 01, 2021 at 09:02:44PM +0800, Qi Liu wrote:
Remove duplicate included header files, as coresight-priv.h is included in
these coresight drivers.
Signed-off-by: Qi Liu
---
drivers/hwtracing/coresight/coresight-catu.c |
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