Re: [PATCH v4 1/5] usb: dwc3: core: Host wake up support from system suspend

Hi, On 2020-10-28 02:07, Sandeep Maheswaram wrote: Avoiding phy powerdown in host mode so that it can be woken up by devices. Added hs_phy_mode flag to check connection status and set phy mode and configure interrupts. Signed-off-by: Sandeep Maheswaram --- drivers/usb/dwc3/core.c | 14 +++--

Re: [PATCH v6 2/2] phy: qualcomm: Add Synopsys High-Speed USB PHY driver

Hi Shawn, On 2018-12-20 06:31, Shawn Guo wrote: It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs. Signed-off-by: Shawn Guo --- + +/* PHY register and bit definitions */ +#define PHY_CTRL_COMMON0

Re: [PATCH v1] phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845

Hi, On 2018-10-11 04:06, Doug Anderson wrote: Hi, On Fri, Oct 5, 2018 at 2:09 AM Manu Gautam wrote: Tune1 register on sdm845 is used to update HSTX_TRIM with fused setting. Enable same by specifying update_tune1_with_efuse flag for sdm845, otherwise driver ends up programming tune2 register