[PATCH v2 0/2] clk: bcm2835: PCM clock improvements

LK analagous to REGISTER_PER_CLK in patch 1. * Renamed temporary variable idiv to int_div in patch 2. Phil Elwell (2): clk: bcm2835: Limit PCM clock to OSC and PLLD_PER clk: bcm2835: Minimise clock jitter for PCM clock drivers/clk/bcm/clk-bcm2835.c | 50 ++- 1 f

[PATCH v2 1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER

-off-by: Phil Elwell --- drivers/clk/bcm/clk-bcm2835.c | 27 ++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 0258538..81ecd4c 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk

[PATCH v2 2/2] clk: bcm2835: Minimise clock jitter for PCM clock

jitter. The metric is the ideal rate minus the worse deviation from that ideal using the nearest integer divisors. Use this metric for parent selection for clocks requiring low jitter (currently just PCM). Signed-off-by: Phil Elwell --- drivers/clk/bcm/clk-bcm2835.c | 40

Re: [PATCH 2/2] clk: bcm2835: Minimise clock jitter for PCM clock

Hi Stefan, On 30/05/2017 20:04, Stefan Wahren wrote: > Hi Phil, > >> Phil Elwell hat am 30. Mai 2017 um 18:28 geschrieben: >> >> >> Fractional clock dividers generate accurate average frequencies but >> with jitter, particularly when the integer divisor is sm

Re: [PATCH 1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER

Hi Stefan, On 30/05/2017 19:41, Stefan Wahren wrote: > Hi Phil, > >> Phil Elwell hat am 30. Mai 2017 um 18:28 geschrieben: >> >> >> Restrict clock sources for the PCM peripheral to the oscillator and >> PLLD_PER because other source may have varying rates or

[PATCH 2/2] clk: bcm2835: Minimise clock jitter for PCM clock

jitter. The metric is the ideal rate minus the worse deviation from that ideal using the nearest integer divisors. Use this metric for parent selection for clocks requiring low jitter (currently just PCM). Signed-off-by: Phil Elwell --- drivers/clk/bcm/clk-bcm2835.c | 39

[PATCH 1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER

-off-by: Phil Elwell --- drivers/clk/bcm/clk-bcm2835.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 0258538..facc346 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -1511,6

[PATCH 0/2] clk: bcm2835: PCM clock improvements

cy. In practice, the combined effect of the two patches is to choose OSC as a source if an integer divisor can be used, otherwise PLLD_PER is chosen. Phil Elwell (2): clk: bcm2835: Limit PCM clock to OSC and PLLD_PER clk: bcm2835: Minimise clock jitter for PCM clock drivers/clk/bcm/clk

CLK_OF_DECLARE advice required

l initialisation then the normal retrying of a deferred probe would also avoid this problem. 3. Would adding the OF_CLK_DECLARE hook prevent the use of the devm_ managed functions like devm_kzalloc? If not, why doesn't fixed-factor-clock use it? Thank you for your time, Phil

Re: [PATCH] mmc: spi: disable dma mapping code, as it does not work

On 23/05/2017 08:58, Ulf Hansson wrote: > On 22 May 2017 at 11:09, Phil Elwell wrote: >> since: >> commit 0589342c27944e50ebd7a54f5215002b6598b748 >> Author: Rob Herring >> Date: Tue Oct 29 23:36:46 2013 -0500 >> >>

[PATCH] mmc: spi: disable dma mapping code, as it does not work

re is no real negative impact as the spi-framework does no longer rely on driver-provided DMA mappings but maps the transfers transparently. Signed-off-by: Martin Sperl Submitted-by: Phil Elwell --- drivers/mmc/host/mmc_spi.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/driver

Re: [PATCH] i2c-designware: add i2c gpio recovery option

rn an invalid gpio number when desc == null I don't know what the intents are, so don't know if its a "bug" or by design. -- Regards Phil Reid

Re: [PATCH] i2c-designware: add i2c gpio recovery option

G'day Andy, Thanks for the review. On 10/05/2017 21:13, Andy Shevchenko wrote: On Wed, 2017-05-10 at 13:57 +0200, Tim Sander wrote: This patch contains much input from Phil Reid and has been tested on Intel/Altera Cyclone V SOC Hardware with Altera GPIO's for the SCL and SDA GP

Re: [PATCH] irqchip/bcm2836: Move SMP startup code to arch/arm

On 10/05/2017 16:31, Marc Zyngier wrote: > On 10/05/17 16:07, Phil Elwell wrote: >> On 10/05/2017 14:32, Marc Zyngier wrote: >>> On 10/05/17 14:26, Marc Zyngier wrote: >>>> One of the RPi-2/3 irqchip's key features is that it contains some >>>>

Re: [PATCH] irqchip/bcm2836: Move SMP startup code to arch/arm

or the 2836") > > M. > The patch has some checkpatch warnings, but otherwise: Reviewed-by: Phil Elwell Tested-by: Phil Elwell Thanks, Phil

Re: [PATCH] irq_bcm2836: Send event when onlining sleeping cores

On 10/05/2017 11:09, Marc Zyngier wrote: > On 10/05/17 10:05, Phil Elwell wrote: >> On 10/05/2017 09:55, Marc Zyngier wrote: >>> On Wed, May 10 2017 at 9:27:10 am BST, Phil Elwell >>> wrote: >>>> On 10/05/2017 08:42, Marc Zyngier wrote: >>>>&

Re: [PATCH] staging: vc04_services: Fix bulk cache maintenance

On 10/05/2017 10:06, Greg Kroah-Hartman wrote: > On Wed, May 10, 2017 at 09:42:43AM +0100, Phil Elwell wrote: >> On 04/05/2017 18:51, Stefan Wahren wrote: >>> >>>> Phil Elwell hat am 4. Mai 2017 um 11:58 geschrieben: >>>> >>>> >>>>

Re: [PATCH] irq_bcm2836: Send event when onlining sleeping cores

On 10/05/2017 09:55, Marc Zyngier wrote: > On Wed, May 10 2017 at 9:27:10 am BST, Phil Elwell > wrote: >> On 10/05/2017 08:42, Marc Zyngier wrote: >>> On 09/05/17 20:02, Phil Elwell wrote: >>>> On 09/05/2017 19:53, Marc Zyngier wrote: >>>>> On 09

Re: [PATCH] staging: vc04_services: Fix bulk cache maintenance

On 04/05/2017 18:51, Stefan Wahren wrote: > >> Phil Elwell hat am 4. Mai 2017 um 11:58 geschrieben: >> >> >> vchiq_arm supports transfers less than one page and at arbitrary >> alignment, using the dma-mapping API to perform its cache maintenance >> (even

Re: [PATCH] irq_bcm2836: Send event when onlining sleeping cores

On 10/05/2017 08:42, Marc Zyngier wrote: > On 09/05/17 20:02, Phil Elwell wrote: >> On 09/05/2017 19:53, Marc Zyngier wrote: >>> On 09/05/17 19:52, Phil Elwell wrote: >>>> On 09/05/2017 19:14, Marc Zyngier wrote: >>>>> On 09/05/17 19:08, E

Re: RFC: i2c designware gpio recovery

, rinfo->sda_gpio); return 0; }; A small modification to the i2c-core could be done in i2c_init_recovery to allow: rinfo->recover_bus == i2c_generic_scl_recovery when scl_gpio is also set and fallback to using the core set / get scl / sda calls Which would remove the need f

Re: [PATCH] irq_bcm2836: Send event when onlining sleeping cores

On 09/05/2017 19:53, Marc Zyngier wrote: On 09/05/17 19:52, Phil Elwell wrote: On 09/05/2017 19:14, Marc Zyngier wrote: On 09/05/17 19:08, Eric Anholt wrote: Marc Zyngier writes: On 09/05/17 17:59, Eric Anholt wrote: Phil Elwell writes: In order to reduce power consumption and bus

Re: [PATCH] irq_bcm2836: Send event when onlining sleeping cores

On 09/05/2017 19:14, Marc Zyngier wrote: On 09/05/17 19:08, Eric Anholt wrote: Marc Zyngier writes: On 09/05/17 17:59, Eric Anholt wrote: Phil Elwell writes: In order to reduce power consumption and bus traffic, it is sensible for secondary cores to enter a low-power idle state when

[PATCH V2] ARM: dts: bcm283x: Reserve first page for firmware

, causing the waiting cores to execute random code. Use the /memreserve/ Device Tree directive to mark the first page as off-limits to the kernel. See: https://github.com/raspberrypi/linux/issues/1989 Signed-off-by: Phil Elwell --- Changes in V2: - Rebase against linux-next - Drop downstream-only

[PATCH] irq_bcm2836: Send event when onlining sleeping cores

applied then the other cores will sleep forever. See: https://github.com/raspberrypi/linux/issues/1989 Signed-off-by: Phil Elwell --- drivers/irqchip/irq-bcm2836.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c index e10597c

[PATCH] ARM: dts: bcm283x: Reserve first page for firmware

, causing the waiting cores to execute random code. Use the /memreserve/ Device Tree directive to mark the first page as off-limits to the kernel. See: https://github.com/raspberrypi/linux/issues/1989 Signed-off-by: Phil Elwell --- arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 arch/arm/boot/dts

[PATCH] staging: vc04_services: Fix bulk cache maintenance

ll be invalidated. This bug was masked until the disabling of the cache flush in flush_dcache_page(). Honouring the requested transfer start- and end-points prevents the corruption. Fixes: cf9caf192988 ("staging: vc04_services: Replace dmac_map_area with dmac_map_sg") Signed-off-

Re: RFC: i2c designware gpio recovery

G'day Tim, On 1/05/2017 21:31, Tim Sander wrote: Good Day Phil Am Montag, 1. Mai 2017, 09:57:35 CEST schrieb Phil Reid: So i took a look into the device tree file socfpga.dtsi and found that the reset lines where not defined (although available in the corresponding reset manager). Is th

Re: RFC: i2c designware gpio recovery

7 @@ static int i2c_generic_recovery(struct i2c_adapter *adap) ndelay(RECOVERY_NDELAY); } + dev_err(&adap->dev,"recovery cycle\n"); if (bri->unprepare_recovery) bri->unprepare_recovery(adap); @@ -839,10 +843,12 @@ int i2c_generic_gpio_recovery(struct i2c_adapter *adap) { int ret; + ret = i2c_get_gpios_for_recovery(adap); if (ret) return ret; + dev_err(&adap->dev,"i2c_generic_gpio_recovery have gpios\n"); ret = i2c_generic_recovery(adap); i2c_put_gpios_for_recovery(adap); -- Regards Phil Reid

Re: RFC: i2c designware gpio recovery

t;disabled"; @@ -673,6 +676,7 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc07000 0x1000>; + resets = <&rst I2C3_RESET>; clocks

Re: [PATCH 2/2] iproute2: add support for invisible qdisc dumping

rr, " tc qdisc show [ dev STRING ] [ ingress | clsact > | invisible ]\n"); Doesn't look like these are mutually exclusive. Therefore I would suggest fixing the syntax to: | + fprintf(stderr, " tc qdisc show [ dev STRING ] [ ingress | clsact ] [ invisible ]\n"); Cheers, Phil

[PATCH v2 1/1] gpio: altera: Use handle_level_irq when configured as a level_high

before the irq was disabled as faulty. handle_level_irq should be used in this situation instead of handle_simple_irq. In gpiochip_irqchip_add set default handler to handle_bad_irq as per Documentation/gpio/driver.txt. Then set the correct handler in the set_type callback. Signed-off-by: Phil Reid

Re: [PATCH 1/1] gpio: altera: Use handle_level_irq when configured as a level_high

On 17/02/2017 17:23, Andy Shevchenko wrote: On Fri, Feb 17, 2017 at 11:12 AM, Phil Reid wrote: When a threaded irq handler is chained attached to one of the gpio pins when configure for level irq the altera_gpio_irq_leveL_high_handler does not mask the interrupt while being handled by the

[PATCH 1/1] gpio: altera: Use handle_level_irq when configured as a level_high

before the irq was disabled as faulty. It looks like handle_level_irq should be used in this situation instead of handle_simple_irq. Signed-off-by: Phil Reid --- drivers/gpio/gpio-altera.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-altera.c b/drivers

Re: [PATCH v2] stmmac: CSR clock configuration fix

G'day Joao, On 23/12/2016 01:06, Joao Pinto wrote: Às 4:57 PM de 12/22/2016, Phil Reid escreveu: On 22/12/2016 23:47, Joao Pinto wrote: Hello Phil, Às 3:42 PM de 12/22/2016, Phil Reid escreveu: G'day Joao, On 22/12/2016 20:38, Joao Pinto wrote: When testing stmmac with my QoS

Re: [PATCH v2] stmmac: CSR clock configuration fix

On 22/12/2016 23:47, Joao Pinto wrote: Hello Phil, Às 3:42 PM de 12/22/2016, Phil Reid escreveu: G'day Joao, On 22/12/2016 20:38, Joao Pinto wrote: When testing stmmac with my QoS reference design I checked a problem in the CSR clock configuration that was impossibilitating th

Re: [PATCH v2] stmmac: CSR clock configuration fix

r_mask) - << priv->hw->mii.clk_csr_shift); + value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) + & priv->hw->mii.clk_csr_mask; if (priv->plat->has_gmac4) value |= MII_GMAC4_WRITE; -- Regards Phil Reid

Re: [PATCH 2/2] power: supply: add sbs-charger driver

On 23/11/2016 09:06, Phil Reid wrote: G'day Nicola, On 22/11/2016 02:04, Nicola Saenz Julienne wrote: This adds support for sbs-charger compilant chips as defined here: http://sbs-forum.org/specs/sbc110.pdf You may want to look at the series: power: supply: sbs-manager add driver.

Re: [PATCH 2/2] power: supply: add sbs-charger driver

{ .compatible = "sbs,sbs-charger" }, + { }, +}; +MODULE_DEVICE_TABLE(of, sbs_dt_ids); +#endif + +static const struct i2c_device_id sbs_id[] = { + { "sbs-charger", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, sbs_id); + +static struct i2c_driver sbs_driver = { + .probe

Re: [PATCH] power: supply: sbs-battery: simplify DT parsing

{ .probe = sbs_probe, .remove = sbs_remove, .id_table = sbs_id, .driver = { .name = "sbs-battery", - .of_match_table = of_match_ptr(sbs_dt_ids), + .of_match_table = sbs_dt_ids, .pm = SBS_PM_OPS, }, }; Also sbs_external_power_changed is still referencing chip->pdata->poll_retry_count. Which I think will result in null pointer dereference now. -- Regards Phil Reid

[PATCH] configfs: Return -EFBIG from configfs_write_bin_file.

The check for writing more than cb_max_size bytes does not 'goto out' so it is a no-op which allows users to vmalloc an arbitrary amount. Fixes: 03607ace807b ("configfs: implement binary attributes") Signed-off-by: Phil Turnbull --- fs/configfs/file.c | 1 + 1 file changed,

Re: [PATCH] gpio: pca953x: initialize ret to zero to avoid returning garbage

f-by: Colin Ian King Patch applied. G'day Linus, I believe this does the same as Arnd Bergmanns patch from 26 Aug. [PATCH 1/5] gpio: pca954x: fix undefined error code from remove IMO Colin's is the cleaner solution. Arnd's could be removed. -- Regards Phil Reid

Re: [PATCH 1/5] gpio: pca954x: fix undefined error code from remove

ulator and enable it") Cc: Phil Reid --- Cc: Linus Walleij Cc: Alexandre Courbot Cc: linux-g...@vger.kernel.org drivers/gpio/gpio-pca953x.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index cbe2824461eb..b9d31d737dbf

Re: [RFC PATCH 1/1] i2c: i2c-mux-pca954x: Add interrupt controller support.

On 1/08/2016 16:22, Peter Rosin wrote: On 2016-08-01 08:25, Phil Reid wrote: On 29/07/2016 13:48, Peter Rosin wrote: Ok, I think I get the problem, but I too am at a loss and see no elegant solution. One sad thing about your workaround is that it is not working at all unless there is an irq

Re: [RFC PATCH 1/1] i2c: i2c-mux-pca954x: Add interrupt controller support.

On 29/07/2016 13:48, Peter Rosin wrote: On 2016-07-28 04:44, Phil Reid wrote: G'day Peter, Thanks for the feedback. +linux-kernel@vger.kernel.org On 27/07/2016 13:32, Peter Rosin wrote: On 2016-07-27 05:05, Phil Reid wrote: +static void pca954x_irq_mask(struct irq_data *

Re: [RFC PATCH 1/1] i2c: i2c-mux-pca954x: Add interrupt controller support.

G'day Peter, Thanks for the feedback. +linux-kernel@vger.kernel.org On 27/07/2016 13:32, Peter Rosin wrote: On 2016-07-27 05:05, Phil Reid wrote: The pca9543 can aggregate multiple interrupts from each i2c bus. However it provides no ability to mask interrupts on each channel. So if on

[PATCH] ceph: Correctly return NXIO errors from ceph_llseek.

ceph_llseek does not correctly return NXIO errors because the 'out' path always returns 'offset'. Fixes: 06222e491e66 ("fs: handle SEEK_HOLE/SEEK_DATA properly in all fs's that define their own llseek") Signed-off-by: Phil Turnbull --- fs/ceph/file.c |

[PATCH] staging: iio: ad5933: Return correct value for AD5933_OUT_RANGE.

The 'break' statement after calling ad5933_cmd only breaks out of the 'for' loop, which then unconditionally sets the return value to -EINVAL. Move the initialisation of 'ret' so we return the correct value. Signed-off-by: Phil Turnbull --- drivers/staging/iio/i

Re: rstpd implementation

On 06/22/2016 08:12 PM, Stephen Hemminger wrote: On Wed, 22 Jun 2016 12:44:52 -0500 ebied...@xmission.com (Eric W. Biederman) wrote: Phil writes: Hi, When looking for an RSTP daemon I found Stephen Hemminger's git://git.kernel.org/pub/scm/linux/kernel/git/shemminger/rstp.git &

rstpd implementation

Hi, When looking for an RSTP daemon I found Stephen Hemminger's git://git.kernel.org/pub/scm/linux/kernel/git/shemminger/rstp.git with it's last commit from October 2011. Is this implementation still in good use

Re: [PATCHv2] backlight: pwm_bl: disable PWM when 'duty_cycle' is zero

y_cycle 0 100 PWM active with 100% duty cycle (constant HIGH) 1 99 PWM active with near full duty cycle ... 991 PWM active with near ZERO duty cycle 1000 PWM disabled => constant LOW pwm_backlight_power_off() disables the regulator. So the supply to Backlight disappears, regardless of constant low... -- Regards Phil Reid

investici

Jsem zastupujicí investicní zajem ze strany Dubaji, pro ktere hledáme vasi ucast. Odpoved na e-mailu nize v pripade zajmu. E-mail: pbrt...@gmail.com

Re: Deleting child qdisc doesn't reset parent to default qdisc?

On Thu, Apr 14, 2016 at 08:44:40AM -0700, Eric Dumazet wrote: > On Thu, 2016-04-14 at 17:34 +0200, Jiri Kosina wrote: > > On Thu, 14 Apr 2016, Phil Sutter wrote: > > > > > OTOH some qdiscs (CBQ, DRR, DSMARK, HFSC, HTB, QFQ) assign the default > > > one upon deleti

Re: Deleting child qdisc doesn't reset parent to default qdisc?

too easily and just build their scripts around them - the same scripts we have to keep compatible to then. Cheers, Phil

RE: [PATCH] ARM: dts: r8a7791: Don't disable referenced optional clocks

/boot/dts/r8a7791-koelsch.dts > >>> @@ -660,6 +660,7 @@ > >>>}; > >>> > >>>&pcie_bus_clk { > >>> + clock-frequency = <1>; > > >> Hmmm, looking at the Koelsch schematics, I don'

Re: [PATCH net] tuntap: restore default qdisc

fault qdisc by setting tx_queue_len in tun_setup(). > > Fixes: f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev") > Cc: Phil Sutter > Signed-off-by: Jason Wang Acked-by: Phil Sutter

Re: [PATCH v2] gpio: pca953x: Use correct u16 value for register word write

On 30/03/2016 2:49 PM, Yong Li wrote: The current implementation only uses the first byte in val, the second byte is always 0. Change it to use cpu_to_le16 to write the two bytes into the register Signed-off-by: Yong Li Reviewed-by: Phil Reid --- drivers/gpio/gpio-pca953x.c | 3 ++- 1

Re: Socket-Option in POSIX-sockets, to allow traffic via proxy

this would be allowed? > > I will be grateful for any pointers. This isn't a socket level operation, except to connect to the proxy. Google suggests using libproxy and/or libcurl. HTH, Phil

Re: [PATCH] gpio: pca953x: Use correct u16 value for register word write

u16 *) val)) -- Regards Phil Reid

Re: [PATCH] gpio: pca953x: Use correct u16 value for register word write

On 29/03/2016 10:39 PM, Alexander Stein wrote: You missed CC'ing Phil (Added for this post) On Tuesday 29 March 2016 20:53:58, Yong Li wrote: Thanks for your comment, I think I can change it to val[0] | (val[1] << 8), is it okay ? Mh, currently there is only one caller (device_p

Re: [PATCH] gpio: pca953x: Use correct u16 value for register word write

reg << 1, *(u16 *)val); I don't think this is safe for systems that don't support unaligned memory access. break; case PCA957X_TYPE: ret = i2c_smbus_write_byte_data(chip->client, reg << 1, -- Regards Phil Reid

Re: [PATCH] gpio: 74x164: Implement gpiochip.set_multiple()

On 14/03/2016 11:19 PM, Geert Uytterhoeven wrote: This allows to set multiple outputs using a single SPI transfer. Signed-off-by: Geert Uytterhoeven Reviewed-by: Phil Reid I do have a general question about GPIO drivers. pca953x does not update the cached data unless the write operation

Re: [PATCH] gpio: pca953x: Fix pca953x_gpio_set_multiple() on 64-bit

set_multiple to allow multiple bits to be set in one write.") Signed-off-by: Geert Uytterhoeven Acked-by: Phil Reid --- Untested, found by code inspection. This bug was introduced in v4.5-rc1, but unless Linus (the other one ;-) will make a v4.5-rc8, it's probably too late

Re: [PATCH] pinctrl-bcm2835: Fix cut-and-paste error in "pull" parsing

On 01/03/2016 01:30, Eric Anholt wrote: > From: Phil Elwell > > The DT bindings for pinctrl-bcm2835 allow both the function and pull > to contain either one entry or one per pin. However, an error in the > DT parsing can cause failures if the number of pulls differs from the > n

[net PATCH] IFF_NO_QUEUE: Fix for drivers not calling ether_setup()

ial handling of tx_queue_len == 0") Tested-by: Mathieu Desnoyers Signed-off-by: Phil Sutter --- net/core/dev.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/net/core/dev.c b/net/core/dev.c index 3f4071a84a03f..75383f40e7ced 100644 --- a/net/core/dev.c +++ b/net/c

Re: [PATCH] Revert "net: sched: drop all special handling of tx_queue_len == 0"

On Wed, Feb 17, 2016 at 01:57:42PM +, Mathieu Desnoyers wrote: > - On Feb 17, 2016, at 7:47 AM, Phil Sutter p...@nwl.cc wrote: > > > Hi, > > > > On Tue, Feb 16, 2016 at 07:56:23PM -0500, Mathieu Desnoyers wrote: > >> This reverts commit 348e3435cbefa815

Re: [PATCH] Revert "net: sched: drop all special handling of tx_queue_len == 0"

;tx_queue_len) { dev->priv_flags |= IFF_NO_QUEUE; + dev->tx_queue_len = 1; + } dev->num_tx_queues = txqs; dev->real_num_tx_queues = txqs; Unless there is concern, I will formally submit this later. Thanks, Phil

Re: Bisected Regression 4.3.5 => 4.4.1 booting HP ZBook in EFI mode

nfig matched the originals I started with. So I cleaned my tree and started over building v4.3.5 then v4.4.1. They both booted. So I can no longer reproduce this. Sorry for the noise. Phil

Re: Bisected Regression 4.3.5 => 4.4.1 booting HP ZBook in EFI mode

On 02/05/2016 05:29 PM, Greg Kroah-Hartman wrote: > On Fri, Feb 05, 2016 at 04:48:52PM -0500, Phil Turmel wrote: >> I'm stumped as to how that powerpc patch can affect my x86 laptop, an >> HP ZBook 17 w/ i7 processor & nouveau graphics, but it certainly >> does

[PATCH nf] netfilter: nfnetlink: correctly validate length of batch messages

From: Phil Turnbull If nlh->nlmsg_len is zero then an infinite loop is triggered because 'skb_pull(skb, msglen);' pulls zero bytes. The calculation in nlmsg_len() underflows if 'nlh->nlmsg_len < NLMSG_HDRLEN' which bypasses the length validation and will later trig

[PATCH v2 3/4] PCI: rcar: Add runtime PM support to pcie-rcar

If runtime PM is enabled in the kernel config, simply enable the clocks once during probe. Signed-off-by: Phil Edworthy --- v2: - No changes. --- drivers/pci/host/pcie-rcar.c | 44 1 file changed, 32 insertions(+), 12 deletions(-) diff --git a

[PATCH v2 4/4] PCI: rcar: Add Gen2 PHY setup to pcie-rcar

For PCIe compliance, the PHY registers need setting as per the manual. Signed-off-by: Phil Edworthy --- v2: - Added comment about where the PHY settings come from. --- drivers/pci/host/pcie-rcar.c | 31 --- 1 file changed, 28 insertions(+), 3 deletions(-) diff

[PATCH v2 0/4] Various R-Car PCIe patches

iting until we are in L1. PATCh 4/4 - Added comment about where the PHY settings come from. Phil Edworthy (4): PCI: rcar: remove unused pci_sys_data structure in pcie-rcar PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar PCI: rcar: Add runtime PM support to pcie-rcar PCI:

[PATCH v2 1/4] PCI: rcar: remove unused pci_sys_data structure in pcie-rcar

Commit b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource with global function pointer") removed the struct pci_sys_data dependency from the ARM pcibios functions, so remove it from this driver. Signed-off-by: Phil Edworthy --- v2: - No changes. --- drivers/pci/hos

[PATCH v2 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

as long as it has also been transitioned to L1 link state. So, when attempting a config access, check to see if the card has gone into L1, and if so, do the same for the host controller. This is based on a patch by Hien Dang Signed-off-by: Phil Edworthy --- v2: - Use readl_poll_timeout_atomic wh

RE: [PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

Hi Geert, On 21 December 2015 13:17, Geert Uytterhoeven wrote: > On Mon, Dec 21, 2015 at 11:52 AM, Phil Edworthy > wrote: > > On 18 December 2015 14:04, Wolfram Sang wrote: > >> > Since the hardware doesn't support hot plug, I believe this loop will > >&

Re: WANTED new maintainer for Linux/md (and mdadm)

oviding excellent support. I'd particularly like to > high-light Phil Turmel who is very forthcoming with excellent advice, > but he is certainly not the only one who deserves a lot of thanks. > So "Thank you" to everyone who answers questions on linux-raid. You are ve

RE: [PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

rm > /sys/power/pm_test echo N > /sys/module/printk/parameters/console_suspend echo mem > /sys/power/state Thanks Phil -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vg

RE: [PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

l_timeout() makes it easy, we > should better be safe than sorry. I haven't see that one before, very handy! Thanks Phil -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://

RE: [PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

); > > > > No timeout? > > And no cpu_relax() in each iteration. Sure, I'll fix that. Thanks Phil > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- > ge...@linux-m68k.or

RE: [PATCH 4/4] PCI: rcar: Add Gen2 PHY setup to pcie-rcar

rcar_pci_write_reg(pcie, 0x0001, GEN2_PCIEPHYCTRL); > > + rcar_pci_write_reg(pcie, 0x0006, GEN2_PCIEPHYCTRL); > > I'd vote for a comment saying where these magic values come from, i.e. > which manual, which chapter, etc... Ok, will do. Thanks Phil -- To unsubscribe from th

RE: [PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

Hi Wolfram, On 17 December 2015 13:31, Wolfram Sang wrote: > Hi Phil, > > > + /* Wait until we are in L1 */ > > + while (!(val & L1FAEG)) > > + val = rcar_pci_read_reg(pcie, PMSR); > > No timeout? Since the hardware doesn&

[PATCH 2/4] PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar

as long as it has also been transitioned to L1 link state. So, when attempting a config access, check to see if the card has gone into L1, and if so, do the same for the host controller. This is based on a patch by Hien Dang Signed-off-by: Phil Edworthy --- drivers/pci/host/pcie-r

[PATCH 3/4] PCI: rcar: Add runtime PM support to pcie-rcar

If runtime PM is enabled in the kernel config, simply enable the clocks once during probe. Signed-off-by: Phil Edworthy --- drivers/pci/host/pcie-rcar.c | 44 1 file changed, 32 insertions(+), 12 deletions(-) diff --git a/drivers/pci/host/pcie

[PATCH 4/4] PCI: rcar: Add Gen2 PHY setup to pcie-rcar

For PCIe compliance, the PHY registers need setting as per the manual. Signed-off-by: Phil Edworthy --- drivers/pci/host/pcie-rcar.c | 27 --- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index

[PATCH 0/4] Various R-Car PCIe patches

The first patch removes code that is no longer used. The next two allow us to use runtim PM. The last patch is for PHY setup in order to get PCIe compliance apparently. For that last patch, I've been told that this is what I must set. Phil Edworthy (4): PCI: rcar: remove unused pci_sys

[PATCH 1/4] PCI: rcar: remove unused pci_sys_data structure in pcie-rcar

Commit b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource with global function pointer") removed the struct pci_sys_data dependency from the ARM pcibios functions, so remove it from this driver. Signed-off-by: Phil Edworthy --- drivers/pci/host/pcie-rcar.c | 9

RE: [PATCH 07/10] drivers/pci: make host/pcie-rcar.c explicitly non-modular

file in the comments. > > > > Cc: Simon Horman > > Cc: Bjorn Helgaas > > Cc: linux-...@vger.kernel.org > > Cc: linux...@vger.kernel.org > > Signed-off-by: Paul Gortmaker It doesn't apply, would you mind rebasing onto: https://git.kernel.org/cgit/linux/kerne

RE: [Resend: PATCH v2 0/3] Fix rcar-pcie for arm64

Hi Bjorn, On 09 December 2015 17:00, Bjorn Helgaas wrote: > On Thu, Nov 26, 2015 at 08:32:43AM +0000, Phil Edworthy wrote: > > HI Bjorn, > > > > On 25 November 2015 16:41, Bjorn Helgaas wrote: > > > Hi Phil, > > > > > > On Wed, Nov 25, 2015 at 03

Re: rhashtable: Use __vmalloc with GFP_ATOMIC for table allocation

On Fri, Dec 04, 2015 at 09:45:20AM -0800, Eric Dumazet wrote: > On Fri, 2015-12-04 at 18:01 +0100, Phil Sutter wrote: > > On Fri, Dec 04, 2015 at 10:39:56PM +0800, Herbert Xu wrote: > > > On Thu, Dec 03, 2015 at 08:08:39AM -0800, Eric Dumazet wrote: > > > > > >

Re: rhashtable: Use __vmalloc with GFP_ATOMIC for table allocation

me every single test with 50 threads was successful. HTH, Phil [ 5196.212230] Running rhashtable test nelem=8, max_size=0, shrinking=0 [ 5196.243846] Test 00: [ 5196.245990] Adding 5 keys [ 5196.250787] Info: encountered resize [ 5196.251631] Info: encountered resize [ 5196.252773] In

Re: rhashtable: Prevent spurious EBUSY errors on insertion

row the table one of them may be tricked into doing a rehash > > instead. > > > > I'm working on a fix. > > OK this patch fixes the EBUSY problem as far as I can tell. Please > let me know if you still observe EBUSY with it. I'll respond to the > ENOMEM probl

[PATCH] PCI: MSI: Only use the generic MSI layer when domain is hierarchical

old one. Not pretty, but reliable. Another insentive to rework those drivers and phase out this API. Reported-by: Phil Edworthy Tested-by: Phil Edworthy Signed-off-by: Marc Zyngier --- drivers/pci/msi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/msi.c

Re: [PATCH v2 0/4] improve fault-tolerance of rhashtable runtime-test

On Mon, Nov 30, 2015 at 05:37:55PM +0800, Herbert Xu wrote: > Phil Sutter wrote: > > The following series aims to improve lib/test_rhashtable in different > > situations: > > > > Patch 1 allows the kernel to reschedule so the test does not block too > >

RE: [Resend: PATCH v2 0/3] Fix rcar-pcie for arm64

HI Bjorn, On 25 November 2015 16:41, Bjorn Helgaas wrote: > Hi Phil, > > On Wed, Nov 25, 2015 at 03:30:36PM +0000, Phil Edworthy wrote: > > The first patches fixes the build problem > > I'm trying to figure out if v4.4 has a build problem we need to fix. > If I und

[PATCH v2 1/3] PCI: rcar: Convert to DT resource parsing API

"PCI: generic: Convert to DT resource parsing API". Signed-off-by: Phil Edworthy Reported-by: Wolfram Sang Tested-by: Wolfram Sang Acked-by: Simon Horman --- v2: - Remove incorrect res_valid check --- drivers/pci/host/pcie-rcar.c | 116 +++--

[PATCH v2 3/3] PCI: pcie-rcar: Add support for R-Car H3.

From: Harunobu Kurokawa R-Car H3 device is r8a7795 Signed-off-by: Harunobu Kurokawa Acked-by: Wolfram Sang Tested-by: Wolfram Sang --- v2: No changes --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 ++- drivers/pci/host/pcie-rcar.c | 1 + 2 files changed, 3 i

[PATCH v2 2/3] Revert "PCI: rcar: Build pcie-rcar.c only on ARM"

Now that we can build on arm64, revert commit 7c537c67d2e4 ("PCI: rcar: Build pcie-rcar.c only on ARM"). Signed-off-by: Phil Edworthy --- v2: No changes --- drivers/pci/host/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/host/Kconfig b/driver

[Resend: PATCH v2 0/3] Fix rcar-pcie for arm64

rked as v2 and acks, etc added. Harunobu Kurokawa (1): PCI: pcie-rcar: Add support for R-Car H3. Phil Edworthy (2): PCI: rcar: Convert to DT resource parsing API Revert "PCI: rcar: Build pcie-rcar.c only on ARM" Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 +- driv

Re: [RFC PATCH 2/2] Crypto kernel tls socket

iver to be accessed, so using them from userspace is not as simple as with padlock or AESNI. This was the reasoning behind the various cryptodev implementations and af_alg. Using those to establish a TLS connection with OpenSSL means to fetch encrypted data to userspace first and then feed it to

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