Hi
On Tue, Nov 03, 2020 at 12:37:54PM +0800, Yejune Deng wrote:
> devm_reset_control_array_get_exclusive() looks more readable
>
> Signed-off-by: Yejune Deng
Reviewed-by: Remi Pommarel for phy-meson-axg-pcie
Thanks.
struct phy_provider *phy_provider;
> - struct resource *res;
> struct phy_meson_gxl_usb2_priv *priv;
> struct phy *phy;
> void __iomem *base;
> @@ -242,8 +241,7 @@ static int phy_meson_gxl_usb2_probe(struct
> platform_device *pdev)
>
> platform_s
found in Meson AXG SoCs.
> diff --git a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> b/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> index 1431cbf885e1..6eb21551bdd9 100644
> --- a/drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
> +++ b/drivers/phy/am
On 2020-09-03 18:51, Arnaldo Carvalho de Melo wrote:
Em Wed, Sep 02, 2020 at 09:25:19PM -0300, Arnaldo Carvalho de Melo escreveu:
Em Fri, Aug 21, 2020 at 06:52:36PM +0200, Remi Bernon escreveu:
Wine generates PE binaries for most of its modules and perf is unable
to parse these files to get
This adds a precompiled file in PE binary format, with split debug file,
and tries to read its build_id and .gnu_debuglink sections, as well as
looking up the main symbol from the debug file. This should succeed if
libbfd is supported.
Signed-off-by: Remi Bernon
Cc: Alexander Shishkin
Cc
Wine generates PE binaries for most of its modules and perf is unable
to parse these files to get build_id or .gnu_debuglink section.
Using libbfd when available, instead of libelf, makes it possible to
resolve debug file location regardless of the dso binary format.
Signed-off-by: Remi Bernon
running under Wine.
Because libbfd doesn't provide symbol size (probably because of some
backends not supporting it), we compute it by first sorting the symbols
by addresses and then considering that they are sequential in a given
section.
Signed-off-by: Remi Bernon
Cc: Alexander Shishkin
Cc: Ar
On Tue, 11 Aug 2020 18:44:32 +0200, Jonathan Corbet wrote:
> On Sat, 8 Aug 2020 18:31:23 +0200
> Remi Andruccioli wrote:
>
>> "The capability fags" should be "The capability flags".
>>
>> In rst markup, a incorrect markup expression is causing
"The capability fags" should be "The capability flags".
In rst markup, a incorrect markup expression is causing bad rendering in
Sphinx output. Replace the erroneous single quote by a backquote.
Signed-off-by: Remi Andruccioli
---
Documentation/cdrom/cdrom-standard.rst | 4
On 2020-08-04 22:32, Jiri Olsa wrote:
On Tue, Aug 04, 2020 at 10:57:35AM +0200, Remi Bernon wrote:
SNIP
+
+int dso__load_bfd_symbols(struct dso *dso, const char *debugfile)
+{
+ int err = -1;
+ long symbols_size, symbols_count;
+ asection *section;
+ asymbol **symbols
Wine generates PE binaries for most of its modules and perf is unable
to parse these to get build_id or .gnu_debuglink section.
Using libbfd when available, instead of libelf, makes it possible to
resolve debug file location regardless of the dso binary format.
Signed-off-by: Remi Bernon
Cc
This adds a precompiled file in PE binary format, with split debug file,
and tries to read its build_id and .gnu_debuglink sections, as well as
looking up the main symbol from the debug file. This should succeed if
libbfd is supported.
Signed-off-by: Remi Bernon
Cc: Alexander Shishkin
Cc
running under Wine.
Because libbfd doesn't provide symbol size (probably because of some
backends not supporting it), we compute it by first sorting the symbols
by addresses and then we consider that they are sequential in a given
section.
Signed-off-by: Remi Bernon
Cc: Alexander Shishki
udp_sendmsg+0xaf0/0xcf0
[<5aabe255>] inet_sendmsg+0x5c/0x80
[<8651ea08>] __sys_sendto+0x15c/0x218
[<3505c99b>] __arm64_sys_sendto+0x74/0x90
[<263486ec>] el0_svc_handler+0xd0/0x1a0
[<05b5157d>] el0_svc+0x8/0xc
Fixes: 2bdaf3
t;] sys_sendmsg+0x354/0x3a0
[<e06bab0f>] ___sys_sendmsg+0xd8/0x120
[<37340728>] __sys_sendmsg+0xa4/0xf8
[<4fed9776>] __arm64_sys_sendmsg+0x44/0x58
[<1c1e5647>] el0_svc_handler+0xd0/0x1a0
Fixes: c80d545da3f7 (mac80211: L
This adds a precompiled file in PE binary format, with split debug file,
and tries to read its build_id and .gnu_debuglink sections, as well as
looking up the main symbol from the debug file. This should succeed if
libbfd is supported.
Signed-off-by: Remi Bernon
Cc: Alexander Shishkin
Cc
Wine generates PE binaries for most of its modules and perf is unable
to parse these files to get build_id or .gnu_debuglink section.
Using libbfd when available, instead of libelf, makes it possible to
resolve debug file location regardless of the dso binary format.
Signed-off-by: Remi Bernon
given
section.
Signed-off-by: Remi Bernon
Cc: Alexander Shishkin
Cc: Arnaldo Carvalho de Melo
Cc: Ingo Molnar
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Namhyung Kim
Cc: Peter Zijlstra
Cc: Jacek Caban
---
tools/perf/util/symbol.c | 129 +++
tools/perf/util/sym
On Mon, Oct 14, 2019 at 02:45:34PM +0100, Marc Zyngier wrote:
> Hi Remi,
>
> On 2019-10-14 14:06, Remi Pommarel wrote:
> > Hi Lorenzo, Marc,
> >
> > On Mon, Oct 14, 2019 at 11:01:29AM +0100, Lorenzo Pieralisi wrote:
> > > On Sun, Oct 13, 2019 at 11:34:15AM +
Hi Lorenzo, Marc,
On Mon, Oct 14, 2019 at 11:01:29AM +0100, Lorenzo Pieralisi wrote:
> On Sun, Oct 13, 2019 at 11:34:15AM +0100, Marc Zyngier wrote:
> > On Tue, 1 Oct 2019 09:05:46 +0100
> > Andrew Murray wrote:
> >
> > Hi Lorenzo,
> >
> > > On M
On Mon, Sep 30, 2019 at 04:40:18PM +0100, Andrew Murray wrote:
> On Wed, May 22, 2019 at 11:33:51PM +0200, Remi Pommarel wrote:
> > Aardvark's PCI_EXP_LNKSTA_LT flag in its link status register is not
> > implemented and does not reflect the actual link training state (the
&g
decrements a variable and wait instead of using jiffies.
Signed-off-by: Remi Pommarel
---
Changes since v1:
- Reduce polling delay
- Change size_t into int for loop counter
Changes since v2:
- Keep timeout to 1ms by increasing retry counter
---
drivers/pci/controller/pci-aardvark.c | 10
Hi Thomas,
On Fri, Sep 27, 2019 at 10:34:20AM +0200, Thomas Petazzoni wrote:
> Hello Remi,
>
> Thanks for the new iteration!
>
> On Fri, 27 Sep 2019 10:31:42 +0200
> Remi Pommarel wrote:
>
> > diff --git a/drivers/pci/controller/pci-aardvark.c
> > b/driv
decrements a variable and wait instead of using jiffies.
Signed-off-by: Remi Pommarel
---
Changes since v1:
- Reduce polling delay
- Change size_t into int for loop counter
---
drivers/pci/controller/pci-aardvark.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a
Hi Thomas,
Thanks for the review.
On Wed, Sep 25, 2019 at 11:33:51AM +0200, Thomas Petazzoni wrote:
> Hello Remi,
>
> Thanks for the patch, I have a few comments/questions below.
>
> On Sun, 1 Sep 2019 16:23:03 +0200
> Remi Pommarel wrote:
>
> > diff --git a
decrements a variable and wait instead of using jiffies.
Signed-off-by: Remi Pommarel
---
drivers/pci/controller/pci-aardvark.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/pci-aardvark.c
b/drivers/pci/controller/pci-aardvark.c
index
urious fake irq that
CONFIG_DEBUG_SHIRQ adds called the handler.
Reported-by: Elie Roudninski
Signed-off-by: Remi Pommarel
---
drivers/iio/adc/meson_saradc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_sar
Sorry, I don't have the original message to reply to.. But to those
interested, I have found a solution to the kernel's complete inability
to allocate more memory when it needs to swap out.
Increase the /proc/sys/vm/watermark_scale_factor from the default 10 to 500
It will make a huge difference,
On Wed, May 22, 2019 at 11:33:51PM +0200, Remi Pommarel wrote:
> Aardvark's PCI_EXP_LNKSTA_LT flag in its link status register is not
> implemented and does not reflect the actual link training state (the
> flag is always set to 0). In order to support link re-training feature
>
On Wed, May 22, 2019 at 11:33:50PM +0200, Remi Pommarel wrote:
> When configuring pcie reset pin from gpio (e.g. initially set by
> u-boot) to pcie function this pin goes low for a brief moment
> asserting the PERST# signal. Thus connected device enters fundamental
> reset proc
Implement emulated root PCI bridge config
space")
Signed-off-by: Remi Pommarel
---
Changes since v1:
* Improve code readability
* Fix mask polarity
* PME_MASK shift was off by one
Changes since v2:
* Modify patch title
* Change Fixes tag to commit that actually introduces the bug
-
Hello,
On Fri, Jun 14, 2019 at 10:58:54AM +0200, Thomas Petazzoni wrote:
> Hello,
>
> On Fri, 14 Jun 2019 08:42:25 +0200
> Remi Pommarel wrote:
>
> > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> > should not modify other interrupts'
ature bits for managed host bridge
alloc")
Signed-off-by: Remi Pommarel
---
Changes since v1:
* Improve code readability
* Fix mask polarity
* PME_MASK shift was off by one
---
drivers/pci/controller/pci-aardvark.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff
On Thu, Jun 13, 2019 at 05:14:41PM +0100, Lorenzo Pieralisi wrote:
> On Wed, May 22, 2019 at 11:33:49PM +0200, Remi Pommarel wrote:
> > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> > should not modify other interrupts' mask (such as ISR0).
> >
014, Table 4-14
Signed-off-by: Remi Pommarel
---
Changes since v1:
- Rename retraining flag field
- Fix DEVCTL register writing
Changes since v2:
- Rewrite patch logic so it is more legible
Please note that I will unlikely be able to answer any comments from May
24th to June 10th.
---
drivers
s asserted */
...
drv->probe()
[1] "PCI Express Base Specification", REV. 4.0
PCI Express, February 19 2014, 6.6.1 Conventional Reset
Signed-off-by: Remi Pommarel
---
Changes since v1:
- Add a comment about pinctrl implicit pin configuration
- Use more legible msleep
- Use P
PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
should not modify other interrupts' mask (such as ISR0).
Fixes: 6302bf3ef78d ("PCI: Init PCIe feature bits for managed host bridge
alloc")
Signed-off-by: Remi Pommarel
---
Please note that I will unlikely be
Hi Lorenzo,
On Tue, Apr 30, 2019 at 12:34:27PM +0100, Lorenzo Pieralisi wrote:
> On Mon, Apr 29, 2019 at 05:32:35PM +0200, Remi Pommarel wrote:
> > Hi Lorenzo,
> >
> > Sorry for duplicates I forgot to include everyone.
> >
> > On Thu, Apr 25, 2019 at 04:06:40
On Mon, Apr 29, 2019 at 02:45:32PM -0500, Bjorn Helgaas wrote:
> On Fri, Apr 26, 2019 at 12:27:57AM +0200, Remi Pommarel wrote:
> > On Thu, Apr 25, 2019 at 04:04:39PM -0500, Bjorn Helgaas wrote:
> > > On Sat, Mar 16, 2019 at 05:12:43PM +0100, Remi Pommarel wrote:
>
> &g
Hi Lorenzo,
Sorry for duplicates I forgot to include everyone.
On Thu, Apr 25, 2019 at 04:06:40PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Apr 25, 2019 at 04:23:53PM +0200, Remi Pommarel wrote:
> > Hi Lorenzo,
> >
> > On Thu, Apr 25, 2019 at 12:08:30PM +0100, Lorenzo Pier
Hi Bjorn,
On Thu, Apr 25, 2019 at 04:04:39PM -0500, Bjorn Helgaas wrote:
> Hi Remi,
>
> On Sat, Mar 16, 2019 at 05:12:43PM +0100, Remi Pommarel wrote:
> > The PCI_EXP_LNKSTA_LT flag in the emulated root device's PCI_EXP_LNKSTA
> > config register does not reflect the
On Wed, Apr 24, 2019 at 05:50:02PM +0100, Lorenzo Pieralisi wrote:
> On Wed, Apr 24, 2019 at 12:29:18AM +0200, Remi Pommarel wrote:
> > Hi,
> >
> > On Tue, Apr 23, 2019 at 05:32:15PM +0100, Lorenzo Pieralisi wrote:
> > > On Wed, Mar 13, 2019 at 10:37:52PM +0100, Rem
Hi Lorenzo,
On Thu, Apr 25, 2019 at 12:08:30PM +0100, Lorenzo Pieralisi wrote:
> On Sat, Mar 16, 2019 at 05:12:43PM +0100, Remi Pommarel wrote:
> > The PCI_EXP_LNKSTA_LT flag in the emulated root device's PCI_EXP_LNKSTA
> > config register does not reflect the actual link t
Hi,
On Tue, Apr 23, 2019 at 05:32:15PM +0100, Lorenzo Pieralisi wrote:
> On Wed, Mar 13, 2019 at 10:37:52PM +0100, Remi Pommarel wrote:
> > When configuring pcie reset pin from gpio (e.g. initially set by
> > u-boot) to pcie function this pin goes low for a brief moment
> >
dge+0xc4/0xe0
[0.915424] pci_host_probe+0x14/0xa8
[0.915426] advk_pcie_probe+0x838/0x910
[...]
8< ---
[1] "PCI Express Base Specification", REV. 2.1
PCI Express, March 4 2009, Table 4-7
Signed-off-by: Remi Pommar
ned-off-by: Remi Pommarel
---
drivers/pci/controller/pci-aardvark.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pci-aardvark.c
b/drivers/pci/controller/pci-aardvark.c
index a30ae7cf8e7e..70a1023d0ef1 100644
--- a/drivers/pci/cont
dge+0xc4/0xe0
[0.915424] pci_host_probe+0x14/0xa8
[0.915426] advk_pcie_probe+0x838/0x910
[...]
8< ---
[1] "PCI Express Base Specification", REV. 2.1
PCI Express, March 4 2009, Table 4-7
Signed-off-by: Remi Pommarel
This patch has been included in patchset [1], please ignore this one.
[1] https://lkml.org/lkml/2019/1/28/1876
--
Remi
).
Signed-off-by: Remi Pommarel
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi| 5 +
2 files changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
b/arch/arm64/boot/dts/marvell
support).
Signed-off-by: Remi Pommarel
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
index b60897edc885
/507
Remi Pommarel (2):
arm64: dts: armada-3720-espressobin: Configure RGMII and SMI pins
arm64: dts: armada-3720-espressobin: Set mv88e6341 cpu port as
RGMII-ID
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 7 +++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
).
Signed-off-by: Remi Pommarel
---
This should be applied along with pinctrl fixes from
https://lkml.org/lkml/2018/12/21/507 which have been merged in next branch of
linux-pinctrl tree.
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
://marc.info/?l=linux-mmc&m=154707415208716.
Signed-off-by: Remi Pommarel
---
Changes since v1:
- Fix it also in the error handling of probe callback
---
drivers/mmc/host/meson-gx-mmc.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/meson-gx-mmc
On Thu, Jan 10, 2019 at 07:49:08PM +0100, Remi Pommarel wrote:
> Because the irq was requested through device managed resources API
> (devm_request_threaded_irq()) it was freed after meson_mmc_remove()
> completion, thus after mmc_free_host() has reclaimed meson_host memory.
> As
8716.
Signed-off-by: Remi Pommarel
---
drivers/mmc/host/meson-gx-mmc.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index c2690c1a50ff..412cfd16bf15 100644
--- a/drivers/mmc/host/meson-gx-mmc.c
+
On Wed, Sep 12, 2018 at 03:35:19PM +0100, Alan Cox wrote:
> On Tue, 11 Sep 2018 22:23:55 +0200
> Remi Pommarel wrote:
>
> > This patchset adds a way to have a specific keyboard config (i.e.
> > keycode to keysym map) for a vt attached input.
>
> Who actually needs thi
I had used "RFC" here because I had one or two questions about the
implementation choices I made on those patches and not really on the
solution itself. So, yes, I don't mind sending another round of those
patches without RFC.
Thanks,
--
Remi
In order to ease the addition of the ability of an input to use a
different key configuration (keycode to keysym map), the operations of
getting and setting an entry in a key map is moved in respective
functions.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt
CH 2/4) may be wrong ?
- kbd_detach_conf is a bit clumsy because it tries to copy a shared sparse
pointer array without using GFP_ATOMIC.
Remi Pommarel (4):
drivers/tty/vt/keyboard.c: refactor getting/setting a keymap entry
drivers/tty/vt/keyboard.c: add keyboard config for each vt's input
driver
array in each input allows to retrieve its associated
keymap.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt/keyboard.c | 46 +++
1 file changed, 32 insertions(+), 14 deletions(-)
diff --git a/drivers/tty/vt/keyboard.c b/drivers
/* Reset input key map so that global key_maps is used */
ret = ioctl(fd, KDSKBIRST, &kbi.id);
if(ret < 0)
/* Error handling */
- 8< -
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
detach a kbd_handle from
global config. Some new ioctl will be introduced to do so.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt/keyboard.c | 198 --
1 file changed, 171 insertions(+), 27 deletions(-)
diff --git a/drivers/tty/vt
Hi,
Just a gentle ping.
Any comments on this patchset that adds a way to have multiple
keyboards with different keymap on a VT would be nice.
Thanks
--
Remi
detach a kbd_handle from
global config. Some new ioctl will be introduced to do so.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt/keyboard.c | 198 --
1 file changed, 171 insertions(+), 27 deletions(-)
diff --git a/drivers/tty/vt
In order to ease the addition of the ability of an input to use a
different key configuration (keycode to keysym map), the operations of
getting and setting an entry in a key map is moved in respective
functions.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt
/* Reset input key map so that global key_maps is used */
ret = ioctl(fd, KDSKBIRST, &kbi.id);
if(ret < 0)
/* Error handling */
- 8< -
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
P_ATOMIC.
- Is this patchset even a sensible idea ?
Remi Pommarel (4):
drivers/tty/vt/keyboard.c: refactor getting/setting a keymap entry
drivers/tty/vt/keyboard.c: add keyboard config for each vt's input
drivers/tty/vt/keyboard.c: Make key_down[] bitmap input dependent
drivers/tty/vt:
array in each input allows to retrieve its associated
keymap.
Signed-off-by: Remi Pommarel
Tested-by: Elie Roudninski
---
drivers/tty/vt/keyboard.c | 46 +++
1 file changed, 32 insertions(+), 14 deletions(-)
diff --git a/drivers/tty/vt/keyboard.c b/drivers
Acked-by: Remi Machet
-Original Message-
From: Mark Greer
Sent: Thursday, April 5, 2018 9:17 PM
To: Benjamin Herrenschmidt ; Paul Mackerras
; Michael Ellerman
Cc: Remi Machet ; Dale Farnsworth ;
linuxppc-...@lists.ozlabs.org; linux-kernel@vger.kernel.org; Mark Greer
Subject: [PATCH 1
On Sun, Dec 06, 2015 at 05:22:45PM +0100, Remi Pommarel wrote:
> Hi,
>
> This patchset adds support for pwm clock. At boot, this clock does not have a
> default parent nor a default rate set. Thus we should be able to change its
> parent to get this clock working. The current clock
On Mon, Dec 07, 2015 at 08:09:47PM -0800, Eric Anholt wrote:
> Stefan Wahren writes:
>
> > Hi Remi,
> >
> > Am 07.12.2015 um 19:17 schrieb Remi Pommarel:
> >> Hi Stefan,
> >>
> >> On Sun, Dec 06, 2015 at 10:16:25PM +0100, Stefan Wahren wrote:
&
Hi Stefan,
On Sun, Dec 06, 2015 at 10:16:25PM +0100, Stefan Wahren wrote:
> Hi Remi,
>
> please send this patch to devicet...@vger.kernel.org.
Ok, just to be sure I understand the process here. I should resend a new
version of the whole patchset including the devicetree mailing list as
t a mux clock
cannot be used because updating clock control register to select parent needs a
password to be xor'd with the parent index.
This patch get rid of mux clock and make these clocks handle their own parent,
allowing them to select the one to use.
Signed-off-by: Remi Pommarel
---
dr
Signed-off-by: Remi Pommarel
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4
arch/arm/boot/dts/bcm2835.dtsi | 9 +
2 files changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 3572f03..55801e0 100644
--- a/arch/arm
Make bcm2835_clock_choose_div to optionally round up the chosen MASH divisor
so that the resulting average rate will not be higher than the requested one.
Signed-off-by: Remi Pommarel
---
drivers/clk/bcm/clk-bcm2835.c | 22 --
1 file changed, 12 insertions(+), 10 deletions
Register the pwm clock for bcm2835.
Signed-off-by: Remi Pommarel
---
drivers/clk/bcm/clk-bcm2835.c | 13 +
include/dt-bindings/clock/bcm2835.h | 3 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
variable and include
- Make bcm2835_clock_choose_div() divisor round up ability optional
- Set rate in bcm2835_determine_rate()
- Add device tree modification in a separate patch
Remi Pommarel (4):
clk: bcm2835: add a round up ability to the clock divisor
clk: bcm2835
On Thu, Dec 03, 2015 at 04:37:07PM -0800, Eric Anholt wrote:
> Remi Pommarel writes:
>
> > On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote:
> >
> > [...]
> >
> >> > +static int bcm2835_clock_determine_rate(struct clk_hw *hw,
> >&
Hi Eric
On Wed, Nov 18, 2015 at 07:11:41PM -0100, Remi Pommarel wrote:
> On Wed, Nov 18, 2015 at 10:25:45AM -0800, Eric Anholt wrote:
> > Remi Pommarel writes:
> >
> > > Make bcm2835_clock_choose_div always round up the chosen MASH divisor so
> > > that
>
On Sun, Nov 29, 2015 at 10:22:40PM +0100, Stefan Wahren wrote:
> Hi Remi,
>
> Am 29.11.2015 um 01:31 schrieb Remi Pommarel:
> >Hi Stefan,
> >
> >On Sat, Nov 28, 2015 at 09:52:07PM +0100, Stefan Wahren wrote:
> >>i applied the series including the devicetree m
clock appears
to be orphan because in the bcm2835 clock driver, the GND clock is not
registered.
So, IMHO, we have to set the default pwm rate from the devicetree, using
assigned-clock-rates. That what does the following dts patch.
This patch also set the gpio pin 18 to proper altern
On Wed, Nov 18, 2015 at 10:32:55AM -0800, Eric Anholt wrote:
> Remi Pommarel writes:
>
> > Register the pwm clock for bcm2835.
> >
> > Signed-off-by: Remi Pommarel
> > ---
> > drivers/clk/bcm/clk-bcm2835.c | 14 ++
> > include/dt-bind
On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote:
[...]
> > +static int bcm2835_clock_determine_rate(struct clk_hw *hw,
> > + struct clk_rate_request *req)
> > +{
> > + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
> > + struct clk_hw *parent, *best_parent = NU
Hi,
On Wed, Nov 18, 2015 at 10:25:45AM -0800, Eric Anholt wrote:
> Remi Pommarel writes:
>
> > Make bcm2835_clock_choose_div always round up the chosen MASH divisor so
> > that
> > the resulting average rate will not be higher than the requested one.
> >
&g
Register the pwm clock for bcm2835.
Signed-off-by: Remi Pommarel
---
drivers/clk/bcm/clk-bcm2835.c | 14 ++
include/dt-bindings/clock/bcm2835.h | 3 ++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835
Make bcm2835_clock_choose_div always round up the chosen MASH divisor so that
the resulting average rate will not be higher than the requested one.
Signed-off-by: Remi Pommarel
---
drivers/clk/bcm/clk-bcm2835.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a
divided rate
instead of the parent one
- bcm2835_clock_choose_div has been modified to produce an avarage rate
lower or equal to the requested one
- devicetree modifications have removed to be send in another patch
Remi Pommarel (3):
clk: bcm2835: Always round
t a mux clock
cannot be used because updating clock control register to select parent needs a
password to be xor'd with the parent index.
This patch get rid of mux clock and make these clocks handle their own parent,
allowing them to select the one to use.
Signed-off-by: Remi Pommarel
---
dr
On Wed, Nov 04, 2015 at 06:17:38PM -0800, Eric Anholt wrote:
> Remi Pommarel writes:
>
> > Register the pwm clock for bcm2835.
> > This patch also adds the ability to set a clock default rate.
>
> I don't think we should be setting a default clock rate. That sho
out of the
PWM clock itself.
Moreover, if you agree with the above modification I see no reason to
not call it "bcm2835_clock_determine_rate"
Thanks
--
Remi
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password (0x5a) in
higher register bits when changing parent. So a generic mux cannot be used
here.
The first patch fix the clock parent selection, while the second one is actually
adding the pwm clock registration.
Remi Pommarel (2):
clk: bcm2835: Support for clock parent selection
clk: bcm2835
Register the pwm clock for bcm2835.
This patch also adds the ability to set a clock default rate.
Signed-off-by: Remi Pommarel
---
arch/arm/boot/dts/bcm2835.dtsi | 8
drivers/clk/bcm/clk-bcm2835.c | 28 +++-
include/dt-bindings/clock/bcm2835.h | 3
mux clock
cannot be used because updating clock control register to select parent needs a
password to be xor'd with the parent index.
This patch get rid of mux clock and make these clocks handle their own parent,
allowing them to select the one to use.
Signed-off-by: Remi Pommarel
---
driv
This removes stack arrays of variable length and use kmalloc() instead, thus
removing the sparse warnings "Variable length array is used".
Signed-off-by: Remi Pommarel
---
drivers/staging/rtl8821ae/efuse.c | 38 +++---
1 file changed, 31 insert
This patch fixes all prohibited spaces after open '(' checkpatch.pl errors
for rtl8188eu.
Signed-off-by: Remi Pommarel
---
drivers/staging/rtl8188eu/include/odm_debug.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8188eu/include/odm_
On Wed, May 07, 2014 at 12:27:21AM +0300, Dan Carpenter wrote:
> Best to fix it yourself and Greg can take which ever version is easiest.
Ok thank you so I'll re-submitted it.
Regards
--
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Oups sorry msmtp messed up the from mail address. Do you want me to
re-submit this or you can fix it while applying the patch ?
--
Remi Pommarel
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More majordo
Selon Dmitry Torokhov <[EMAIL PROTECTED]>:
> Hi Remi,
>
> On Thursday 10 May 2007 21:50, Andrew Morton wrote:
> > On Thu, 10 May 2007 15:05:25 +0200
> > Remi Colinet <[EMAIL PROTECTED]> wrote:
> >
> > > My D610 ALPS Glide Point is unresponsive with
Selon Andrew Morton <[EMAIL PROTECTED]>:
> On Thu, 10 May 2007 15:05:25 +0200
> Remi Colinet <[EMAIL PROTECTED]> wrote:
>
> > My D610 ALPS Glide Point is unresponsive with 2.6.21-mm1 patch.
> > No problem noticed with 2.6.21.
> >
> > The culprit seems
Point. X refuses to start.
Any idea?
Remi Colinet
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