[tip:ras/core] x86/MCE: Determine MCA banks' init state properly

Commit-ID: 068b053dca0e2ab40b3d953b102a178654eec282 Gitweb: https://git.kernel.org/tip/068b053dca0e2ab40b3d953b102a178654eec282 Author: Yazen Ghannam AuthorDate: Fri, 7 Jun 2019 20:18:06 + Committer: Borislav Petkov CommitDate: Tue, 11 Jun 2019 15:23:34 +0200 x86/MCE: Determine MCA

[tip:ras/core] x86/MCE: Make the number of MCA banks a per-CPU variable

Commit-ID: c7d314f386e987be8b51eeb7dd947756ae23f6b6 Gitweb: https://git.kernel.org/tip/c7d314f386e987be8b51eeb7dd947756ae23f6b6 Author: Yazen Ghannam AuthorDate: Fri, 7 Jun 2019 20:18:05 + Committer: Borislav Petkov CommitDate: Tue, 11 Jun 2019 15:23:09 +0200 x86/MCE: Make the numb

[tip:ras/core] x86/MCE/AMD: Don't cache block addresses on SMCA systems

Commit-ID: 95d057f54664f3c6e8f650faf5690b82b30a9e52 Gitweb: https://git.kernel.org/tip/95d057f54664f3c6e8f650faf5690b82b30a9e52 Author: Yazen Ghannam AuthorDate: Fri, 7 Jun 2019 20:18:04 + Committer: Borislav Petkov CommitDate: Tue, 11 Jun 2019 15:22:41 +0200 x86/MCE/AMD: Don't cac

[tip:ras/core] x86/MCE: Make mce_banks a per-CPU array

Commit-ID: b4914508f1fe0eca1cd011b6026ff762a1aa62d5 Gitweb: https://git.kernel.org/tip/b4914508f1fe0eca1cd011b6026ff762a1aa62d5 Author: Yazen Ghannam AuthorDate: Fri, 7 Jun 2019 20:18:04 + Committer: Borislav Petkov CommitDate: Tue, 11 Jun 2019 15:22:13 +0200 x86/MCE: Make mce_bank

[tip:ras/core] x86/MCE: Make struct mce_banks[] static

Commit-ID: 95fdce6b24f3526c2bd1aad15978d238b79da6bd Gitweb: https://git.kernel.org/tip/95fdce6b24f3526c2bd1aad15978d238b79da6bd Author: Yazen Ghannam AuthorDate: Fri, 7 Jun 2019 20:18:03 + Committer: Borislav Petkov CommitDate: Tue, 11 Jun 2019 15:13:51 +0200 x86/MCE: Make struct m

[tip:ras/core] x86/MCE: Add an MCE-record filtering function

Commit-ID: 45d4b7b9cb88526f6d5bd4c03efab88d75d10e4f Gitweb: https://git.kernel.org/tip/45d4b7b9cb88526f6d5bd4c03efab88d75d10e4f Author: Yazen Ghannam AuthorDate: Mon, 25 Mar 2019 16:34:22 + Committer: Borislav Petkov CommitDate: Tue, 23 Apr 2019 18:04:47 +0200 x86/MCE: Add an MCE-r

[tip:ras/core] x86/MCE/AMD: Don't report L1 BTB MCA errors on some family 17h models

Commit-ID: 71a84402b93e5fbd8f817f40059c137e10171788 Gitweb: https://git.kernel.org/tip/71a84402b93e5fbd8f817f40059c137e10171788 Author: Yazen Ghannam AuthorDate: Mon, 25 Mar 2019 16:34:22 + Committer: Borislav Petkov CommitDate: Tue, 23 Apr 2019 18:16:07 +0200 x86/MCE/AMD: Don't re

[tip:ras/core] x86/mce: Handle varying MCA bank counts

Commit-ID: 006c077041dc73b9490fffc4c6af5befe0687110 Gitweb: https://git.kernel.org/tip/006c077041dc73b9490fffc4c6af5befe0687110 Author: Yazen Ghannam AuthorDate: Fri, 27 Jul 2018 16:40:09 -0500 Committer: Borislav Petkov CommitDate: Wed, 27 Mar 2019 13:12:49 +0100 x86/mce: Handle varyi

[tip:ras/core] x86/MCE: Group AMD function prototypes in

Commit-ID: 9308fd4074551f222f30322d1ee8c5aff18e9747 Gitweb: https://git.kernel.org/tip/9308fd4074551f222f30322d1ee8c5aff18e9747 Author: Yazen Ghannam AuthorDate: Fri, 22 Mar 2019 20:29:00 + Committer: Borislav Petkov CommitDate: Sun, 24 Mar 2019 10:54:13 +0100 x86/MCE: Group AMD fu

[tip:ras/core] EDAC/mce_amd: Decode MCA_STATUS[Scrub] bit

Commit-ID: 3f4da372ec8e4ce58c17ac4f2e3c8891bbfea17e Gitweb: https://git.kernel.org/tip/3f4da372ec8e4ce58c17ac4f2e3c8891bbfea17e Author: Yazen Ghannam AuthorDate: Tue, 12 Feb 2019 21:24:28 + Committer: Borislav Petkov CommitDate: Fri, 15 Feb 2019 14:25:58 +0100 EDAC/mce_amd: Decode

[tip:ras/core] EDAC/mce_amd: Decode MCA_STATUS in bit definition order

Commit-ID: a0bcd3c0b8a52ba0eb74371fa6be15ad0390ba67 Gitweb: https://git.kernel.org/tip/a0bcd3c0b8a52ba0eb74371fa6be15ad0390ba67 Author: Yazen Ghannam AuthorDate: Tue, 12 Feb 2019 21:24:29 + Committer: Borislav Petkov CommitDate: Fri, 15 Feb 2019 14:36:31 +0100 EDAC/mce_amd: Decode

[tip:ras/core] EDAC, mce_amd: Print ExtErrorCode and description on a single line

Commit-ID: 1c1522d32ac49065f88e5a8b3d6e3a5613b20118 Gitweb: https://git.kernel.org/tip/1c1522d32ac49065f88e5a8b3d6e3a5613b20118 Author: Yazen Ghannam AuthorDate: Fri, 1 Feb 2019 22:55:54 + Committer: Borislav Petkov CommitDate: Mon, 4 Feb 2019 19:29:13 +0100 EDAC, mce_amd: Print Ex

[tip:ras/core] EDAC, mce_amd: Match error descriptions to latest documentation

Commit-ID: e03447ee718b331be8f3abc388c7bf7d325dfab4 Gitweb: https://git.kernel.org/tip/e03447ee718b331be8f3abc388c7bf7d325dfab4 Author: Yazen Ghannam AuthorDate: Fri, 1 Feb 2019 22:55:53 + Committer: Borislav Petkov CommitDate: Sun, 3 Feb 2019 13:16:50 +0100 EDAC, mce_amd: Match er

[tip:ras/core] x86/MCE/AMD, EDAC/mce_amd: Add new McaTypes for CS, PSP, and SMU units

Commit-ID: 3ad7e748c12cc771df6020a552def3e1727e8a17 Gitweb: https://git.kernel.org/tip/3ad7e748c12cc771df6020a552def3e1727e8a17 Author: Yazen Ghannam AuthorDate: Fri, 1 Feb 2019 22:55:52 + Committer: Borislav Petkov CommitDate: Sun, 3 Feb 2019 13:01:57 +0100 x86/MCE/AMD, EDAC/mce_a

[tip:ras/core] x86/MCE/AMD, EDAC/mce_amd: Add new error descriptions for some SMCA bank types

Commit-ID: 8a5dd2cd2f2e94878cacc969655a69ca214795ab Gitweb: https://git.kernel.org/tip/8a5dd2cd2f2e94878cacc969655a69ca214795ab Author: Yazen Ghannam AuthorDate: Fri, 1 Feb 2019 22:55:52 + Committer: Borislav Petkov CommitDate: Sun, 3 Feb 2019 13:05:16 +0100 x86/MCE/AMD, EDAC/mce_a

[tip:ras/core] x86/MCE/AMD, EDAC/mce_amd: Add new MP5, NBIO, and PCIE SMCA bank types

Commit-ID: cbfa447edd6a3825fdb8a4ffae74ff7208f2d2c0 Gitweb: https://git.kernel.org/tip/cbfa447edd6a3825fdb8a4ffae74ff7208f2d2c0 Author: Yazen Ghannam AuthorDate: Fri, 1 Feb 2019 22:55:51 + Committer: Borislav Petkov CommitDate: Sun, 3 Feb 2019 13:01:44 +0100 x86/MCE/AMD, EDAC/mce_a

[tip:efi/core] efi: Decode IA32/X64 Context Info structure

Commit-ID: 9c178663cbf2e754be322505078306b4a380a697 Gitweb: https://git.kernel.org/tip/9c178663cbf2e754be322505078306b4a380a697 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:56 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:48 +0200 efi: Decode IA32/X64 Conte

[tip:efi/core] efi: Decode IA32/X64 MS Check structure

Commit-ID: a32bc29ed19776ef6827d6336847de9a0b7a8dc5 Gitweb: https://git.kernel.org/tip/a32bc29ed19776ef6827d6336847de9a0b7a8dc5 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:55 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:48 +0200 efi: Decode IA32/X64 MS Ch

[tip:efi/core] efi: Decode IA32/X64 Cache, TLB, and Bus Check structures

Commit-ID: a9c1e3e791409e35207277b7873efc756b6fb625 Gitweb: https://git.kernel.org/tip/a9c1e3e791409e35207277b7873efc756b6fb625 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:53 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:48 +0200 efi: Decode IA32/X64 Cache

[tip:efi/core] efi: Decode additional IA32/X64 Bus Check fields

Commit-ID: c6bc4ac0aadede7a5c5260bcc315cd2b18c6b471 Gitweb: https://git.kernel.org/tip/c6bc4ac0aadede7a5c5260bcc315cd2b18c6b471 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:54 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:48 +0200 efi: Decode additional IA3

[tip:efi/core] efi: Decode UEFI-defined IA32/X64 Error Structure GUIDs

Commit-ID: dc2d26e4b667c8005c58669e71de3efd17f4390f Gitweb: https://git.kernel.org/tip/dc2d26e4b667c8005c58669e71de3efd17f4390f Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:52 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:47 +0200 efi: Decode UEFI-defined I

[tip:efi/core] efi: Decode IA32/X64 Processor Error Info Structure

Commit-ID: 7c9449b8c8a59511b7d749afb193c96353451c82 Gitweb: https://git.kernel.org/tip/7c9449b8c8a59511b7d749afb193c96353451c82 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:51 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:47 +0200 efi: Decode IA32/X64 Proce

[tip:efi/core] efi: Decode IA32/X64 Processor Error Section

Commit-ID: f9e1bdb9f35f4f5cfa7c9025ac68c02909b6d3b1 Gitweb: https://git.kernel.org/tip/f9e1bdb9f35f4f5cfa7c9025ac68c02909b6d3b1 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:50 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:47 +0200 efi: Decode IA32/X64 Proce

[tip:efi/core] efi: Fix IA32/X64 Processor Error Record definition

Commit-ID: 742632d237ce180439ab4af31e9891df0df81233 Gitweb: https://git.kernel.org/tip/742632d237ce180439ab4af31e9891df0df81233 Author: Yazen Ghannam AuthorDate: Fri, 4 May 2018 07:59:49 +0200 Committer: Ingo Molnar CommitDate: Mon, 14 May 2018 08:57:47 +0200 efi: Fix IA32/X64 Processo

[tip:x86/urgent] x86/smpboot: Don't use mwait_play_dead() on AMD systems

Commit-ID: da6fa7ef67f07108a1b0cb9fd9e7fcaabd39c051 Gitweb: https://git.kernel.org/tip/da6fa7ef67f07108a1b0cb9fd9e7fcaabd39c051 Author: Yazen Ghannam AuthorDate: Tue, 3 Apr 2018 09:02:28 -0500 Committer: Thomas Gleixner CommitDate: Thu, 26 Apr 2018 16:06:19 +0200 x86/smpboot: Don't use

[tip:ras/core] Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

Commit-ID: e2efacb6a54ab54626da3507be1008d0040492cc Gitweb: https://git.kernel.org/tip/e2efacb6a54ab54626da3507be1008d0040492cc Author: Yazen Ghannam AuthorDate: Mon, 26 Mar 2018 14:15:25 -0500 Committer: Thomas Gleixner CommitDate: Wed, 28 Mar 2018 20:34:59 +0200 Revert "x86/mce/AMD:

[tip:ras/core] x86/mce/AMD: Get address from already initialized block

Commit-ID: 27bd59502702fe51d9eb00450a75b727ec6bfcb4 Gitweb: https://git.kernel.org/tip/27bd59502702fe51d9eb00450a75b727ec6bfcb4 Author: Yazen Ghannam AuthorDate: Wed, 21 Feb 2018 11:18:59 +0100 Committer: Ingo Molnar CommitDate: Wed, 21 Feb 2018 17:00:55 +0100 x86/mce/AMD: Get address

[tip:ras/core] x86/mce/AMD: Carve out SMCA get_block_address() code

Commit-ID: 8a331f4a0863bea758561c921b94b4d28f7c4029 Gitweb: https://git.kernel.org/tip/8a331f4a0863bea758561c921b94b4d28f7c4029 Author: Yazen Ghannam AuthorDate: Wed, 21 Feb 2018 11:19:00 +0100 Committer: Ingo Molnar CommitDate: Wed, 21 Feb 2018 17:00:55 +0100 x86/mce/AMD: Carve out SM

[tip:ras/core] x86/mce/AMD, EDAC/mce_amd: Enumerate Reserved SMCA bank type

Commit-ID: 68627a697c195937672ce07683094c72b1174786 Gitweb: https://git.kernel.org/tip/68627a697c195937672ce07683094c72b1174786 Author: Yazen Ghannam AuthorDate: Wed, 21 Feb 2018 11:18:58 +0100 Committer: Ingo Molnar CommitDate: Wed, 21 Feb 2018 17:00:54 +0100 x86/mce/AMD, EDAC/mce_amd

[tip:ras/core] x86/mce/AMD: Pass the bank number to smca_get_bank_type()

Commit-ID: e5d6a126d4c473499f354254a15ca0c2d8c84ca3 Gitweb: https://git.kernel.org/tip/e5d6a126d4c473499f354254a15ca0c2d8c84ca3 Author: Yazen Ghannam AuthorDate: Wed, 21 Feb 2018 11:18:57 +0100 Committer: Ingo Molnar CommitDate: Wed, 21 Feb 2018 17:00:54 +0100 x86/mce/AMD: Pass the ban

[tip:ras/core] x86/MCE: Make correctable error detection look at the Deferred bit

Commit-ID: 179eb850ac57c06edaed67fc744ba9d902172f96 Gitweb: https://git.kernel.org/tip/179eb850ac57c06edaed67fc744ba9d902172f96 Author: Yazen Ghannam AuthorDate: Mon, 18 Dec 2017 12:37:14 +0100 Committer: Thomas Gleixner CommitDate: Mon, 18 Dec 2017 12:58:29 +0100 x86/MCE: Make correct

[tip:ras/core] x86/MCE: Report only DRAM ECC as memory errors on AMD systems

Commit-ID: c6708d50f166bea2d763c96485d31fdbc50204f1 Gitweb: https://git.kernel.org/tip/c6708d50f166bea2d763c96485d31fdbc50204f1 Author: Yazen Ghannam AuthorDate: Mon, 18 Dec 2017 12:37:13 +0100 Committer: Thomas Gleixner CommitDate: Mon, 18 Dec 2017 12:58:29 +0100 x86/MCE: Report only

[tip:ras/core] x86/MCE/AMD: Define a function to get SMCA bank type

Commit-ID: 11cf887728a3d1de77cc12ce247b64ef32608891 Gitweb: https://git.kernel.org/tip/11cf887728a3d1de77cc12ce247b64ef32608891 Author: Yazen Ghannam AuthorDate: Mon, 18 Dec 2017 12:37:12 +0100 Committer: Thomas Gleixner CommitDate: Mon, 18 Dec 2017 12:58:28 +0100 x86/MCE/AMD: Define a

[tip:ras/core] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems

Commit-ID: c8a4364c33ac7ed63278267b8f6d8c15810d5fd1 Gitweb: https://git.kernel.org/tip/c8a4364c33ac7ed63278267b8f6d8c15810d5fd1 Author: Yazen Ghannam AuthorDate: Mon, 4 Dec 2017 17:54:38 +0100 Committer: Thomas Gleixner CommitDate: Mon, 4 Dec 2017 20:38:44 +0100 x86/mce/AMD: Don't set

[tip:ras/core] x86/MCE/AMD: Fix mce_severity_amd_smca() signature

Commit-ID: 783ca517bfd62ca516178712775e4b273292d5b1 Gitweb: https://git.kernel.org/tip/783ca517bfd62ca516178712775e4b273292d5b1 Author: Yazen Ghannam AuthorDate: Mon, 6 Nov 2017 18:46:33 +0100 Committer: Ingo Molnar CommitDate: Tue, 7 Nov 2017 11:07:50 +0100 x86/MCE/AMD: Fix mce_severi

[tip:ras/core] x86/MCE/AMD: Always give panic severity for UC errors in kernel context

Commit-ID: d65dfc81bb3894fdb68cbc74bbf5fb48d2354071 Gitweb: https://git.kernel.org/tip/d65dfc81bb3894fdb68cbc74bbf5fb48d2354071 Author: Yazen Ghannam AuthorDate: Mon, 6 Nov 2017 18:46:32 +0100 Committer: Ingo Molnar CommitDate: Tue, 7 Nov 2017 11:07:50 +0100 x86/MCE/AMD: Always give pa

[tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the smca_banks array

Commit-ID: 9662d43f523dfc0dc242ec29c2921c43898d6ae5 Gitweb: http://git.kernel.org/tip/9662d43f523dfc0dc242ec29c2921c43898d6ae5 Author: Yazen Ghannam AuthorDate: Mon, 24 Jul 2017 12:12:28 +0200 Committer: Ingo Molnar CommitDate: Tue, 25 Jul 2017 15:50:53 +0200 x86/mce/AMD: Allow any CPU

[tip:ras/core] x86/mce/AMD: Allow any CPU to initialize the smca_banks array

Commit-ID: df7ce2c4bfc9660be86624b647034160c0585328 Gitweb: http://git.kernel.org/tip/df7ce2c4bfc9660be86624b647034160c0585328 Author: Yazen Ghannam AuthorDate: Mon, 24 Jul 2017 12:12:28 +0200 Committer: Ingo Molnar CommitDate: Tue, 25 Jul 2017 11:26:47 +0200 x86/mce/AMD: Allow any CPU

[tip:ras/core] x86/mce: Always save severity in machine_check_poll()

Commit-ID: e2de64ec52659870b4fdef5bf08f265ce5fe1ccc Gitweb: http://git.kernel.org/tip/e2de64ec52659870b4fdef5bf08f265ce5fe1ccc Author: Yazen Ghannam AuthorDate: Mon, 26 Jun 2017 14:35:31 +0200 Committer: Thomas Gleixner CommitDate: Mon, 26 Jun 2017 15:58:56 +0200 x86/mce: Always save s

[tip:ras/core] x86/mce: Update bootlog description to reflect behavior on AMD

Commit-ID: 6057077f6ebc0747c2f5b21dfb1eb782f489d0f6 Gitweb: http://git.kernel.org/tip/6057077f6ebc0747c2f5b21dfb1eb782f489d0f6 Author: Yazen Ghannam AuthorDate: Tue, 13 Jun 2017 18:28:35 +0200 Committer: Ingo Molnar CommitDate: Wed, 14 Jun 2017 07:32:10 +0200 x86/mce: Update bootlog de

[tip:ras/core] x86/mce: Don't disable MCA banks when offlining a CPU on AMD

Commit-ID: ec33838244c8535b23b8d24b167996fd1318bb68 Gitweb: http://git.kernel.org/tip/ec33838244c8535b23b8d24b167996fd1318bb68 Author: Yazen Ghannam AuthorDate: Tue, 13 Jun 2017 18:28:34 +0200 Committer: Ingo Molnar CommitDate: Wed, 14 Jun 2017 07:32:09 +0200 x86/mce: Don't disable MCA

[tip:ras/core] x86/mce/AMD: Use saved threshold block info in interrupt handler

Commit-ID: 17ef4af0ec0f97b369f304dc04d61722f3591c4b Gitweb: http://git.kernel.org/tip/17ef4af0ec0f97b369f304dc04d61722f3591c4b Author: Yazen Ghannam AuthorDate: Tue, 13 Jun 2017 18:28:29 +0200 Committer: Ingo Molnar CommitDate: Wed, 14 Jun 2017 07:32:06 +0200 x86/mce/AMD: Use saved thr

[tip:ras/core] x86/mce/AMD: Use msr_stat when clearing MCA_STATUS

Commit-ID: a24b8c3409935bbc8e3c12131c473c92692403cd Gitweb: http://git.kernel.org/tip/a24b8c3409935bbc8e3c12131c473c92692403cd Author: Yazen Ghannam AuthorDate: Tue, 13 Jun 2017 18:28:28 +0200 Committer: Ingo Molnar CommitDate: Wed, 14 Jun 2017 07:32:06 +0200 x86/mce/AMD: Use msr_stat

[tip:ras/core] x86/mce/AMD: Carve out SMCA bank configuration

Commit-ID: 84bcc1d57f634ba8a55eda9a910c159467af0aac Gitweb: http://git.kernel.org/tip/84bcc1d57f634ba8a55eda9a910c159467af0aac Author: Yazen Ghannam AuthorDate: Fri, 19 May 2017 11:39:15 +0200 Committer: Thomas Gleixner CommitDate: Sun, 21 May 2017 21:55:13 +0200 x86/mce/AMD: Carve out

[tip:ras/core] x86/mce/AMD: Redo error logging from APIC LVT interrupt handlers

Commit-ID: 37d43acfd79f9c53289e9990c344cbd5b4db4bd4 Gitweb: http://git.kernel.org/tip/37d43acfd79f9c53289e9990c344cbd5b4db4bd4 Author: Yazen Ghannam AuthorDate: Fri, 19 May 2017 11:39:14 +0200 Committer: Thomas Gleixner CommitDate: Sun, 21 May 2017 21:55:13 +0200 x86/mce/AMD: Redo erro

[tip:ras/urgent] x86/mce/AMD: Give a name to MCA bank 3 when accessed with legacy MSRs

Commit-ID: 7cc5ad0d4aec505bee7f49696867668aa3889195 Gitweb: http://git.kernel.org/tip/7cc5ad0d4aec505bee7f49696867668aa3889195 Author: Yazen Ghannam AuthorDate: Thu, 30 Mar 2017 13:17:14 +0200 Committer: Ingo Molnar CommitDate: Fri, 31 Mar 2017 08:10:09 +0200 x86/mce/AMD: Give a name t

[tip:x86/urgent] x86/mce/AMD: Give a name to MCA bank 3 when accessed with legacy MSRs

Commit-ID: 29f72ce3e4d18066ec75c79c857bee0618a3504b Gitweb: http://git.kernel.org/tip/29f72ce3e4d18066ec75c79c857bee0618a3504b Author: Yazen Ghannam AuthorDate: Thu, 30 Mar 2017 13:17:14 +0200 Committer: Thomas Gleixner CommitDate: Fri, 31 Mar 2017 10:09:44 +0200 x86/mce/AMD: Give a na

[tip:ras/core] x86/mce: Init some CPU features early

Commit-ID: 5204bf17031b69fa5faa4dc80a9dc1e2446d74f9 Gitweb: http://git.kernel.org/tip/5204bf17031b69fa5faa4dc80a9dc1e2446d74f9 Author: Yazen Ghannam AuthorDate: Wed, 15 Mar 2017 12:30:55 -0500 Committer: Thomas Gleixner CommitDate: Sat, 18 Mar 2017 13:03:44 +0100 x86/mce: Init some CPU

[tip:x86/urgent] x86/CPU/AMD: Fix Zen SMT topology

Commit-ID: 08b259631b5a1d912af4832847b5642f377d9101 Gitweb: http://git.kernel.org/tip/08b259631b5a1d912af4832847b5642f377d9101 Author: Yazen Ghannam AuthorDate: Sun, 5 Feb 2017 11:50:22 +0100 Committer: Ingo Molnar CommitDate: Sun, 5 Feb 2017 12:18:45 +0100 x86/CPU/AMD: Fix Zen SMT top

[tip:ras/core] x86/ras/amd: Make sysfs names of banks more user-friendly

Commit-ID: 0b737a9c2af85cc8295f9308d9250f9111bbf94d Gitweb: http://git.kernel.org/tip/0b737a9c2af85cc8295f9308d9250f9111bbf94d Author: Yazen Ghannam AuthorDate: Mon, 23 Jan 2017 19:35:08 +0100 Committer: Ingo Molnar CommitDate: Tue, 24 Jan 2017 09:14:53 +0100 x86/ras/amd: Make sysfs na

[tip:ras/core] x86/mce/AMD: Add system physical address translation for AMD Fam17h

Commit-ID: f5382de9d4b1d67cc858c49fa6077720621576ea Gitweb: http://git.kernel.org/tip/f5382de9d4b1d67cc858c49fa6077720621576ea Author: Yazen Ghannam AuthorDate: Thu, 17 Nov 2016 17:57:27 -0500 Committer: Ingo Molnar CommitDate: Tue, 22 Nov 2016 12:30:16 +0100 x86/mce/AMD: Add system ph

[tip:ras/core] x86/mce/AMD: Add system physical address translation for AMD Fam17h

Commit-ID: ed3db40f00be77b8aa407885e35513c7a517e65e Gitweb: http://git.kernel.org/tip/ed3db40f00be77b8aa407885e35513c7a517e65e Author: Yazen Ghannam AuthorDate: Thu, 17 Nov 2016 17:57:27 -0500 Committer: Ingo Molnar CommitDate: Mon, 21 Nov 2016 10:00:22 +0100 x86/mce/AMD: Add system ph

[tip:ras/core] x86/mce/AMD: Add system physical address translation for AMD Fam17h

Commit-ID: a0faa9bf847c87d99a513a2d3e1940252e3a8d7d Gitweb: http://git.kernel.org/tip/a0faa9bf847c87d99a513a2d3e1940252e3a8d7d Author: Yazen Ghannam AuthorDate: Thu, 17 Nov 2016 17:57:27 -0500 Committer: Thomas Gleixner CommitDate: Mon, 21 Nov 2016 09:43:09 +0100 x86/mce/AMD: Add syste

[tip:ras/core] x86/mce/AMD: Add system physical address translation for AMD Fam17h

Commit-ID: c698decd333b67b3814682cf65e9069e6db2ecd1 Gitweb: http://git.kernel.org/tip/c698decd333b67b3814682cf65e9069e6db2ecd1 Author: Yazen Ghannam AuthorDate: Thu, 17 Nov 2016 17:57:27 -0500 Committer: Thomas Gleixner CommitDate: Mon, 21 Nov 2016 09:38:59 +0100 x86/mce/AMD: Add syste

[tip:ras/core] x86/amd_nb: Add Fam17h Data Fabric as "Northbridge"

Commit-ID: b791c6b6a55c402367cc544f54921074253db061 Gitweb: http://git.kernel.org/tip/b791c6b6a55c402367cc544f54921074253db061 Author: Yazen Ghannam AuthorDate: Thu, 10 Nov 2016 15:10:55 -0600 Committer: Thomas Gleixner CommitDate: Wed, 16 Nov 2016 20:46:38 +0100 x86/amd_nb: Add Fam17h

[tip:ras/core] x86/amd_nb: Add SMN and Indirect Data Fabric access for AMD Fam17h

Commit-ID: ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e Gitweb: http://git.kernel.org/tip/ddfe43cdc0da3189feac4bb9f0f818bef6d6e56e Author: Yazen Ghannam AuthorDate: Thu, 10 Nov 2016 15:10:56 -0600 Committer: Thomas Gleixner CommitDate: Wed, 16 Nov 2016 20:46:38 +0100 x86/amd_nb: Add SMN an

[tip:ras/core] x86/amd_nb: Make amd_northbridges internal to amd_nb.c

Commit-ID: c7993890e772c450764d39ba872444307bbdd460 Gitweb: http://git.kernel.org/tip/c7993890e772c450764d39ba872444307bbdd460 Author: Yazen Ghannam AuthorDate: Thu, 10 Nov 2016 15:10:53 -0600 Committer: Thomas Gleixner CommitDate: Wed, 16 Nov 2016 20:46:37 +0100 x86/amd_nb: Make amd_n

[tip:ras/core] x86/amd_nb: Make all exports EXPORT_SYMBOL_GPL

Commit-ID: de6bd0835ac148a0882528fe1fe5bcee709fe911 Gitweb: http://git.kernel.org/tip/de6bd0835ac148a0882528fe1fe5bcee709fe911 Author: Yazen Ghannam AuthorDate: Thu, 10 Nov 2016 15:10:54 -0600 Committer: Thomas Gleixner CommitDate: Wed, 16 Nov 2016 20:46:38 +0100 x86/amd_nb: Make all e

[tip:ras/core] x86/mce/AMD: Reset Threshold Limit after logging error

Commit-ID: 18807ddb7f88d4ac3797302bafb18143d573e66f Gitweb: http://git.kernel.org/tip/18807ddb7f88d4ac3797302bafb18143d573e66f Author: Yazen Ghannam AuthorDate: Tue, 15 Nov 2016 15:13:53 -0600 Committer: Thomas Gleixner CommitDate: Wed, 16 Nov 2016 09:57:11 +0100 x86/mce/AMD: Reset Thr

[tip:x86/cpu] x86/cpu/AMD: Clean up cpu_llc_id assignment per topology feature

Commit-ID: b6a50cddbcbda7105355898ead18f1a647c22520 Gitweb: http://git.kernel.org/tip/b6a50cddbcbda7105355898ead18f1a647c22520 Author: Yazen Ghannam AuthorDate: Tue, 8 Nov 2016 16:30:54 +0100 Committer: Ingo Molnar CommitDate: Wed, 9 Nov 2016 17:07:43 +0100 x86/cpu/AMD: Clean up cpu_ll

[tip:x86/urgent] x86/cpu/AMD: Fix cpu_llc_id for AMD Fam17h systems

Commit-ID: b0b6e86846093c5f8820386bc01515f857dd8faa Gitweb: http://git.kernel.org/tip/b0b6e86846093c5f8820386bc01515f857dd8faa Author: Yazen Ghannam AuthorDate: Tue, 8 Nov 2016 09:35:06 +0100 Committer: Ingo Molnar CommitDate: Wed, 9 Nov 2016 17:06:08 +0100 x86/cpu/AMD: Fix cpu_llc_id

[tip:ras/core] x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly

Commit-ID: a884675b873a0185d2626d1f304987c94cef6d74 Gitweb: http://git.kernel.org/tip/a884675b873a0185d2626d1f304987c94cef6d74 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:40 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:14 +0200 x86/MCE/AMD, EDAC: Han

[tip:ras/core] x86/mce/AMD: Extract the error address on SMCA systems

Commit-ID: 4f29b73bae158e3635b8f289f77376b054904ef5 Gitweb: http://git.kernel.org/tip/4f29b73bae158e3635b8f289f77376b054904ef5 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:39 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:13 +0200 x86/mce/AMD: Extract t

[tip:ras/core] x86/mce/AMD: Update sysfs bank names for SMCA systems

Commit-ID: 87a6d4091bd795b43d684bfc87253e04a263af1c Gitweb: http://git.kernel.org/tip/87a6d4091bd795b43d684bfc87253e04a263af1c Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:35 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:11 +0200 x86/mce/AMD: Update sy

[tip:ras/core] x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systems

Commit-ID: 66ef269dbbe45e264ccf7146d5db32b04478d148 Gitweb: http://git.kernel.org/tip/66ef269dbbe45e264ccf7146d5db32b04478d148 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:36 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:11 +0200 x86/mce/AMD: Ensure th

[tip:ras/core] x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systems

Commit-ID: 5828c46f2c07b97d758da6dc6afd5c374768d44d Gitweb: http://git.kernel.org/tip/5828c46f2c07b97d758da6dc6afd5c374768d44d Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:37 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:12 +0200 x86/mce/AMD: Save MCA_

[tip:ras/core] x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA systems

Commit-ID: 4b711f92c9b21878794597997ecda1428acc334c Gitweb: http://git.kernel.org/tip/4b711f92c9b21878794597997ecda1428acc334c Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:38 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:13 +0200 x86/mce, EDAC/mce_amd:

[tip:ras/core] x86/RAS: Add syndrome support to mce_amd_inj

Commit-ID: bad744b7f29d264c2c2ad8fb723dd480e6c9b007 Gitweb: http://git.kernel.org/tip/bad744b7f29d264c2c2ad8fb723dd480e6c9b007 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:30 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:07 +0200 x86/RAS: Add syndrome

[tip:ras/core] x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types

Commit-ID: 5896820e0aa32572ad03b30563c539655b6c6375 Gitweb: http://git.kernel.org/tip/5896820e0aa32572ad03b30563c539655b6c6375 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:34 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:10 +0200 x86/mce/AMD, EDAC/mce_

[tip:ras/core] EDAC/mce_amd: Add missing SMCA error descriptions

Commit-ID: c019b951e1f9f1de0c5b0726032e3adf34c523a7 Gitweb: http://git.kernel.org/tip/c019b951e1f9f1de0c5b0726032e3adf34c523a7 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:32 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:09 +0200 EDAC/mce_amd: Add miss

[tip:ras/core] x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks

Commit-ID: cfee4f6f0b2026380c6bc6913dbd27943df17371 Gitweb: http://git.kernel.org/tip/cfee4f6f0b2026380c6bc6913dbd27943df17371 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:31 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:08 +0200 x86/mce/AMD: Read MSRs

[tip:ras/core] EDAC/mce_amd: Use SMCA prefix for error descriptions arrays

Commit-ID: 856095b1794be487527771dbd2fe28e34e94b266 Gitweb: http://git.kernel.org/tip/856095b1794be487527771dbd2fe28e34e94b266 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:33 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:09 +0200 EDAC/mce_amd: Use SMCA

[tip:ras/core] EDAC/mce_amd: Print syndrome register value on SMCA systems

Commit-ID: b300e87300b68120aa5374341b252875a1cb6ea1 Gitweb: http://git.kernel.org/tip/b300e87300b68120aa5374341b252875a1cb6ea1 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:29 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:07 +0200 EDAC/mce_amd: Print sy

[tip:ras/core] x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()

Commit-ID: 74ab0e7a836a7df772af50cac21267eb43688841 Gitweb: http://git.kernel.org/tip/74ab0e7a836a7df772af50cac21267eb43688841 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:27 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:06 +0200 x86/mce/AMD: Use msr_o

[tip:ras/core] x86/mce: Add support for new MCA_SYND register

Commit-ID: db819d60f6720080150a365080ff656cf239f88f Gitweb: http://git.kernel.org/tip/db819d60f6720080150a365080ff656cf239f88f Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:28 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:06 +0200 x86/mce: Add support f

[tip:ras/core] x86/RAS/AMD: Reduce the number of IPIs when prepping error injection

Commit-ID: 340e983ab8afd02b59d698dd1365d7773bf136b3 Gitweb: http://git.kernel.org/tip/340e983ab8afd02b59d698dd1365d7773bf136b3 Author: Yazen Ghannam AuthorDate: Fri, 8 Jul 2016 11:09:39 +0200 Committer: Ingo Molnar CommitDate: Fri, 8 Jul 2016 11:29:26 +0200 x86/RAS/AMD: Reduce the numb

[tip:ras/core] x86/RAS: Add SMCA support to AMD Error Injector

Commit-ID: 754a92305980b1fecffe033dd3fdc49c37f8e4b0 Gitweb: http://git.kernel.org/tip/754a92305980b1fecffe033dd3fdc49c37f8e4b0 Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:29 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:23 +0200 x86/RAS: Add SMCA support

[tip:ras/core] EDAC, mce_amd: Detect SMCA using X86_FEATURE_SMCA

Commit-ID: a348ed83d9efe8c11ecc85c15d7329825b97431e Gitweb: http://git.kernel.org/tip/a348ed83d9efe8c11ecc85c15d7329825b97431e Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:28 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:23 +0200 EDAC, mce_amd: Detect SMCA

[tip:ras/core] x86/mce/AMD: Disable LogDeferredInMcaStat for SMCA systems

Commit-ID: 32544f060326bffa60dade49ce4595652df4d3ab Gitweb: http://git.kernel.org/tip/32544f060326bffa60dade49ce4595652df4d3ab Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:24 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:20 +0200 x86/mce/AMD: Disable LogDe

[tip:ras/core] x86/mce: Update AMD mcheck init to use cpu_has() facilities

Commit-ID: 14cddfd5308b0880abd6e58b6660f5cc8e8020f9 Gitweb: http://git.kernel.org/tip/14cddfd5308b0880abd6e58b6660f5cc8e8020f9 Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:27 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:22 +0200 x86/mce: Update AMD mcheck

[tip:ras/core] x86/cpu: Add detection of AMD RAS Capabilities

Commit-ID: 71faad43060d3d2040583635fbf7d1bdb3d04118 Gitweb: http://git.kernel.org/tip/71faad43060d3d2040583635fbf7d1bdb3d04118 Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:26 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:22 +0200 x86/cpu: Add detection of

[tip:ras/core] x86/mce/AMD: Log Deferred Errors using SMCA MCA_DE{STAT,ADDR} registers

Commit-ID: 34102009580a047c02b21f089f7fc7f65e605887 Gitweb: http://git.kernel.org/tip/34102009580a047c02b21f089f7fc7f65e605887 Author: Yazen Ghannam AuthorDate: Wed, 11 May 2016 14:58:23 +0200 Committer: Ingo Molnar CommitDate: Thu, 12 May 2016 09:08:19 +0200 x86/mce/AMD: Log Deferred

[tip:ras/core] x86/mce: Detect local MCEs properly

Commit-ID: fead35c68926682c90c995f22b48f1c8d78865c1 Gitweb: http://git.kernel.org/tip/fead35c68926682c90c995f22b48f1c8d78865c1 Author: Yazen Ghannam AuthorDate: Sat, 30 Apr 2016 14:33:57 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:17 +0200 x86/mce: Detect local MCEs

[tip:ras/core] x86/mce: Define vendor-specific MSR accessors

Commit-ID: a9750a31efdee79bea4ad1db93cf98a5db6e07ac Gitweb: http://git.kernel.org/tip/a9750a31efdee79bea4ad1db93cf98a5db6e07ac Author: Yazen Ghannam AuthorDate: Sat, 30 Apr 2016 14:33:54 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:16 +0200 x86/mce: Define vendor-spec

[tip:ras/core] x86/mce: Detect and use SMCA-specific msr_ops

Commit-ID: d9d73fcc878469d209d7a7030726f20dd10841a7 Gitweb: http://git.kernel.org/tip/d9d73fcc878469d209d7a7030726f20dd10841a7 Author: Yazen Ghannam AuthorDate: Sat, 30 Apr 2016 14:33:55 +0200 Committer: Ingo Molnar CommitDate: Tue, 3 May 2016 08:24:16 +0200 x86/mce: Detect and use SMC