From: Vincent Cheng
The IDT ClockMatrix (TM) family includes integrated devices that provide
eight PLL channels. Each PLL channel can be independently configured as a
frequency synthesizer, jitter attenuator, digitally controlled
oscillator (DCO), or a digital phase lock loop (DPLL). Typically
From: Vincent Cheng
Add device tree binding doc for the IDT ClockMatrix PTP clock.
Co-developed-by: Richard Cochran
Signed-off-by: Richard Cochran
Signed-off-by: Vincent Cheng
---
Changes since v2:
- As suggested by Rob Herring:
1. Replace with DT schema
2. Remove '-ptp' from compatib
From: Vincent Cheng
The IDT ClockMatrix (TM) family includes integrated devices that provide
eight PLL channels. Each PLL channel can be independently configured as a
frequency synthesizer, jitter attenuator, digitally controlled
oscillator (DCO), or a digital phase lock loop (DPLL). Typically
From: Vincent Cheng
Add device tree binding doc for the IDT ClockMatrix PTP clock driver.
Co-developed-by: Richard Cochran
Signed-off-by: Richard Cochran
Signed-off-by: Vincent Cheng
---
Changes since v1:
- No changes
---
Documentation/devicetree/bindings/ptp/ptp-idtcm.txt | 15 +++
From: Vincent Cheng
The IDT ClockMatrix (TM) family includes integrated devices that provide
eight PLL channels. Each PLL channel can be independently configured as a
frequency synthesizer, jitter attenuator, digitally controlled
oscillator (DCO), or a digital phase lock loop (DPLL). Typically
From: Vincent Cheng
Add device tree binding doc for the IDT ClockMatrix PTP clock driver.
Signed-off-by: Vincent Cheng
---
Documentation/devicetree/bindings/ptp/ptp-idtcm.txt | 15 +++
1 file changed, 15 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ptp/ptp-id
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